AU2003221675A1 - System and method for generating a clock signal in a communication system - Google Patents

System and method for generating a clock signal in a communication system

Info

Publication number
AU2003221675A1
AU2003221675A1 AU2003221675A AU2003221675A AU2003221675A1 AU 2003221675 A1 AU2003221675 A1 AU 2003221675A1 AU 2003221675 A AU2003221675 A AU 2003221675A AU 2003221675 A AU2003221675 A AU 2003221675A AU 2003221675 A1 AU2003221675 A1 AU 2003221675A1
Authority
AU
Australia
Prior art keywords
generating
clock signal
communication system
communication
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003221675A
Inventor
Laurent Alloin
Patrick Duvaut
Peter Kleewein
Ehud Langbergh
Jean-Francois Lopez
Shareq Rahman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Conexant Inc
Original Assignee
GlobespanVirata Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GlobespanVirata Inc filed Critical GlobespanVirata Inc
Publication of AU2003221675A1 publication Critical patent/AU2003221675A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13039—Asymmetrical two-way transmission, e.g. ADSL, HDSL
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13209—ISDN
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13214—Clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AU2003221675A 2002-04-08 2003-04-07 System and method for generating a clock signal in a communication system Abandoned AU2003221675A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US37100602P 2002-04-08 2002-04-08
US60/371,006 2002-04-08
PCT/US2003/010695 WO2003088514A1 (en) 2002-04-08 2003-04-07 System and method for generating a clock signal in a communication system

Publications (1)

Publication Number Publication Date
AU2003221675A1 true AU2003221675A1 (en) 2003-10-27

Family

ID=29250616

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003221675A Abandoned AU2003221675A1 (en) 2002-04-08 2003-04-07 System and method for generating a clock signal in a communication system

Country Status (2)

Country Link
AU (1) AU2003221675A1 (en)
WO (1) WO2003088514A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5589830A (en) * 1994-11-02 1996-12-31 Advanced Micro Devices, Inc. Stereo audio codec
US5991311A (en) * 1997-10-25 1999-11-23 Centillium Technology Time-multiplexed transmission on digital-subscriber lines synchronized to existing TCM-ISDN for reduced cross-talk
JP3082756B2 (en) * 1998-02-27 2000-08-28 日本電気株式会社 Multi-carrier transmission system and method
JP2000022838A (en) * 1998-06-30 2000-01-21 Fujitsu Ltd Delay suppressing system for subscriber's line transmission system
JP2002532953A (en) * 1998-12-08 2002-10-02 グローブスパン ヴィラタ、インコーポレイテッド Alternative configuration for ADSL systems operating in a time duplex noise environment

Also Published As

Publication number Publication date
WO2003088514A1 (en) 2003-10-23

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase