AU2003215863A1 - Integrated circuit with clock signal duty cycle control - Google Patents

Integrated circuit with clock signal duty cycle control

Info

Publication number
AU2003215863A1
AU2003215863A1 AU2003215863A AU2003215863A AU2003215863A1 AU 2003215863 A1 AU2003215863 A1 AU 2003215863A1 AU 2003215863 A AU2003215863 A AU 2003215863A AU 2003215863 A AU2003215863 A AU 2003215863A AU 2003215863 A1 AU2003215863 A1 AU 2003215863A1
Authority
AU
Australia
Prior art keywords
integrated circuit
clock signal
duty cycle
cycle control
signal duty
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003215863A
Other versions
AU2003215863A8 (en
Inventor
Manish Garg
Kiran B. R. Rao
Hendricus J. M. Veendrick
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of AU2003215863A8 publication Critical patent/AU2003215863A8/en
Publication of AU2003215863A1 publication Critical patent/AU2003215863A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
AU2003215863A 2002-04-22 2003-04-01 Integrated circuit with clock signal duty cycle control Abandoned AU2003215863A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP02076557 2002-04-22
EP02076557.4 2002-04-22
PCT/IB2003/001268 WO2003090355A2 (en) 2002-04-22 2003-04-01 Integrated circuit with clock signal duty cycle control

Publications (2)

Publication Number Publication Date
AU2003215863A8 AU2003215863A8 (en) 2003-11-03
AU2003215863A1 true AU2003215863A1 (en) 2003-11-03

Family

ID=29225694

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003215863A Abandoned AU2003215863A1 (en) 2002-04-22 2003-04-01 Integrated circuit with clock signal duty cycle control

Country Status (3)

Country Link
AU (1) AU2003215863A1 (en)
TW (1) TW200401506A (en)
WO (1) WO2003090355A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005028173B4 (en) 2005-06-17 2007-03-08 Texas Instruments Deutschland Gmbh Integrated CMOS duty cycle correction circuit for a clock signal
WO2008100494A2 (en) * 2007-02-12 2008-08-21 Rambus Inc. Differential receiver with common-gate input stage
US8519763B2 (en) * 2010-06-11 2013-08-27 Altera Corporation Integrated circuits with dual-edge clocking
CN113484565B (en) * 2021-07-14 2024-02-13 国网新疆电力有限公司电力科学研究院 DC signal generating device for calibrating low-frequency AC signal and calibration method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320438B1 (en) * 2000-08-17 2001-11-20 Pericom Semiconductor Corp. Duty-cycle correction driver with dual-filter feedback loop

Also Published As

Publication number Publication date
AU2003215863A8 (en) 2003-11-03
WO2003090355A2 (en) 2003-10-30
WO2003090355A3 (en) 2004-04-08
TW200401506A (en) 2004-01-16

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase