AU2002364274A8 - Insulation trench for an integrated circuit and method for production thereof - Google Patents

Insulation trench for an integrated circuit and method for production thereof

Info

Publication number
AU2002364274A8
AU2002364274A8 AU2002364274A AU2002364274A AU2002364274A8 AU 2002364274 A8 AU2002364274 A8 AU 2002364274A8 AU 2002364274 A AU2002364274 A AU 2002364274A AU 2002364274 A AU2002364274 A AU 2002364274A AU 2002364274 A8 AU2002364274 A8 AU 2002364274A8
Authority
AU
Australia
Prior art keywords
production
integrated circuit
insulation trench
trench
insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002364274A
Other versions
AU2002364274A1 (en
Inventor
Martin Schrems
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram AG
Original Assignee
Austriamicrosystems AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Austriamicrosystems AG filed Critical Austriamicrosystems AG
Publication of AU2002364274A8 publication Critical patent/AU2002364274A8/en
Publication of AU2002364274A1 publication Critical patent/AU2002364274A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
AU2002364274A 2001-11-27 2002-11-15 Insulation trench for an integrated circuit and method for production thereof Abandoned AU2002364274A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE2001157785 DE10157785A1 (en) 2001-11-27 2001-11-27 Isolation trench for an integrated circuit and method for its production
DE10157785.0 2001-11-27
PCT/EP2002/012838 WO2003046977A2 (en) 2001-11-27 2002-11-15 Insulation trench for an integrated circuit and method for production thereof

Publications (2)

Publication Number Publication Date
AU2002364274A8 true AU2002364274A8 (en) 2003-06-10
AU2002364274A1 AU2002364274A1 (en) 2003-06-10

Family

ID=7706915

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002364274A Abandoned AU2002364274A1 (en) 2001-11-27 2002-11-15 Insulation trench for an integrated circuit and method for production thereof

Country Status (4)

Country Link
EP (1) EP1449246A2 (en)
AU (1) AU2002364274A1 (en)
DE (1) DE10157785A1 (en)
WO (1) WO2003046977A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10345346B4 (en) * 2003-09-19 2010-09-16 Atmel Automotive Gmbh A method of manufacturing a semiconductor device having active regions separated by isolation structures
DE10345345A1 (en) 2003-09-19 2005-04-14 Atmel Germany Gmbh Method of manufacturing semiconductor devices in a semiconductor substrate
DE10348021A1 (en) * 2003-10-15 2005-05-25 Infineon Technologies Ag A method of manufacturing a semiconductor structure with encapsulation of a filling used to fill trenches
US7935602B2 (en) * 2005-06-28 2011-05-03 Micron Technology, Inc. Semiconductor processing methods
US7422960B2 (en) 2006-05-17 2008-09-09 Micron Technology, Inc. Method of forming gate arrays on a partial SOI substrate
US7537994B2 (en) 2006-08-28 2009-05-26 Micron Technology, Inc. Methods of forming semiconductor devices, assemblies and constructions
US7939403B2 (en) 2006-11-17 2011-05-10 Micron Technology, Inc. Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells
US9263455B2 (en) 2013-07-23 2016-02-16 Micron Technology, Inc. Methods of forming an array of conductive lines and methods of forming an array of recessed access gate lines

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4106050A (en) * 1976-09-02 1978-08-08 International Business Machines Corporation Integrated circuit structure with fully enclosed air isolation
US5098856A (en) * 1991-06-18 1992-03-24 International Business Machines Corporation Air-filled isolation trench with chemically vapor deposited silicon dioxide cap
JPH05299498A (en) * 1991-06-22 1993-11-12 Takehide Shirato Semiconductor device
EP0540262A2 (en) * 1991-10-31 1993-05-05 STMicroelectronics, Inc. Trench isolation region
KR100242466B1 (en) * 1996-06-27 2000-02-01 김영환 Semiconductor and its fabrication
KR100234408B1 (en) * 1997-02-17 1999-12-15 윤종용 Isolatoin Method for Smiconductor Device
US5915192A (en) * 1997-09-12 1999-06-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming shallow trench isolation
US5972758A (en) * 1997-12-04 1999-10-26 Intel Corporation Pedestal isolated junction structure and method of manufacture
KR100252866B1 (en) * 1997-12-13 2000-04-15 김영환 Semiconductor device and its manufacture method
KR100244299B1 (en) * 1997-12-13 2000-03-02 김영환 Isolation region of semiconductor device and method forming the same
US6140691A (en) * 1997-12-19 2000-10-31 Advanced Micro Devices, Inc. Trench isolation structure having a low K dielectric material isolated from a silicon-based substrate
US6214696B1 (en) * 1998-04-22 2001-04-10 Texas Instruments - Acer Incorporated Method of fabricating deep-shallow trench isolation
US6251734B1 (en) * 1998-07-01 2001-06-26 Motorola, Inc. Method for fabricating trench isolation and trench substrate contact
US6268637B1 (en) * 1998-10-22 2001-07-31 Advanced Micro Devices, Inc. Method of making air gap isolation by making a lateral EPI bridge for low K isolation advanced CMOS fabrication
EP1043769A1 (en) * 1999-04-07 2000-10-11 STMicroelectronics S.r.l. Process for manufacturing a semiconductor material wafer comprising single-crystal regions separated by insulating material regions, in particular for manufacturing intergrated power devices, and wafer thus obtained
US6144086A (en) * 1999-04-30 2000-11-07 International Business Machines Corporation Structure for improved latch-up using dual depth STI with impurity implant
US6150212A (en) * 1999-07-22 2000-11-21 International Business Machines Corporation Shallow trench isolation method utilizing combination of spacer and fill
US6833079B1 (en) * 2000-02-17 2004-12-21 Applied Materials Inc. Method of etching a shaped cavity

Also Published As

Publication number Publication date
WO2003046977A2 (en) 2003-06-05
WO2003046977A3 (en) 2004-02-12
EP1449246A2 (en) 2004-08-25
AU2002364274A1 (en) 2003-06-10
DE10157785A1 (en) 2003-06-12

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase