AU2002302301A1 - Method and device for forming clock pulses in a bus system comprising at least one station, bus system and station - Google Patents
Method and device for forming clock pulses in a bus system comprising at least one station, bus system and stationInfo
- Publication number
- AU2002302301A1 AU2002302301A1 AU2002302301A AU2002302301A AU2002302301A1 AU 2002302301 A1 AU2002302301 A1 AU 2002302301A1 AU 2002302301 A AU2002302301 A AU 2002302301A AU 2002302301 A AU2002302301 A AU 2002302301A AU 2002302301 A1 AU2002302301 A1 AU 2002302301A1
- Authority
- AU
- Australia
- Prior art keywords
- clock pulses
- bus system
- station
- clock
- specified
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/407—Bus networks with decentralised control
Abstract
A method for forming clock pulses of a second clock cycle (AT, TT) from clock pulses of a specified first clock cycle (ET) in a bus system having at least one user, a first number (E) of the clock pulses of the first clock cycle being determined or specified in a specifiable time interval and a second number (A) of the clock pulses of the second clock cycle being determined or specified in the specifiable time interval, in which an intermediate value (R) of the number of clock pulses is specified in the specifiable time interval, and the intermediate value (R) is compared to a value (C) which is formed from the first number (E) of clock pulses and the second number (A) of clock pulses and from the comparison a truth value (TRUE, FALSE) is yielded, and a clock pulse of the second clock cycle (AT, TT) is generated as a function of the truth value (TRUE, FALSE).
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10112907 | 2001-03-15 | ||
DE10112907.6 | 2001-03-15 | ||
DE10208649.4 | 2002-02-28 | ||
DE10208649A DE10208649A1 (en) | 2001-03-15 | 2002-02-28 | Forming clock pulses in bus system involves comparing intermediate number of pulses in defined period with value formed from first, second numbers of pulses to produce validity value |
PCT/DE2002/000873 WO2002075993A2 (en) | 2001-03-15 | 2002-03-13 | Method and device for forming clock pulses in a bus system comprising at least one station, bus system and station |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002302301A1 true AU2002302301A1 (en) | 2002-10-03 |
Family
ID=26008804
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002302301A Abandoned AU2002302301A1 (en) | 2001-03-15 | 2002-03-13 | Method and device for forming clock pulses in a bus system comprising at least one station, bus system and station |
Country Status (8)
Country | Link |
---|---|
US (1) | US7228450B2 (en) |
EP (1) | EP1374035B1 (en) |
JP (1) | JP4394351B2 (en) |
CN (1) | CN100409175C (en) |
AT (1) | ATE374396T1 (en) |
AU (1) | AU2002302301A1 (en) |
DE (2) | DE50210978D1 (en) |
WO (1) | WO2002075993A2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3870942B2 (en) * | 2003-10-20 | 2007-01-24 | ソニー株式会社 | Data transmission system and data transmission apparatus |
US7562105B2 (en) * | 2003-11-26 | 2009-07-14 | Intel Corporation | Methods and apparatus for generating a delay using a counter |
SE533636C2 (en) * | 2004-10-25 | 2010-11-16 | Xinshu Man L L C | Device for bus connection in CAN system |
US8542069B2 (en) * | 2011-09-23 | 2013-09-24 | Infineon Technologies Ag | Method for trimming an adjustable oscillator to match a CAN-bus and a CAN-bus communication controller |
EP3147774A1 (en) * | 2015-09-25 | 2017-03-29 | Gemalto Sa | Random clock generator |
DE102018129189B4 (en) | 2018-11-20 | 2021-03-04 | Beckhoff Automation Gmbh | METHOD FOR OPERATING A NETWORK SUBSCRIBER IN AN AUTOMATION COMMUNICATION NETWORK |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3705629A1 (en) * | 1987-02-21 | 1988-09-01 | Thomson Brandt Gmbh | PROGRAMMABLE FREQUENCY DIVIDER AND METHOD FOR GENERATING A LOW-FREQUENCY SIGNAL FROM A HIGH-FREQUENCY SIGNAL |
GB2239115A (en) * | 1989-12-15 | 1991-06-19 | Philips Electronic Associated | Direct dividing frequency synthesiser |
FR2666184A1 (en) * | 1990-08-24 | 1992-02-28 | Alcatel Radiotelephone | CLOCK WITH DIVISION OF FRACTIONAL FREQUENCY AND SERVING THIS CLOCK. |
US5202642A (en) * | 1991-05-09 | 1993-04-13 | Iomega Corporation | Apparatus and method for fractional frequency division |
US5436628A (en) * | 1993-09-13 | 1995-07-25 | Intel Corporation | Programmable frequency timing generator with phase adjust |
JPH09223959A (en) * | 1996-02-15 | 1997-08-26 | Sony Corp | Frequency divider circuit |
JP3087833B2 (en) * | 1997-03-12 | 2000-09-11 | 日本電気株式会社 | Sample frequency converter |
US6557133B1 (en) * | 1999-04-05 | 2003-04-29 | Advantest Corp. | Scaling logic for event based test system |
DE10000305B4 (en) | 2000-01-05 | 2011-08-11 | Robert Bosch GmbH, 70469 | Method and device for exchanging data between at least two subscribers connected to a bus system |
DE10000304B4 (en) | 2000-01-05 | 2011-09-15 | Robert Bosch Gmbh | Method and device for exchanging data between at least two subscribers connected to a bus system |
DE10000302B4 (en) | 2000-01-05 | 2011-08-11 | Robert Bosch GmbH, 70469 | Method and device for exchanging data between at least two subscribers connected to a bus system |
DE10000303B4 (en) | 2000-01-05 | 2011-09-29 | Robert Bosch Gmbh | Method and device for exchanging data between at least two subscribers connected to a bus system |
-
2002
- 2002-03-13 AU AU2002302301A patent/AU2002302301A1/en not_active Abandoned
- 2002-03-13 CN CNB028065425A patent/CN100409175C/en not_active Expired - Lifetime
- 2002-03-13 EP EP02729772A patent/EP1374035B1/en not_active Expired - Lifetime
- 2002-03-13 DE DE50210978T patent/DE50210978D1/en not_active Expired - Lifetime
- 2002-03-13 AT AT02729772T patent/ATE374396T1/en active
- 2002-03-13 DE DE10291151T patent/DE10291151D2/en not_active Ceased
- 2002-03-13 WO PCT/DE2002/000873 patent/WO2002075993A2/en active IP Right Grant
- 2002-03-13 US US10/471,908 patent/US7228450B2/en not_active Expired - Lifetime
- 2002-03-13 JP JP2002574290A patent/JP4394351B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20040148540A1 (en) | 2004-07-29 |
CN100409175C (en) | 2008-08-06 |
US7228450B2 (en) | 2007-06-05 |
DE10291151D2 (en) | 2004-04-15 |
EP1374035B1 (en) | 2007-09-26 |
JP4394351B2 (en) | 2010-01-06 |
CN1520546A (en) | 2004-08-11 |
EP1374035A2 (en) | 2004-01-02 |
JP2004528760A (en) | 2004-09-16 |
ATE374396T1 (en) | 2007-10-15 |
WO2002075993A2 (en) | 2002-09-26 |
WO2002075993A3 (en) | 2003-10-09 |
DE50210978D1 (en) | 2007-11-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |