AU2002251667A1 - Encapsulation of an integrated circuit - Google Patents
Encapsulation of an integrated circuitInfo
- Publication number
- AU2002251667A1 AU2002251667A1 AU2002251667A AU2002251667A AU2002251667A1 AU 2002251667 A1 AU2002251667 A1 AU 2002251667A1 AU 2002251667 A AU2002251667 A AU 2002251667A AU 2002251667 A AU2002251667 A AU 2002251667A AU 2002251667 A1 AU2002251667 A1 AU 2002251667A1
- Authority
- AU
- Australia
- Prior art keywords
- encapsulation
- integrated circuit
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/SG2002/000053 WO2003094221A1 (en) | 2002-04-04 | 2002-04-04 | Encapsulation of an integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002251667A1 true AU2002251667A1 (en) | 2003-11-17 |
Family
ID=29398798
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002251667A Abandoned AU2002251667A1 (en) | 2002-04-04 | 2002-04-04 | Encapsulation of an integrated circuit |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2002251667A1 (en) |
WO (1) | WO2003094221A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5814928B2 (en) * | 2010-11-04 | 2015-11-17 | アルプス電気株式会社 | Electronic component module |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2723195B2 (en) * | 1990-12-14 | 1998-03-09 | 松下電工株式会社 | Semiconductor package |
JPH0730049A (en) * | 1993-07-07 | 1995-01-31 | Toshiba Corp | Lead frame |
JP3519223B2 (en) * | 1996-11-26 | 2004-04-12 | 富士電機デバイステクノロジー株式会社 | Resin-sealed semiconductor device |
JP3359521B2 (en) * | 1996-12-26 | 2002-12-24 | 京セラ株式会社 | Method for manufacturing semiconductor device |
-
2002
- 2002-04-04 AU AU2002251667A patent/AU2002251667A1/en not_active Abandoned
- 2002-04-04 WO PCT/SG2002/000053 patent/WO2003094221A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
WO2003094221A1 (en) | 2003-11-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |