AU2002232805A1 - A technique to stabilize the chrominance subcarrier generation in a line-locked digital video system - Google Patents
A technique to stabilize the chrominance subcarrier generation in a line-locked digital video systemInfo
- Publication number
- AU2002232805A1 AU2002232805A1 AU2002232805A AU3280502A AU2002232805A1 AU 2002232805 A1 AU2002232805 A1 AU 2002232805A1 AU 2002232805 A AU2002232805 A AU 2002232805A AU 3280502 A AU3280502 A AU 3280502A AU 2002232805 A1 AU2002232805 A1 AU 2002232805A1
- Authority
- AU
- Australia
- Prior art keywords
- stabilize
- technique
- line
- digital video
- video system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/44—Colour synchronisation
- H04N9/45—Generation or recovery of colour sub-carriers
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Processing Of Color Television Signals (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Color Television Systems (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/703,517 | 2000-10-31 | ||
US09/703,517 US6741289B1 (en) | 2000-10-31 | 2000-10-31 | Technique to stabilize the chrominance subcarrier generation in a line-locked digital video system |
PCT/US2001/050195 WO2002037862A2 (en) | 2000-10-31 | 2001-10-23 | A technique to stabilize the chrominance subcarrier generation in a line-locked digital video system |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002232805A1 true AU2002232805A1 (en) | 2002-05-15 |
Family
ID=24825686
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002232805A Abandoned AU2002232805A1 (en) | 2000-10-31 | 2001-10-23 | A technique to stabilize the chrominance subcarrier generation in a line-locked digital video system |
Country Status (7)
Country | Link |
---|---|
US (2) | US6741289B1 (en) |
JP (1) | JP2004533130A (en) |
CN (1) | CN100446575C (en) |
AU (1) | AU2002232805A1 (en) |
DE (1) | DE10197028T5 (en) |
TW (1) | TW546953B (en) |
WO (1) | WO2002037862A2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030090498A1 (en) * | 2001-11-13 | 2003-05-15 | Photela, Inc. | Method and apparatus for the creation of digital photo albums |
US7050097B2 (en) | 2001-11-13 | 2006-05-23 | Microsoft Corporation | Method and apparatus for the display of still images from image files |
TWI274474B (en) * | 2005-01-06 | 2007-02-21 | Univ Nat Sun Yat Sen | Phase-locked loop circuit and a method thereof |
US20080062312A1 (en) * | 2006-09-13 | 2008-03-13 | Jiliang Song | Methods and Devices of Using a 26 MHz Clock to Encode Videos |
US20080062311A1 (en) * | 2006-09-13 | 2008-03-13 | Jiliang Song | Methods and Devices to Use Two Different Clocks in a Television Digital Encoder |
CN103002194B (en) * | 2011-09-15 | 2016-04-27 | 无锡华润矽科微电子有限公司 | TV signal synchronous circuit and synchronous method thereof |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4370672A (en) * | 1980-09-24 | 1983-01-25 | Rca Corporation | Color subcarrier regenerator for slow down processor |
US4506175A (en) * | 1982-08-18 | 1985-03-19 | Rca Corporation | Digital phase comparator circuit producing sign and magnitude outputs |
US4639780A (en) * | 1985-04-01 | 1987-01-27 | Rca Corporation | Television synchronizing apparatus |
US4697207A (en) * | 1985-09-30 | 1987-09-29 | Ampex Corporation | System for generating a synchronizing signal in response to two timing reference signals |
US4718074A (en) | 1986-03-25 | 1988-01-05 | Sotas, Inc. | Dejitterizer method and apparatus |
US4694327A (en) * | 1986-03-28 | 1987-09-15 | Rca Corporation | Digital phase locked loop stabilization circuitry using a secondary digital phase locked loop |
US4989073A (en) * | 1987-11-25 | 1991-01-29 | Ampex Corporation | System for compensating timing errors during sampling of signals |
US4987491A (en) | 1989-01-20 | 1991-01-22 | Sanyo Electric Co., Ltd. | Jitter compensation circuit for processing jitter components of reproduced video signal |
US5132554A (en) | 1989-03-29 | 1992-07-21 | Sharp Kabushiki Kaisha | Clock generating apparatus |
GB2241620B (en) * | 1990-02-13 | 1994-11-30 | Matsushita Electric Ind Co Ltd | A pulse signal delay device |
JPH04306975A (en) | 1991-04-04 | 1992-10-29 | Matsushita Electric Ind Co Ltd | Jitter correcting circuit |
US5303061A (en) | 1991-06-18 | 1994-04-12 | Matsushita Electric Industrial Co., Ltd. | Apparatus for rejecting time base error of video signal |
JP2718311B2 (en) | 1991-12-27 | 1998-02-25 | 日本ビクター株式会社 | Time axis correction device |
JPH07177536A (en) | 1993-12-16 | 1995-07-14 | Pioneer Video Corp | Digital time base corrector |
KR970001636B1 (en) | 1994-01-20 | 1997-02-11 | 엘지전자 주식회사 | Time aixs compensation apparatus of image signal |
EP0756799B1 (en) | 1995-02-20 | 2001-06-13 | Koninklijke Philips Electronics N.V. | Device for deriving a clock signal from a synchronizing signal and a video recorder provided with the device |
US6014176A (en) | 1995-06-21 | 2000-01-11 | Sony Corporation | Automatic phase control apparatus for phase locking the chroma burst of analog and digital video data using a numerically controlled oscillator |
US5808691A (en) * | 1995-12-12 | 1998-09-15 | Cirrus Logic, Inc. | Digital carrier synthesis synchronized to a reference signal that is asynchronous with respect to a digital sampling clock |
KR0176806B1 (en) | 1995-12-29 | 1999-05-01 | 구자홍 | 2-picture of television |
US5796796A (en) | 1996-01-11 | 1998-08-18 | Industrial Technology Research Institute | Pointer adjustment jitter cancellation processor utilizing phase hopping and phase leaking techniques |
JPH10260663A (en) | 1997-01-14 | 1998-09-29 | Toshiba Corp | Jitter correcting circuit and plane display device |
US6363129B1 (en) | 1998-11-09 | 2002-03-26 | Broadcom Corporation | Timing recovery system for a multi-pair gigabit transceiver |
-
2000
- 2000-10-31 US US09/703,517 patent/US6741289B1/en not_active Ceased
-
2001
- 2001-10-23 DE DE10197028T patent/DE10197028T5/en not_active Ceased
- 2001-10-23 TW TW090126203A patent/TW546953B/en not_active IP Right Cessation
- 2001-10-23 JP JP2002540468A patent/JP2004533130A/en active Pending
- 2001-10-23 AU AU2002232805A patent/AU2002232805A1/en not_active Abandoned
- 2001-10-23 WO PCT/US2001/050195 patent/WO2002037862A2/en not_active Application Discontinuation
- 2001-10-23 CN CNB018183786A patent/CN100446575C/en not_active Expired - Fee Related
-
2005
- 2005-03-25 US US11/090,671 patent/USRE41399E1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CN1473440A (en) | 2004-02-04 |
WO2002037862A3 (en) | 2003-09-04 |
CN100446575C (en) | 2008-12-24 |
US6741289B1 (en) | 2004-05-25 |
DE10197028T5 (en) | 2004-04-29 |
TW546953B (en) | 2003-08-11 |
USRE41399E1 (en) | 2010-06-29 |
WO2002037862A2 (en) | 2002-05-10 |
JP2004533130A (en) | 2004-10-28 |
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