AU2002231256A1 - Method for detecting errors on parallel links - Google Patents

Method for detecting errors on parallel links

Info

Publication number
AU2002231256A1
AU2002231256A1 AU2002231256A AU3125602A AU2002231256A1 AU 2002231256 A1 AU2002231256 A1 AU 2002231256A1 AU 2002231256 A AU2002231256 A AU 2002231256A AU 3125602 A AU3125602 A AU 3125602A AU 2002231256 A1 AU2002231256 A1 AU 2002231256A1
Authority
AU
Australia
Prior art keywords
parallel links
detecting errors
errors
detecting
links
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002231256A
Inventor
Daniel R Cassiday
Thomas J. Moser
Randall R. Rettberg
David L. Satterfield
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2002231256A1 publication Critical patent/AU2002231256A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0023—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the signalling
    • H04L1/0032—Without explicit signalling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Error Detection And Correction (AREA)
AU2002231256A 2000-10-25 2001-10-22 Method for detecting errors on parallel links Abandoned AU2002231256A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/697,604 2000-10-25
US09/697,604 US6684363B1 (en) 2000-10-25 2000-10-25 Method for detecting errors on parallel links
PCT/US2001/050180 WO2002035708A2 (en) 2000-10-25 2001-10-22 Method for detecting errors on parallel links

Publications (1)

Publication Number Publication Date
AU2002231256A1 true AU2002231256A1 (en) 2002-05-06

Family

ID=24801774

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002231256A Abandoned AU2002231256A1 (en) 2000-10-25 2001-10-22 Method for detecting errors on parallel links

Country Status (3)

Country Link
US (1) US6684363B1 (en)
AU (1) AU2002231256A1 (en)
WO (1) WO2002035708A2 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6931581B1 (en) * 2000-10-25 2005-08-16 Sun Microsystems, Inc. Method for superimposing a sequence number in an error detection code in a data network
US20020144208A1 (en) * 2001-03-30 2002-10-03 International Business Machines Corporation Systems and methods for enabling computation of CRC' s N-bit at a time
US7047437B2 (en) * 2001-12-12 2006-05-16 Hewlett-Packard Development Company, L.P. Method and system for detecting dropped micro-packets
US7103822B2 (en) * 2001-12-21 2006-09-05 International Business Machines Corporation Method and apparatus for computing ‘N-bit at a time’ CRC's of data frames of lengths not multiple of N
DE10252230A1 (en) * 2002-11-11 2004-05-27 Robert Bosch Gmbh Data transfer method with error checking based on a signature imaging method, whereby a first signature is formed from inverted data, the uninverted data is then transmitted prior to being reinverted to permit signature checking
US7047475B2 (en) * 2003-02-04 2006-05-16 Hewlett-Packard Development Company, L.P. CRC encoding scheme for conveying status information
US7320094B2 (en) * 2003-07-22 2008-01-15 Intel Corporation Retraining derived clock receivers
US7320101B1 (en) * 2003-08-19 2008-01-15 Altera Corporation Fast parallel calculation of cyclic redundancy checks
US7613991B1 (en) 2003-08-19 2009-11-03 Altera Corporation Method and apparatus for concurrent calculation of cyclic redundancy checks
US7424040B2 (en) * 2004-05-07 2008-09-09 Ltas Holdings, Llc Communication systems and methods for transmitting data in parallel over multiple channels
US7484169B2 (en) * 2006-02-15 2009-01-27 General Electric Company Implicit message sequence numbering for locomotive remote control system wireless communications
US20090024900A1 (en) * 2007-07-18 2009-01-22 Cisco Technology, Inc. Cyclic redundancy checking in lane-based communications
JP4798164B2 (en) * 2008-04-02 2011-10-19 ソニー株式会社 Transmitting apparatus and method, receiving apparatus and method, and program
JP4399015B2 (en) * 2008-04-30 2010-01-13 株式会社東芝 Data conversion device, information recording device, error detection device, data conversion method, and error detection method
JP4985565B2 (en) * 2008-06-30 2012-07-25 富士通株式会社 Transmission / reception circuit, reception circuit, and control method for transmission / reception circuit
US8160104B2 (en) * 2008-08-11 2012-04-17 Research In Motion Ltd. System and method for communicating using an in-vehicle system
US8612693B2 (en) * 2009-03-19 2013-12-17 Qualcomm Incorporated Optimized transfer of packets in a resource constrained operating environment
US8301972B2 (en) * 2009-05-27 2012-10-30 Seagate Technology Llc Apparatus for correcting single bit insertion or deletion in a data payload with a checksum corrector
JP5674700B2 (en) * 2012-03-22 2015-02-25 株式会社東芝 Encoding apparatus, control method of encoding apparatus, and storage device
GB2519140B (en) * 2013-10-11 2021-03-10 Advanced Risc Mach Ltd Cumulative error detection in data transmission
US20210119730A1 (en) * 2020-09-18 2021-04-22 Intel Corporation Forward error correction and cyclic redundancy check mechanisms for latency-critical coherency and memory interconnects

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4720830A (en) * 1985-12-02 1988-01-19 Advanced Micro Devices, Inc. CRC calculation apparatus having reduced output bus size
US5321704A (en) * 1991-01-16 1994-06-14 Xilinx, Inc. Error detection structure and method using partial polynomial check
JP2998366B2 (en) * 1991-12-03 2000-01-11 富士通株式会社 CRC check method
DE69731932T2 (en) 1996-10-29 2006-02-16 International Business Machines Corp. Method and apparatus for two-stage CRC-32 calculation
JP3575215B2 (en) 1997-03-05 2004-10-13 株式会社日立製作所 Packet communication method and communication terminal device
US6038694A (en) * 1997-03-24 2000-03-14 Cisco Systems, Inc. Encoder for producing a checksum associated with changes to a frame in asynchronous transfer mode systems
US5935268A (en) * 1997-06-03 1999-08-10 Bay Networks, Inc. Method and apparatus for generating an error detection code for a modified data packet derived from an original data packet
US6252888B1 (en) 1998-04-14 2001-06-26 Nortel Networks Corporation Method and apparatus providing network communications between devices using frames with multiple formats
US6173431B1 (en) * 1998-07-01 2001-01-09 Motorola, Inc. Method and apparatus for transmitting and receiving information packets using multi-layer error detection
EP1035682A1 (en) 1999-03-06 2000-09-13 Deutsche Thomson-Brandt Gmbh Method and bus interface employing a memory in an integrated circuit for linking a bus with an application device

Also Published As

Publication number Publication date
WO2002035708A2 (en) 2002-05-02
WO2002035708A3 (en) 2003-06-19
US6684363B1 (en) 2004-01-27

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