AU2001283400A1 - Integrated circuit package including opening exposing portion of an ic - Google Patents

Integrated circuit package including opening exposing portion of an ic

Info

Publication number
AU2001283400A1
AU2001283400A1 AU2001283400A AU8340001A AU2001283400A1 AU 2001283400 A1 AU2001283400 A1 AU 2001283400A1 AU 2001283400 A AU2001283400 A AU 2001283400A AU 8340001 A AU8340001 A AU 8340001A AU 2001283400 A1 AU2001283400 A1 AU 2001283400A1
Authority
AU
Australia
Prior art keywords
integrated circuit
circuit package
package including
opening exposing
including opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001283400A
Inventor
Matthew M. Salatino
Patrick O. Weber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Authentec Inc
Original Assignee
Authentec Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22847029&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=AU2001283400(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Authentec Inc filed Critical Authentec Inc
Publication of AU2001283400A1 publication Critical patent/AU2001283400A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
AU2001283400A 2000-08-17 2001-08-16 Integrated circuit package including opening exposing portion of an ic Abandoned AU2001283400A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US22597200P 2000-08-17 2000-08-17
US60/225,972 2000-08-17
PCT/US2001/025627 WO2002015267A2 (en) 2000-08-17 2001-08-16 Integrated circuit package including opening exposing portion of an ic

Publications (1)

Publication Number Publication Date
AU2001283400A1 true AU2001283400A1 (en) 2002-02-25

Family

ID=22847029

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001283400A Abandoned AU2001283400A1 (en) 2000-08-17 2001-08-16 Integrated circuit package including opening exposing portion of an ic

Country Status (4)

Country Link
US (1) US6667439B2 (en)
EP (1) EP1352425A2 (en)
AU (1) AU2001283400A1 (en)
WO (1) WO2002015267A2 (en)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1220309A1 (en) * 2000-12-28 2002-07-03 STMicroelectronics S.r.l. Manufacturing method of an electronic device package
NL1019042C2 (en) * 2001-09-26 2003-03-27 Europ Semiconductor Assembly E Method for encapsulating a chip and / or other object.
FR2836281B1 (en) * 2002-02-20 2004-07-09 St Microelectronics Sa FLAT CONDUCTIVE GRILLE FOR SEMICONDUCTOR PACKAGE
US6817854B2 (en) * 2002-05-20 2004-11-16 Stmicroelectronics, Inc. Mold with compensating base
US7304362B2 (en) * 2002-05-20 2007-12-04 Stmicroelectronics, Inc. Molded integrated circuit package with exposed active area
US6815262B2 (en) * 2002-07-22 2004-11-09 Stmicroelectronics, Inc. Apparatus and method for attaching an integrated circuit sensor to a substrate
MY161401A (en) * 2002-09-10 2017-04-14 Ivi Smart Tech Inc Secure biometric verification of identity
CZ2005209A3 (en) * 2002-09-10 2005-12-14 Ivi Smart Technologies, Inc. Safe biometric verification of identity
WO2004093005A1 (en) * 2003-04-15 2004-10-28 Fujitsu Limited Information processor
US7064452B2 (en) * 2003-11-04 2006-06-20 Tai-Saw Technology Co., Ltd. Package structure with a retarding structure and method of making same
US7697729B2 (en) 2004-01-29 2010-04-13 Authentec, Inc. System for and method of finger initiated actions
US8918900B2 (en) * 2004-04-26 2014-12-23 Ivi Holdings Ltd. Smart card for passport, electronic passport, and method, system, and apparatus for authenticating person holding smart card or electronic passport
US7273767B2 (en) * 2004-12-31 2007-09-25 Carsem (M) Sdn. Bhd. Method of manufacturing a cavity package
US7309622B2 (en) * 2005-02-14 2007-12-18 Stats Chippac Ltd. Integrated circuit package system with heat sink
US7831070B1 (en) 2005-02-18 2010-11-09 Authentec, Inc. Dynamic finger detection mechanism for a fingerprint sensor
DE102005014427B4 (en) * 2005-03-24 2008-05-15 Infineon Technologies Ag Method for encapsulating a semiconductor device
US8231056B2 (en) 2005-04-08 2012-07-31 Authentec, Inc. System for and method of protecting an integrated circuit from over currents
US7495325B2 (en) * 2005-05-05 2009-02-24 Stats Chippac, Ltd. Optical die-down quad flat non-leaded package
US7505613B2 (en) * 2005-07-12 2009-03-17 Atrua Technologies, Inc. System for and method of securing fingerprint biometric systems against fake-finger spoofing
US7940249B2 (en) * 2005-11-01 2011-05-10 Authentec, Inc. Devices using a metal layer with an array of vias to reduce degradation
US7885436B2 (en) * 2006-07-13 2011-02-08 Authentec, Inc. System for and method of assigning confidence values to fingerprint minutiae points
DE102007038515A1 (en) * 2006-11-09 2008-05-15 Robert Bosch Gmbh Device for passivating a component and method for producing the device
US8252615B2 (en) 2006-12-22 2012-08-28 Stats Chippac Ltd. Integrated circuit package system employing mold flash prevention technology
US20100131414A1 (en) * 2007-03-14 2010-05-27 Gavin Randall Tame Personal identification device for secure transactions
US8852986B2 (en) * 2007-05-16 2014-10-07 Stats Chippac Ltd. Integrated circuit package system employing resilient member mold system technology
US7691682B2 (en) 2007-06-26 2010-04-06 Micron Technology, Inc. Build-up-package for integrated circuit devices, and methods of making same
US8138027B2 (en) * 2008-03-07 2012-03-20 Stats Chippac, Ltd. Optical semiconductor device having pre-molded leadframe with window and method therefor
TWI437944B (en) * 2009-02-06 2014-05-11 Egis Technology Inc Electronic apparatus with hidden biometrics sensor
US8035235B2 (en) * 2009-09-15 2011-10-11 Stats Chippac Ltd. Integrated circuit packaging system with package-on-package and method of manufacture thereof
US8421890B2 (en) 2010-01-15 2013-04-16 Picofield Technologies, Inc. Electronic imager using an impedance sensor grid array and method of making
US8866347B2 (en) 2010-01-15 2014-10-21 Idex Asa Biometric image sensing
US8791792B2 (en) 2010-01-15 2014-07-29 Idex Asa Electronic imager using an impedance sensor grid array mounted on or about a switch and method of making
US8743082B2 (en) 2010-10-18 2014-06-03 Qualcomm Mems Technologies, Inc. Controller architecture for combination touch, handwriting and fingerprint sensor
KR101160681B1 (en) 2011-10-19 2012-06-28 배경덕 Method, mobile communication terminal and computer-readable recording medium for operating specific function when activaing of mobile communication terminal
US8982577B1 (en) * 2012-02-17 2015-03-17 Amkor Technology, Inc. Electronic component package having bleed channel structure and method
US9059144B2 (en) 2012-02-23 2015-06-16 Freescale Semiconductor, Inc. Method for forming die assembly with heat spreader
EP2958053A1 (en) 2012-04-10 2015-12-23 Idex Asa Biometric sensing
US9024910B2 (en) 2012-04-23 2015-05-05 Qualcomm Mems Technologies, Inc. Touchscreen with bridged force-sensitive resistors
US8912051B1 (en) * 2012-08-01 2014-12-16 Amkor Technology, Inc. Method for controlling molding compound geometry around a semiconductor die
US20140085601A1 (en) * 2012-09-25 2014-03-27 Google Inc. Contact lens having a chip integrated into a polymer substrate and method of manufacture
CN104037149A (en) * 2013-03-05 2014-09-10 飞思卡尔半导体公司 Lead frame and substrate semiconductor package
US20150091588A1 (en) * 2013-10-01 2015-04-02 Synaptics Incorporated Compact and durable button with biometric sensor having improved sensor signal production and method for making same
US9297713B2 (en) 2014-03-19 2016-03-29 Freescale Semiconductor,Inc. Pressure sensor device with through silicon via
US9362479B2 (en) 2014-07-22 2016-06-07 Freescale Semiconductor, Inc. Package-in-package semiconductor sensor device
US9740908B2 (en) * 2015-11-09 2017-08-22 Contek Life Science Co., Ltd. Capacitive fingerprint sensor and package method thereof
US9792516B2 (en) 2016-01-26 2017-10-17 Next Biometrics Group Asa Flexible card with fingerprint sensor
US10497587B1 (en) * 2018-06-13 2019-12-03 Infineon Technologies Ag Ion manipulation methods and related apparatuses and systems for semiconductor encapsulation materials
JP7446125B2 (en) * 2020-02-21 2024-03-08 エイブリック株式会社 Semiconductor device and its manufacturing method

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01123447A (en) * 1987-11-07 1989-05-16 Sanken Electric Co Ltd Manufacture of resin sealed electronic part
US5264393A (en) 1988-11-25 1993-11-23 Fuji Photo Film Co., Ltd. Solid state image pickup device and method of manufacturing the same
JPH05203522A (en) 1992-01-23 1993-08-10 Mitsubishi Electric Corp Pressure sensor for molded package semiconductor and manufacture thereof
US5491362A (en) 1992-04-30 1996-02-13 Vlsi Technology, Inc. Package structure having accessible chip
KR960009089B1 (en) 1993-03-04 1996-07-10 문정환 Mold for package molding and plastic charge-coupled device and the manufacturing method using the mold
US5420752A (en) 1993-08-18 1995-05-30 Lsi Logic Corporation GPT system for encapsulating an integrated circuit package
KR970005706B1 (en) * 1994-01-24 1997-04-19 금성일렉트론 주식회사 Ccd and the manufacturing method
US5508556A (en) * 1994-09-02 1996-04-16 Motorola, Inc. Leaded semiconductor device having accessible power supply pad terminals
JP2611748B2 (en) * 1995-01-25 1997-05-21 日本電気株式会社 Resin-sealed semiconductor device
US5682673A (en) 1995-04-17 1997-11-04 Ipac, Inc. Method for forming encapsulated IC packages
US5744084A (en) * 1995-07-24 1998-04-28 Lsi Logic Corporation Method of improving molding of an overmolded package body on a substrate
US5956415A (en) 1996-01-26 1999-09-21 Harris Corporation Enhanced security fingerprint sensor package and related methods
JP2928190B2 (en) * 1997-04-09 1999-08-03 九州日本電気株式会社 Taping lead frame
SG67384A1 (en) 1997-04-10 1999-09-21 Texas Instr Singapore Pte Ltd Integrated circuit package and flat plate molding process for integrated circuit package
US5811799A (en) 1997-07-31 1998-09-22 Wu; Liang-Chung Image sensor package having a wall with a sealed cover
US6143981A (en) * 1998-06-24 2000-11-07 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6146921A (en) 1998-09-16 2000-11-14 Intel Corporation Cavity mold cap BGA package with post mold thermally conductive epoxy attach heat sink

Also Published As

Publication number Publication date
WO2002015267A2 (en) 2002-02-21
EP1352425A2 (en) 2003-10-15
WO2002015267A3 (en) 2003-08-07
US6667439B2 (en) 2003-12-23
US20020088632A1 (en) 2002-07-11

Similar Documents

Publication Publication Date Title
AU2001283400A1 (en) Integrated circuit package including opening exposing portion of an ic
AU2001284962A1 (en) Methods and apparatus for making integrated circuit package including opening exposing portion of the ic
AU2001232248A1 (en) Semiconductor integrated circuit device
AU2001249879A1 (en) Method of forming an integrated circuit package at a wafer level
EP1176637A4 (en) Semiconductor integrated circuit and manufacture thereof
SG95603A1 (en) High performance integrated circuit chip package
IL147177A0 (en) Method of modifying an integrated circuit
GB9929084D0 (en) Modification of integrated circuits
EP1220450B8 (en) Semiconductor integrated circuit
EP1391991A4 (en) Integrated circuit device
IL133453A0 (en) Methods for producing packaged integrated circuit devices and packaged integrated circuit devices produced thereby
AU2002318809A1 (en) Integrated circuit device
AU2003291199A1 (en) Package having exposed integrated circuit device
GB2372601B (en) Semiconductor integrated circuit
AU1986800A (en) Method for protecting an integrated circuit chip
AU3793099A (en) Functional verification of integrated circuit designs
AU2001235923A1 (en) An integrated circuit chip for use as an electronic thermostat
AU2002365569A1 (en) Connection package for high-speed integrated circuit
GB0117316D0 (en) A method of manufacturing an integrated circuit package
GB0117310D0 (en) A method of manufacturing an integrated circuit package and an integrated circuit package
AU2002352861A1 (en) Packaged integrated circuit and method therefor
SG89410A1 (en) Manufacturing method of semiconductor integrated circuit device
GB0215527D0 (en) Integrated circuit chip and mounting structure
GB0115081D0 (en) A method of testing an integrated circuit
GB2370687B (en) An integrated circuit package