AU2001283383A1 - High speed multiple-bit flip-flop - Google Patents

High speed multiple-bit flip-flop

Info

Publication number
AU2001283383A1
AU2001283383A1 AU2001283383A AU8338301A AU2001283383A1 AU 2001283383 A1 AU2001283383 A1 AU 2001283383A1 AU 2001283383 A AU2001283383 A AU 2001283383A AU 8338301 A AU8338301 A AU 8338301A AU 2001283383 A1 AU2001283383 A1 AU 2001283383A1
Authority
AU
Australia
Prior art keywords
flop
high speed
bit flip
speed multiple
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001283383A
Inventor
Joseph I. Chamdani
Renu Raman
Gajendra P. Singh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2001283383A1 publication Critical patent/AU2001283383A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
AU2001283383A 2000-08-14 2001-08-14 High speed multiple-bit flip-flop Abandoned AU2001283383A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09638338 2000-08-14
US09/638,338 US6420903B1 (en) 2000-08-14 2000-08-14 High speed multiple-bit flip-flop
PCT/US2001/025553 WO2002015398A2 (en) 2000-08-14 2001-08-14 High speed multiple-bit flip-flop for multithreading

Publications (1)

Publication Number Publication Date
AU2001283383A1 true AU2001283383A1 (en) 2002-02-25

Family

ID=24559628

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001283383A Abandoned AU2001283383A1 (en) 2000-08-14 2001-08-14 High speed multiple-bit flip-flop

Country Status (3)

Country Link
US (2) US6420903B1 (en)
AU (1) AU2001283383A1 (en)
WO (1) WO2002015398A2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6507862B1 (en) * 1999-05-11 2003-01-14 Sun Microsystems, Inc. Switching method in a multi-threaded processor
US6542991B1 (en) 1999-05-11 2003-04-01 Sun Microsystems, Inc. Multiple-thread processor with single-thread interface shared among threads
US6420903B1 (en) * 2000-08-14 2002-07-16 Sun Microsystems, Inc. High speed multiple-bit flip-flop
US6850093B1 (en) * 2003-07-28 2005-02-01 Hewlett-Packard Development Company, L.P. Circuit and method for improving noise tolerance in multi-threaded memory circuits
US20060212853A1 (en) * 2005-03-18 2006-09-21 Marvell World Trade Ltd. Real-time control apparatus having a multi-thread processor
US8195922B2 (en) * 2005-03-18 2012-06-05 Marvell World Trade, Ltd. System for dynamically allocating processing time to multiple threads
EP2169557A4 (en) * 2007-06-20 2010-08-04 Fujitsu Ltd Processor, tlb control method, tlb control program, and information processor
WO2010058248A1 (en) * 2008-11-24 2010-05-27 Freescale Semiconductor, Inc. Logic built-in self-test system and method for applying a logic built-in self-test to a device under test
FR2962567B1 (en) * 2010-07-12 2013-04-26 Bull Sas METHOD FOR OPTIMIZING MEMORY ACCESS, WHEN RE-EXECUTING AN APPLICATION, IN A MICROPROCESSOR COMPRISING SEVERAL LOGICAL HEARTS AND COMPUTER PROGRAM USING SUCH A METHOD
CN102495726B (en) * 2011-11-15 2015-05-20 无锡德思普科技有限公司 Opportunity multi-threading method and processor
KR102116722B1 (en) * 2013-10-16 2020-06-01 삼성전자 주식회사 Semiconductor circuit and semiconductor system

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2985554B2 (en) * 1993-02-03 1999-12-06 日本電気株式会社 Memory circuit
US5655113A (en) * 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
US5424654A (en) 1994-09-22 1995-06-13 Kaplinsky; Cecil H. Programmable macrocell circuit
US5426380A (en) 1994-09-30 1995-06-20 Sun Microsystems, Inc. High speed processing flip-flop
US5646557A (en) * 1995-07-31 1997-07-08 International Business Machines Corporation Data processing system and method for improving performance of domino-type logic using multiphase clocks
US6211713B1 (en) * 1999-04-27 2001-04-03 International Business Machines Corporation Adjustable feedback for CMOS latches
US6341347B1 (en) * 1999-05-11 2002-01-22 Sun Microsystems, Inc. Thread switch logic in a multiple-thread processor
US6507862B1 (en) * 1999-05-11 2003-01-14 Sun Microsystems, Inc. Switching method in a multi-threaded processor
US6351808B1 (en) * 1999-05-11 2002-02-26 Sun Microsystems, Inc. Vertically and horizontally threaded processor with multidimensional storage for storing thread data
US6420903B1 (en) * 2000-08-14 2002-07-16 Sun Microsystems, Inc. High speed multiple-bit flip-flop
US6433603B1 (en) * 2000-08-14 2002-08-13 Sun Microsystems, Inc. Pulse-based high speed flop circuit

Also Published As

Publication number Publication date
US6420903B1 (en) 2002-07-16
WO2002015398A3 (en) 2002-06-20
WO2002015398A2 (en) 2002-02-21
US7120915B1 (en) 2006-10-10

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