AU2001283286A1 - Logic system with configurable interface - Google Patents

Logic system with configurable interface

Info

Publication number
AU2001283286A1
AU2001283286A1 AU2001283286A AU8328601A AU2001283286A1 AU 2001283286 A1 AU2001283286 A1 AU 2001283286A1 AU 2001283286 A AU2001283286 A AU 2001283286A AU 8328601 A AU8328601 A AU 8328601A AU 2001283286 A1 AU2001283286 A1 AU 2001283286A1
Authority
AU
Australia
Prior art keywords
logic system
configurable interface
configurable
interface
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001283286A
Inventor
Michael J. Meyer
Lisa Robinson
Geert P Rosseel
Jay Tomlinson
Drew Eric Wingard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sonics Inc
Original Assignee
Sonics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sonics Inc filed Critical Sonics Inc
Publication of AU2001283286A1 publication Critical patent/AU2001283286A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00—Details relating to the type of the circuit
    • G06F2115/08—Intellectual property [IP] blocks or IP cores
AU2001283286A 2000-08-08 2001-08-08 Logic system with configurable interface Abandoned AU2001283286A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09634045 2000-08-08
US09/634,045 US7325221B1 (en) 2000-08-08 2000-08-08 Logic system with configurable interface
PCT/US2001/025123 WO2002013024A1 (en) 2000-08-08 2001-08-08 Logic system with configurable interface

Publications (1)

Publication Number Publication Date
AU2001283286A1 true AU2001283286A1 (en) 2002-02-18

Family

ID=24542215

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001283286A Abandoned AU2001283286A1 (en) 2000-08-08 2001-08-08 Logic system with configurable interface

Country Status (4)

Country Link
US (1) US7325221B1 (en)
EP (1) EP1325419A4 (en)
AU (1) AU2001283286A1 (en)
WO (1) WO2002013024A1 (en)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6182183B1 (en) * 1998-11-13 2001-01-30 Sonics, Inc. Communications system and method with multilevel connection identification
US7254603B2 (en) 2002-05-03 2007-08-07 Sonics, Inc. On-chip inter-network performance optimization using configurable performance parameters
US7194566B2 (en) 2002-05-03 2007-03-20 Sonics, Inc. Communication system and method with configurable posting points
US7356633B2 (en) 2002-05-03 2008-04-08 Sonics, Inc. Composing on-chip interconnects with configurable interfaces
EP1426885B1 (en) * 2002-12-04 2017-01-04 Mentor Graphics Corporation Generation of a multiplicity of parameterised HDLs
US7603441B2 (en) 2002-12-27 2009-10-13 Sonics, Inc. Method and apparatus for automatic configuration of multiple on-chip interconnects
US9087036B1 (en) 2004-08-12 2015-07-21 Sonics, Inc. Methods and apparatuses for time annotated transaction level modeling
US7665069B2 (en) * 2003-10-31 2010-02-16 Sonics, Inc. Method and apparatus for establishing a quality of service model
US8504992B2 (en) * 2003-10-31 2013-08-06 Sonics, Inc. Method and apparatus for establishing a quality of service model
US7694249B2 (en) * 2005-10-07 2010-04-06 Sonics, Inc. Various methods and apparatuses for estimating characteristics of an electronic system's design
US8868397B2 (en) * 2006-11-20 2014-10-21 Sonics, Inc. Transaction co-validation across abstraction layers
US8020124B2 (en) * 2006-11-20 2011-09-13 Sonics, Inc. Various methods and apparatuses for cycle accurate C-models of components
US20080120082A1 (en) * 2006-11-20 2008-05-22 Herve Jacques Alexanian Transaction Co-Validation Across Abstraction Layers
US7814243B2 (en) * 2007-06-01 2010-10-12 Sonics, Inc. Shared storage for multi-threaded ordered queues in an interconnect
US8108648B2 (en) * 2007-06-25 2012-01-31 Sonics, Inc. Various methods and apparatus for address tiling
US9292436B2 (en) * 2007-06-25 2016-03-22 Sonics, Inc. Various methods and apparatus to support transactions whose data address sequence within that transaction crosses an interleaved channel address boundary
US8438320B2 (en) * 2007-06-25 2013-05-07 Sonics, Inc. Various methods and apparatus for address tiling and channel interleaving throughout the integrated system
US20110213949A1 (en) * 2010-03-01 2011-09-01 Sonics, Inc. Methods and apparatus for optimizing concurrency in multiple core systems
US8972995B2 (en) 2010-08-06 2015-03-03 Sonics, Inc. Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads
US8601288B2 (en) 2010-08-31 2013-12-03 Sonics, Inc. Intelligent power controller
US8438306B2 (en) 2010-11-02 2013-05-07 Sonics, Inc. Apparatus and methods for on layer concurrency in an integrated circuit
US9405700B2 (en) 2010-11-04 2016-08-02 Sonics, Inc. Methods and apparatus for virtualization in an integrated circuit
US8711867B2 (en) 2011-08-26 2014-04-29 Sonics, Inc. Credit flow control scheme in a router with flexible link widths utilizing minimal storage
US8798038B2 (en) 2011-08-26 2014-08-05 Sonics, Inc. Efficient header generation in packetized protocols for flexible system on chip architectures
US8868941B2 (en) 2011-09-19 2014-10-21 Sonics, Inc. Apparatus and methods for an interconnect power manager
US9910454B2 (en) 2012-06-07 2018-03-06 Sonics, Inc. Synchronizer with a timing closure enhancement
US10152112B2 (en) 2015-06-10 2018-12-11 Sonics, Inc. Power manager with a power switch arbitrator

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274783A (en) 1991-06-28 1993-12-28 Digital Equipment Corporation SCSI interface employing bus extender and auxiliary bus
US5634081A (en) 1994-03-01 1997-05-27 Adaptec, Inc. System for starting and completing a data transfer for a subsequently received autotransfer command after receiving a first SCSI data transfer command that is not autotransfer
US6052773A (en) * 1995-02-10 2000-04-18 Massachusetts Institute Of Technology DPGA-coupled microprocessors
US5794062A (en) * 1995-04-17 1998-08-11 Ricoh Company Ltd. System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization
SE506955C2 (en) 1995-07-06 1998-03-09 Ericsson Telefon Ab L M ATM flow control
US5748914A (en) 1995-10-19 1998-05-05 Rambus, Inc. Protocol for communication with dynamic memory
US6023565A (en) * 1996-03-29 2000-02-08 Xilinx, Inc. Method for configuring circuits over a data communications link
US5878045A (en) 1996-04-26 1999-03-02 Motorola, Inc. Method and apparatus for converting data streams in a cell based communications system
JPH10171750A (en) 1996-12-09 1998-06-26 Fujitsu Ltd Inter-memory data transfer system
US6002692A (en) 1996-12-30 1999-12-14 Hyundai Electronics America Line interface unit for adapting broad bandwidth network to lower bandwidth network fabric
US6115823A (en) 1997-06-17 2000-09-05 Amphus, Inc. System and method for task performance based dynamic distributed power management in a computer system and design method therefor
US6078736A (en) * 1997-08-28 2000-06-20 Xilinx, Inc. Method of designing FPGAs for dynamically reconfigurable computing
JPH1173258A (en) 1997-08-28 1999-03-16 Toshiba Corp Low power consumption bus structure and method for controlling the same and system for synthesizing low power consumption bus structure and method therefor and portable information equipment
US5948089A (en) 1997-09-05 1999-09-07 Sonics, Inc. Fully-pipelined fixed-latency communications system with a real time dynamic bandwidth allocation
US6147890A (en) * 1997-12-30 2000-11-14 Kawasaki Steel Corporation FPGA with embedded content-addressable memory
US6005412A (en) 1998-04-08 1999-12-21 S3 Incorporated AGP/DDR interfaces for full swing and reduced swing (SSTL) signals on an integrated circuit chip
AU1581100A (en) 1998-10-14 2000-05-01 Arc Cores Limited Method and apparatus for managing the configuration and functionality of a semiconductor design
US6182183B1 (en) 1998-11-13 2001-01-30 Sonics, Inc. Communications system and method with multilevel connection identification
US6298472B1 (en) * 1999-05-07 2001-10-02 Chameleon Systems, Inc. Behavioral silicon construct architecture and mapping
US6493776B1 (en) 1999-08-12 2002-12-10 Mips Technologies, Inc. Scalable on-chip system bus
US6487709B1 (en) * 2000-02-09 2002-11-26 Xilinx, Inc. Run-time routing for programmable logic devices
US6330225B1 (en) 2000-05-26 2001-12-11 Sonics, Inc. Communication system and method for different quality of service guarantees for different data flows
US6510546B1 (en) * 2000-07-13 2003-01-21 Xilinx, Inc. Method and apparatus for pre-routing dynamic run-time reconfigurable logic cores
US6578117B2 (en) 2001-10-12 2003-06-10 Sonics, Inc. Method and apparatus for scheduling requests using ordered stages of scheduling criteria

Also Published As

Publication number Publication date
EP1325419A4 (en) 2006-04-19
EP1325419A1 (en) 2003-07-09
WO2002013024A1 (en) 2002-02-14
US7325221B1 (en) 2008-01-29

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