AU2001251227A1 - Dsp execution unit for efficient alternate modes of operation - Google Patents

Dsp execution unit for efficient alternate modes of operation

Info

Publication number
AU2001251227A1
AU2001251227A1 AU2001251227A AU5122701A AU2001251227A1 AU 2001251227 A1 AU2001251227 A1 AU 2001251227A1 AU 2001251227 A AU2001251227 A AU 2001251227A AU 5122701 A AU5122701 A AU 5122701A AU 2001251227 A1 AU2001251227 A1 AU 2001251227A1
Authority
AU
Australia
Prior art keywords
execution unit
alternate modes
dsp execution
efficient alternate
efficient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001251227A
Inventor
Bradley C. Aldrich
Jose Fridman
Paul Meyer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Analog Devices Inc
Intel Corp
Original Assignee
Analog Devices Inc
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc, Intel Corp filed Critical Analog Devices Inc
Publication of AU2001251227A1 publication Critical patent/AU2001251227A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/53Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5324Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel partitioned, i.e. using repetitively a smaller parallel parallel multiplier or using an array of such smaller multipliers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/7857Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) using interleaved memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/509Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3812Devices capable of handling different types of numbers
    • G06F2207/382Reconfigurable for different fixed word lengths
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3828Multigauge devices, i.e. capable of handling packed numbers without unpacking them
AU2001251227A 2000-03-31 2001-04-02 Dsp execution unit for efficient alternate modes of operation Abandoned AU2001251227A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/541,116 2000-03-31
US09/541,116 US6725360B1 (en) 2000-03-31 2000-03-31 Selectively processing different size data in multiplier and ALU paths in parallel
PCT/US2001/010602 WO2001075635A2 (en) 2000-03-31 2001-04-02 Dsp execution unit for efficient alternate modes of operation

Publications (1)

Publication Number Publication Date
AU2001251227A1 true AU2001251227A1 (en) 2001-10-15

Family

ID=24158236

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001251227A Abandoned AU2001251227A1 (en) 2000-03-31 2001-04-02 Dsp execution unit for efficient alternate modes of operation

Country Status (6)

Country Link
US (2) US6725360B1 (en)
EP (2) EP2296093A3 (en)
CN (1) CN100461152C (en)
AU (1) AU2001251227A1 (en)
TW (1) TW552523B (en)
WO (1) WO2001075635A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040193668A1 (en) * 2003-03-31 2004-09-30 Patrick Devaney Virtual double width accumulators for vector processing
JP4690115B2 (en) * 2005-05-31 2011-06-01 株式会社リコー Control apparatus and image processing apparatus
US8805916B2 (en) * 2009-03-03 2014-08-12 Altera Corporation Digital signal processing circuitry with redundancy and bidirectional data paths
US8549055B2 (en) 2009-03-03 2013-10-01 Altera Corporation Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
US11036512B2 (en) * 2019-09-23 2021-06-15 Microsoft Technology Licensing, Llc Systems and methods for processing instructions having wide immediate operands

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4161784A (en) * 1978-01-05 1979-07-17 Honeywell Information Systems, Inc. Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands
US4748585A (en) * 1985-12-26 1988-05-31 Chiarulli Donald M Processor utilizing reconfigurable process segments to accomodate data word length
US4953119A (en) * 1989-01-27 1990-08-28 Hughes Aircraft Company Multiplier circuit with selectively interconnected pipelined multipliers for selectively multiplication of fixed and floating point numbers
FR2693287B1 (en) 1992-07-03 1994-09-09 Sgs Thomson Microelectronics Sa Method for carrying out numerical calculations, and arithmetic unit for implementing this method.
DE69424626T2 (en) 1993-11-23 2001-01-25 Hewlett Packard Co Parallel data processing in a single processor
US5517436A (en) 1994-06-07 1996-05-14 Andreas; David C. Digital signal processor for audio applications
JPH0877002A (en) * 1994-08-31 1996-03-22 Sony Corp Parallel processor device
US5717923A (en) 1994-11-03 1998-02-10 Intel Corporation Method and apparatus for dynamically customizing electronic information to individual end users
US6643765B1 (en) * 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
US6247036B1 (en) 1996-01-22 2001-06-12 Infinite Technology Corp. Processor with reconfigurable arithmetic data path
US6092094A (en) * 1996-04-17 2000-07-18 Advanced Micro Devices, Inc. Execute unit configured to selectably interpret an operand as multiple operands or as a single operand
US5933797A (en) 1997-02-28 1999-08-03 Telefonaktiebolaget Lm Ericsson (Publ) Adaptive dual filter echo cancellation
US6044448A (en) 1997-12-16 2000-03-28 S3 Incorporated Processor having multiple datapath instances
US6418527B1 (en) * 1998-10-13 2002-07-09 Motorola, Inc. Data processor instruction system for grouping instructions with or without a common prefix and data processing system that uses two or more instruction grouping methods
US6370630B1 (en) * 1999-03-19 2002-04-09 Ati International Srl Method and apparatus for controlling data flow in a data processor
KR100325430B1 (en) * 1999-10-11 2002-02-25 윤종용 Data processing apparatus and method for performing different word-length arithmetic operations

Also Published As

Publication number Publication date
EP2296093A3 (en) 2011-12-14
TW552523B (en) 2003-09-11
WO2001075635A9 (en) 2002-12-19
EP1402394A2 (en) 2004-03-31
US6725360B1 (en) 2004-04-20
US20040199558A1 (en) 2004-10-07
US7047271B2 (en) 2006-05-16
WO2001075635A3 (en) 2003-12-31
WO2001075635A2 (en) 2001-10-11
CN1973283A (en) 2007-05-30
CN100461152C (en) 2009-02-11
EP2296093A2 (en) 2011-03-16

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