AU2001245519A1 - Processing architecture having an array bounds check capability - Google Patents

Processing architecture having an array bounds check capability

Info

Publication number
AU2001245519A1
AU2001245519A1 AU2001245519A AU4551901A AU2001245519A1 AU 2001245519 A1 AU2001245519 A1 AU 2001245519A1 AU 2001245519 A AU2001245519 A AU 2001245519A AU 4551901 A AU4551901 A AU 4551901A AU 2001245519 A1 AU2001245519 A1 AU 2001245519A1
Authority
AU
Australia
Prior art keywords
processing architecture
bounds check
array bounds
check capability
capability
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001245519A
Inventor
Ashley Saulsbury
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22690256&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=AU2001245519(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2001245519A1 publication Critical patent/AU2001245519A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/14—Layer or component removable to expose adhesive
    • Y10T428/149—Sectional layer removable

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
AU2001245519A 2000-03-08 2001-03-08 Processing architecture having an array bounds check capability Abandoned AU2001245519A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US18773900P 2000-03-08 2000-03-08
US60187739 2000-03-08
PCT/US2001/007384 WO2001067238A1 (en) 2000-03-08 2001-03-08 Processing architecture having an array bounds check capability

Publications (1)

Publication Number Publication Date
AU2001245519A1 true AU2001245519A1 (en) 2001-09-17

Family

ID=22690256

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001245519A Abandoned AU2001245519A1 (en) 2000-03-08 2001-03-08 Processing architecture having an array bounds check capability

Country Status (8)

Country Link
US (1) US6892295B2 (en)
EP (1) EP1261914B1 (en)
JP (1) JP2003526155A (en)
KR (1) KR20030016234A (en)
AU (1) AU2001245519A1 (en)
DE (1) DE60115609T2 (en)
HK (1) HK1048538B (en)
WO (1) WO2001067238A1 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6408383B1 (en) * 2000-05-04 2002-06-18 Sun Microsystems, Inc. Array access boundary check by executing BNDCHK instruction with comparison specifiers
US20030023958A1 (en) * 2001-07-17 2003-01-30 Patel Mukesh K. Intermediate language accelerator chip
US7558816B2 (en) 2001-11-21 2009-07-07 Sun Microsystems, Inc. Methods and apparatus for performing pixel average operations
US7013321B2 (en) 2001-11-21 2006-03-14 Sun Microsystems, Inc. Methods and apparatus for performing parallel integer multiply accumulate operations
GB2393284B (en) * 2002-09-17 2007-01-03 Micron Europe Ltd Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
US7574466B2 (en) 2003-04-23 2009-08-11 Micron Technology, Inc. Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
US7454451B2 (en) 2003-04-23 2008-11-18 Micron Technology, Inc. Method for finding local extrema of a set of values for a parallel processing element
US7447720B2 (en) 2003-04-23 2008-11-04 Micron Technology, Inc. Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
US7890735B2 (en) * 2004-08-30 2011-02-15 Texas Instruments Incorporated Multi-threading processors, integrated circuit devices, systems, and processes of operation and manufacture
US7552302B1 (en) 2004-09-14 2009-06-23 Azul Systems, Inc. Ordering operation
US20060271510A1 (en) * 2005-05-25 2006-11-30 Terracotta, Inc. Database Caching and Invalidation using Database Provided Facilities for Query Dependency Analysis
US7577801B1 (en) 2005-12-06 2009-08-18 Azul Systems, Inc. Array access
US8464030B2 (en) * 2010-04-09 2013-06-11 International Business Machines Corporation Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bits
WO2012134122A2 (en) * 2011-03-26 2012-10-04 Samsung Electronics Co., Ltd. Method and apparatus for eliminating partially redundant array bounds checks in an embedded compiler
CN103946795B (en) * 2011-12-14 2018-05-15 英特尔公司 For generating the systems, devices and methods for circulating alignment and counting or circulating alignment mask
US10324728B2 (en) 2015-12-17 2019-06-18 International Business Machines Corporation Lightweight interrupts for condition checking
US9875104B2 (en) * 2016-02-03 2018-01-23 Google Llc Accessing data in multi-dimensional tensors

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4293907A (en) 1978-12-29 1981-10-06 Bell Telephone Laboratories, Incorporated Data processing apparatus having op-code extension register
US4542456A (en) 1982-04-28 1985-09-17 At&T Bell Laboratories Method and apparatus for performing range checks
EP0540155A3 (en) * 1991-10-29 1993-07-21 Advanced Micro Devices, Inc. Digital limit checking system
US5687338A (en) 1994-03-01 1997-11-11 Intel Corporation Method and apparatus for maintaining a macro instruction for refetching in a pipelined processor
WO1997027544A1 (en) * 1996-01-24 1997-07-31 Sun Microsystems, Inc. Processor with accelerated array access bounds checking
US5900011A (en) 1996-07-01 1999-05-04 Sun Microsystems, Inc. Integrated processor/memory device with victim data cache
US5909572A (en) 1996-12-02 1999-06-01 Compaq Computer Corp. System and method for conditionally moving an operand from a source register to a destination register
US5933650A (en) 1997-10-09 1999-08-03 Mips Technologies, Inc. Alignment and ordering of vector elements for single instruction multiple data processing
US6085208A (en) * 1997-10-23 2000-07-04 Advanced Micro Devices, Inc. Leading one prediction unit for normalizing close path subtraction results within a floating point arithmetic unit
US6035390A (en) * 1998-01-12 2000-03-07 International Business Machines Corporation Method and apparatus for generating and logically combining less than (LT), greater than (GT), and equal to (EQ) condition code bits concurrently with the execution of an arithmetic or logical operation

Also Published As

Publication number Publication date
WO2001067238A1 (en) 2001-09-13
EP1261914B1 (en) 2005-12-07
JP2003526155A (en) 2003-09-02
US6892295B2 (en) 2005-05-10
EP1261914A1 (en) 2002-12-04
HK1048538A1 (en) 2003-04-04
DE60115609D1 (en) 2006-01-12
HK1048538B (en) 2006-08-04
DE60115609T2 (en) 2006-08-17
US20020029332A1 (en) 2002-03-07
KR20030016234A (en) 2003-02-26

Similar Documents

Publication Publication Date Title
AU2001294073A1 (en) Processor architecture
AU2001295768A1 (en) Processor architecture
AU2001249122A1 (en) Processing architecture having field swapping capability
AU2001291200A1 (en) Micro-laser
AU2001227849A1 (en) Ultrasonic imager
GB2365595B (en) Array type processor
AU2001249323A1 (en) Nanocylinder arrays
AU2001294960A1 (en) Second order microphone array
AU2001286408A1 (en) Sonar scanner
AU2002232910A1 (en) Combinatorial optical processor
AU2001230662A1 (en) Array antenna calibration
AU2001228692A1 (en) Signal processing technique
AU3567700A (en) Signal processing
AU2001250419A1 (en) Planar array antenna
AU2001245519A1 (en) Processing architecture having an array bounds check capability
AU2001294835A1 (en) Video processing
AU4262601A (en) Image processing
AU2001288233A1 (en) Flexible preamble processing
AU2001282937A1 (en) Spectrophotometer system having active pixel array
AU5899201A (en) Antenna arrangement
AU2001260986A1 (en) Two-dimensional micro-mirror array enhancements
AU2001275802A1 (en) Radiation sensor
AU2000267447A1 (en) Microphone array system
AU2001237641A1 (en) Chemical sensor array systems
AU2000241402A1 (en) Securing an enclosed area