AU2001230323A1 - Decoder circuit - Google Patents

Decoder circuit

Info

Publication number
AU2001230323A1
AU2001230323A1 AU2001230323A AU3032301A AU2001230323A1 AU 2001230323 A1 AU2001230323 A1 AU 2001230323A1 AU 2001230323 A AU2001230323 A AU 2001230323A AU 3032301 A AU3032301 A AU 3032301A AU 2001230323 A1 AU2001230323 A1 AU 2001230323A1
Authority
AU
Australia
Prior art keywords
decode
node
potential
operable
circuitry
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001230323A
Other languages
English (en)
Inventor
Robert Beat
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ELEMENT 14 Inc
Original Assignee
ELEMENT 14 Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ELEMENT 14 Inc filed Critical ELEMENT 14 Inc
Publication of AU2001230323A1 publication Critical patent/AU2001230323A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Electronic Switches (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Amplifiers (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Analogue/Digital Conversion (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dram (AREA)
  • Valve Device For Special Equipments (AREA)
  • Liquid Crystal (AREA)
AU2001230323A 2000-01-13 2001-01-12 Decoder circuit Abandoned AU2001230323A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB0000738 2000-01-13
GBGB0000738.5A GB0000738D0 (en) 2000-01-13 2000-01-13 Decoder circuit
PCT/GB2001/000116 WO2001052265A2 (fr) 2000-01-13 2001-01-12 Circuit décodeur

Publications (1)

Publication Number Publication Date
AU2001230323A1 true AU2001230323A1 (en) 2001-07-24

Family

ID=9883621

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001230323A Abandoned AU2001230323A1 (en) 2000-01-13 2001-01-12 Decoder circuit

Country Status (7)

Country Link
US (3) US6456118B2 (fr)
EP (1) EP1249020B1 (fr)
AT (1) ATE294988T1 (fr)
AU (1) AU2001230323A1 (fr)
DE (1) DE60110545T2 (fr)
GB (2) GB0000738D0 (fr)
WO (1) WO2001052265A2 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6750677B2 (en) * 2001-06-04 2004-06-15 Matsushita Electric Industrial Co., Ltd. Dynamic semiconductor integrated circuit
TWI226638B (en) * 2003-10-30 2005-01-11 Via Tech Inc Output device for static random access memory
US7170320B2 (en) * 2005-02-04 2007-01-30 International Business Machines Corporation Fast pulse powered NOR decode apparatus with pulse stretching and redundancy steering
US7176725B2 (en) * 2005-02-04 2007-02-13 International Business Machines Corporation Fast pulse powered NOR decode apparatus for semiconductor devices
US20060181950A1 (en) * 2005-02-11 2006-08-17 International Business Machines Corporation Apparatus and method for SRAM decoding with single signal synchronization
US7734094B2 (en) * 2006-06-28 2010-06-08 Microsoft Corporation Techniques for filtering handwriting recognition results
US8279704B2 (en) * 2006-07-31 2012-10-02 Sandisk 3D Llc Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same
US7525869B2 (en) * 2006-12-31 2009-04-28 Sandisk 3D Llc Method for using a reversible polarity decoder circuit
US7542370B2 (en) * 2006-12-31 2009-06-02 Sandisk 3D Llc Reversible polarity decoder circuit
JP5164279B2 (ja) * 2006-12-31 2013-03-21 サンディスク・スリー・ディ・リミテッド・ライアビリティ・カンパニー 可逆極性デコーダ回路および関連する方法
US20090109772A1 (en) * 2007-10-24 2009-04-30 Esin Terzioglu Ram with independent local clock
US8301912B2 (en) 2007-12-31 2012-10-30 Sandisk Technologies Inc. System, method and memory device providing data scrambling compatible with on-chip copy operation
KR102205513B1 (ko) * 2014-12-24 2021-01-21 에스케이하이닉스 주식회사 디코딩 회로

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51139247A (en) * 1975-05-28 1976-12-01 Hitachi Ltd Mos logic circuit
JP2768298B2 (ja) * 1995-03-30 1998-06-25 日本電気株式会社 論理回路
US5737270A (en) * 1996-07-15 1998-04-07 International Business Machines Corporation Precharged wordline decoder with locally-controlled clock
US6081136A (en) * 1997-12-19 2000-06-27 Advanced Micro Devices, Inc. Dynamic NOR gates for NAND decode

Also Published As

Publication number Publication date
WO2001052265A3 (fr) 2001-12-27
US20050141329A1 (en) 2005-06-30
US7049851B2 (en) 2006-05-23
ATE294988T1 (de) 2005-05-15
US6456118B2 (en) 2002-09-24
WO2001052265A2 (fr) 2001-07-19
DE60110545D1 (de) 2005-06-09
EP1249020B1 (fr) 2005-05-04
GB0029185D0 (en) 2001-01-17
GB0000738D0 (en) 2000-03-08
US6864721B2 (en) 2005-03-08
US20030006802A1 (en) 2003-01-09
US20010022749A1 (en) 2001-09-20
DE60110545T2 (de) 2006-01-19
EP1249020A2 (fr) 2002-10-16

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