AU2001229337A1 - Dc control of a multilevel signal - Google Patents
Dc control of a multilevel signalInfo
- Publication number
- AU2001229337A1 AU2001229337A1 AU2001229337A AU2933701A AU2001229337A1 AU 2001229337 A1 AU2001229337 A1 AU 2001229337A1 AU 2001229337 A AU2001229337 A AU 2001229337A AU 2933701 A AU2933701 A AU 2933701A AU 2001229337 A1 AU2001229337 A1 AU 2001229337A1
- Authority
- AU
- Australia
- Prior art keywords
- control
- multilevel signal
- multilevel
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
- H04L25/4919—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using balanced multilevel codes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1496—Digital recording or reproducing using self-clocking codes characterised by the use of more than three levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
- G11B2020/1457—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof wherein DC control is performed by calculating a digital sum value [DSV]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/004—Recording, reproducing or erasing methods; Read, write or erase circuits therefor
- G11B7/0045—Recording
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/007—Arrangement of the information on the record carrier, e.g. form of tracks, actual track shape, e.g. wobbled, or cross-section, e.g. v-shaped; Sequential information structures, e.g. sectoring or header formats within a track
- G11B7/013—Arrangement of the information on the record carrier, e.g. form of tracks, actual track shape, e.g. wobbled, or cross-section, e.g. v-shaped; Sequential information structures, e.g. sectoring or header formats within a track for discrete information, i.e. where each information unit is stored in a distinct discrete location, e.g. digital information formats within a data block or sector
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/496,897 | 2000-02-02 | ||
US09/496,897 US6604219B1 (en) | 2000-02-02 | 2000-02-02 | DC control of a multilevel signal |
PCT/US2001/000771 WO2001058102A1 (fr) | 2000-02-02 | 2001-01-09 | Regulation de la composante cc d'un signal a niveaux multiples |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001229337A1 true AU2001229337A1 (en) | 2001-08-14 |
Family
ID=23974645
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001229337A Abandoned AU2001229337A1 (en) | 2000-02-02 | 2001-01-09 | Dc control of a multilevel signal |
Country Status (3)
Country | Link |
---|---|
US (1) | US6604219B1 (fr) |
AU (1) | AU2001229337A1 (fr) |
WO (1) | WO2001058102A1 (fr) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7034719B2 (en) | 2002-09-27 | 2006-04-25 | Samsung Electronics Co., Ltd. | Data modulating method and apparatus, data demodulating method and apparatus, and code arranging method |
TW538372B (en) * | 1999-10-02 | 2003-06-21 | Mediatek Inc | Zero digital sum value control device and method |
KR100408416B1 (ko) * | 2001-09-06 | 2003-12-06 | 삼성전자주식회사 | 디지털 비디오 신호 전송 시스템 및 전송방법 |
EP1296457B1 (fr) * | 2001-09-21 | 2009-04-29 | Ricoh Company, Ltd. | Traitement de données à niveaux multiples pour l'enregistrement |
US7190653B2 (en) * | 2002-10-21 | 2007-03-13 | Ricoh Company, Ltd. | Data recording/reproducing device |
US7042372B2 (en) * | 2002-10-31 | 2006-05-09 | Hewlett-Packard Development Company, L.P. | Encoding information in codes identifying beginning of regions of data |
US7084789B2 (en) * | 2003-11-17 | 2006-08-01 | Seagate Technology Llc | DC-free code having limited error propagation and limited complexity |
US6989776B2 (en) * | 2003-11-17 | 2006-01-24 | Seagate Technology Llc | Generation of interleaved parity code words having limited running digital sum values |
TWI244272B (en) * | 2003-12-04 | 2005-11-21 | Via Tech Inc | Digital signal modulation method |
TWI302306B (en) * | 2004-12-30 | 2008-10-21 | Ind Tech Res Inst | State modulation method and apparatus for inserting state control codes |
DE102005012069A1 (de) * | 2005-03-16 | 2006-09-21 | Robert Bosch Gmbh | Verfahren zur Fehlerbehandlung |
WO2009037618A2 (fr) * | 2007-09-18 | 2009-03-26 | Nxp B.V. | Procédé d'égalisation d'équilibre |
GB2530753A (en) * | 2014-09-30 | 2016-04-06 | Canon Kk | DC-Free nyquist-free error correcting line coding |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57164662A (en) * | 1981-04-03 | 1982-10-09 | Hitachi Ltd | Compression system for multilevel signal |
US4408189A (en) | 1981-05-18 | 1983-10-04 | Northern Telecom Limited | Method and apparatus for code conversion of binary to multilevel signals |
KR910013186A (ko) | 1989-12-29 | 1991-08-08 | 강진구 | Efm 변조회로 |
JPH06325369A (ja) | 1993-03-08 | 1994-11-25 | Philips Electron Nv | 光学記録兼読取装置 |
US5450443A (en) * | 1993-09-01 | 1995-09-12 | International Business Machines Corporation | Method and apparatus for constructing asymptotically optimal second order DC-free channel codes |
US5537382A (en) * | 1994-11-22 | 1996-07-16 | Optex Corporation | Partial response coding for a multi-level optical recording channel |
US6023234A (en) | 1995-02-23 | 2000-02-08 | Matsushita Electric Industrial Co., Ltd. | EFM encoder and DSV calculator |
KR0165441B1 (ko) | 1995-09-18 | 1999-03-20 | 김광호 | 디지털 데이터 채널 부호화 및 복호화방법과 그 장치 |
US5699434A (en) | 1995-12-12 | 1997-12-16 | Hewlett-Packard Company | Method of inhibiting copying of digital data |
WO1997050179A1 (fr) * | 1996-06-24 | 1997-12-31 | Etom Technologies Corporation | Code limite par longueur de ligne de type m=10 (2,10), d=3.75 pour donnees a plusieurs niveaux |
WO2000021198A1 (fr) * | 1998-10-01 | 2000-04-13 | Koninklijke Philips Electronics N.V. | Production d'un signal d'information numerique limite en longueur de plage |
WO2000057417A1 (fr) * | 1999-03-23 | 2000-09-28 | Koninklijke Philips Electronics N.V. | Methode de decodage d'un train de bits de canal d'un signal en rapport avec un signal de canal binaire dans un train de bits de source d'un signal en rapport avec un signal de source binaire |
US6456208B1 (en) * | 2000-06-30 | 2002-09-24 | Marvell International, Ltd. | Technique to construct 32/33 and other RLL codes |
-
2000
- 2000-02-02 US US09/496,897 patent/US6604219B1/en not_active Expired - Lifetime
-
2001
- 2001-01-09 AU AU2001229337A patent/AU2001229337A1/en not_active Abandoned
- 2001-01-09 WO PCT/US2001/000771 patent/WO2001058102A1/fr active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2001058102A1 (fr) | 2001-08-09 |
US6604219B1 (en) | 2003-08-05 |
WO2001058102A9 (fr) | 2002-10-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU3219000A (en) | Controlling production | |
AU2001246793A1 (en) | Remote control system | |
AU5631200A (en) | Control of solid state dimensional features | |
AU2002225625A1 (en) | Control variables | |
AU2001243716A1 (en) | Remote control signaling using audio watermarks | |
AU2633001A (en) | Building control | |
AU2001266513A1 (en) | Parental control | |
AU4676200A (en) | Optimal control system | |
AU2001256760A1 (en) | Faucet controller | |
AU1340501A (en) | Membrane position control | |
AU2001246367A1 (en) | Screw connection | |
AU2001290777A1 (en) | Intelligent voice bridging | |
AU2001229337A1 (en) | Dc control of a multilevel signal | |
AU2001242578A1 (en) | Transmission of control information | |
AU2001285258A1 (en) | Analog control | |
AU2001236845A1 (en) | Control of sequence of video modifying operations | |
AU2001238125A1 (en) | Hydristor control means | |
AU2561900A (en) | Polarisation control | |
AU2001293098A1 (en) | Controller for switch-mode circuitry | |
AU2001295916A1 (en) | Audio signal encoder | |
AU2001236048A1 (en) | Oxygen-containing heterocyclic compounds | |
AUPR163500A0 (en) | Two-wire controlled switching | |
AU4755200A (en) | Cycloalkyl substituted 3-urea-benzofurane-and -pyridofurane-derivatives | |
AU2001256535A1 (en) | Control circuitry | |
AU2001244519A1 (en) | Continuous signal quality control |