AU2001223655A1 - System carrier for freely programmable blocks - Google Patents

System carrier for freely programmable blocks

Info

Publication number
AU2001223655A1
AU2001223655A1 AU2001223655A AU2365501A AU2001223655A1 AU 2001223655 A1 AU2001223655 A1 AU 2001223655A1 AU 2001223655 A AU2001223655 A AU 2001223655A AU 2365501 A AU2365501 A AU 2365501A AU 2001223655 A1 AU2001223655 A1 AU 2001223655A1
Authority
AU
Australia
Prior art keywords
freely programmable
system carrier
programmable blocks
module
another
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001223655A
Inventor
Helmuth Gesch
Markus Waidelich
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of AU2001223655A1 publication Critical patent/AU2001223655A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/183—Internal mounting support structures, e.g. for printed circuit boards, internal connecting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Circuits Of Receivers In General (AREA)
  • Electrotherapy Devices (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Programmable Controllers (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Bus Control (AREA)
  • Stored Programmes (AREA)
  • Communication Control (AREA)

Abstract

A system carrier for freely programmable blocks that are connected to one another by buses, of a carrier body, at least three identically configured connectors disposed on the carrier body and being configured to receive in each case one module with a freely programmable block, the module being couplable to the connector and its position changable, and three groups of buses arranged to fixedly connect the connectors to one another.
AU2001223655A 2000-02-18 2000-12-14 System carrier for freely programmable blocks Abandoned AU2001223655A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE20003010U DE20003010U1 (en) 2000-02-18 2000-02-18 System carrier for freely programmable modules
DE20003010 2000-02-18
PCT/EP2000/012712 WO2001061852A2 (en) 2000-02-18 2000-12-14 System carrier for freely programmable blocks

Publications (1)

Publication Number Publication Date
AU2001223655A1 true AU2001223655A1 (en) 2001-08-27

Family

ID=7937572

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001223655A Abandoned AU2001223655A1 (en) 2000-02-18 2000-12-14 System carrier for freely programmable blocks

Country Status (9)

Country Link
US (1) US6874051B2 (en)
EP (1) EP1256168B1 (en)
JP (1) JP2003523570A (en)
AT (1) ATE261632T1 (en)
AU (1) AU2001223655A1 (en)
CA (1) CA2400231A1 (en)
DE (2) DE20003010U1 (en)
IL (1) IL151023A0 (en)
WO (1) WO2001061852A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10159480B4 (en) * 2001-12-04 2006-05-24 Daimlerchrysler Ag control device
US8004855B2 (en) * 2006-07-07 2011-08-23 Itt Manufacturing Enterprises, Inc. Reconfigurable data processing system

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62150404A (en) 1985-12-25 1987-07-04 Mitsubishi Electric Corp Program controller
US5000692A (en) * 1988-09-14 1991-03-19 Matsushita Electric Works, Ltd. I/O relay interface module
EP0498544B1 (en) * 1991-02-04 1997-08-06 International Business Machines Corporation Multimedia expansion unit
US5424589A (en) 1993-02-12 1995-06-13 The Board Of Trustees Of The Leland Stanford Junior University Electrically programmable inter-chip interconnect architecture
US5935232A (en) * 1995-11-20 1999-08-10 Advanced Micro Devices, Inc. Variable latency and bandwidth communication pathways
US5703759A (en) 1995-12-07 1997-12-30 Xilinx, Inc. Multi-chip electrically reconfigurable module with predominantly extra-package inter-chip connections
US6351786B2 (en) * 1998-08-24 2002-02-26 Racal Instr Inc VXI backplane system improvements and methods
US6567518B1 (en) * 1998-08-28 2003-05-20 Teltronics, Inc. Method of field programmable gate array configuration

Also Published As

Publication number Publication date
WO2001061852A3 (en) 2002-01-03
DE50005636D1 (en) 2004-04-15
DE20003010U1 (en) 2000-05-04
EP1256168B1 (en) 2004-03-10
US20030005198A1 (en) 2003-01-02
WO2001061852A2 (en) 2001-08-23
EP1256168A2 (en) 2002-11-13
IL151023A0 (en) 2003-02-12
US6874051B2 (en) 2005-03-29
CA2400231A1 (en) 2001-08-23
JP2003523570A (en) 2003-08-05
ATE261632T1 (en) 2004-03-15

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