AU1742201A - Inter process communication in a distributed processing system - Google Patents

Inter process communication in a distributed processing system

Info

Publication number
AU1742201A
AU1742201A AU17422/01A AU1742201A AU1742201A AU 1742201 A AU1742201 A AU 1742201A AU 17422/01 A AU17422/01 A AU 17422/01A AU 1742201 A AU1742201 A AU 1742201A AU 1742201 A AU1742201 A AU 1742201A
Authority
AU
Australia
Prior art keywords
processing system
distributed processing
processes
cpus
operating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU17422/01A
Other languages
English (en)
Inventor
Petter Johnsen
Per Olav Kroka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=19904021&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=AU1742201(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of AU1742201A publication Critical patent/AU1742201A/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Computer And Data Communications (AREA)
AU17422/01A 1999-11-25 2000-11-24 Inter process communication in a distributed processing system Abandoned AU1742201A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
NO19995774A NO311656B1 (no) 1999-11-25 1999-11-25 Kommunikasjon mellom prosesser som kjörer på forskjellige prosessorer ved bruk av s¶rskilte kommunikasjonsprosesser
NO19995774 1999-11-25
PCT/NO2000/000397 WO2001038998A1 (en) 1999-11-25 2000-11-24 Inter process communication in a distributed processing system

Publications (1)

Publication Number Publication Date
AU1742201A true AU1742201A (en) 2001-06-04

Family

ID=19904021

Family Applications (1)

Application Number Title Priority Date Filing Date
AU17422/01A Abandoned AU1742201A (en) 1999-11-25 2000-11-24 Inter process communication in a distributed processing system

Country Status (10)

Country Link
US (1) US7426531B1 (US06573293-20030603-C00009.png)
EP (1) EP1242900B1 (US06573293-20030603-C00009.png)
JP (1) JP4689917B2 (US06573293-20030603-C00009.png)
CN (1) CN1264102C (US06573293-20030603-C00009.png)
AT (1) ATE479950T1 (US06573293-20030603-C00009.png)
AU (1) AU1742201A (US06573293-20030603-C00009.png)
DE (1) DE60044909D1 (US06573293-20030603-C00009.png)
MY (1) MY126754A (US06573293-20030603-C00009.png)
NO (1) NO311656B1 (US06573293-20030603-C00009.png)
WO (1) WO2001038998A1 (US06573293-20030603-C00009.png)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005165813A (ja) * 2003-12-04 2005-06-23 Matsushita Electric Ind Co Ltd 分散計算機システム管理方法
CN102375763B (zh) * 2010-08-20 2013-06-19 中国移动通信集团公司 一种用于实现进程间通信的系统和方法
EP2727314A1 (en) 2011-06-30 2014-05-07 Telefonaktiebolaget L M Ericsson (publ) Flexible data communication

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4530051A (en) * 1982-09-10 1985-07-16 At&T Bell Laboratories Program process execution in a distributed multiprocessor system
US5062040A (en) * 1986-12-22 1991-10-29 At&T Bell Laboratories Handling of notification of asynchronous events by user and stub processes of a distributed process executing on a plurality of processors of a multi-processor system
EP0592080A2 (en) * 1992-09-24 1994-04-13 International Business Machines Corporation Method and apparatus for interprocess communication in a multicomputer system
US6226690B1 (en) * 1993-06-14 2001-05-01 International Business Machines Corporation Method and apparatus for utilizing proxy objects to communicate with target objects
JPH07134657A (ja) * 1993-11-09 1995-05-23 Advantest Corp プロセス間通信方式
US5606666A (en) * 1994-07-19 1997-02-25 International Business Machines Corporation Method and apparatus for distributing control messages between interconnected processing elements by mapping control messages of a shared memory addressable by the receiving processing element
JPH08161186A (ja) * 1994-12-09 1996-06-21 Nec Corp タスク間通信方式
JPH08212180A (ja) * 1995-02-08 1996-08-20 Oki Electric Ind Co Ltd プロセス間通信処理装置
JPH103392A (ja) * 1996-06-14 1998-01-06 Fujitsu Ltd マルチプロセス実行システム
JP3293761B2 (ja) * 1997-08-21 2002-06-17 三菱電機株式会社 パケットルーチング方法

Also Published As

Publication number Publication date
JP4689917B2 (ja) 2011-06-01
WO2001038998A1 (en) 2001-05-31
CN1399741A (zh) 2003-02-26
JP2003515814A (ja) 2003-05-07
ATE479950T1 (de) 2010-09-15
US7426531B1 (en) 2008-09-16
DE60044909D1 (de) 2010-10-14
MY126754A (en) 2006-10-31
CN1264102C (zh) 2006-07-12
EP1242900B1 (en) 2010-09-01
NO311656B1 (no) 2001-12-27
NO995774L (no) 2001-05-28
NO995774D0 (no) 1999-11-25
EP1242900A1 (en) 2002-09-25

Similar Documents

Publication Publication Date Title
AU1397600A (en) Interrupt architecture for a non-uniform memory access (numa) data processing system
TW338809B (en) A method for indentifying and correcting errors in a central processing unit
US7409478B2 (en) Peripheral hardware devices providing multiple interfaces and related systems and methods
WO2000039679A3 (en) Method and apparatus for balancing workloads among paths in a multi-path computer system
AU2003222411A1 (en) Access to a wide memory
TW357467B (en) A dual-in-line universal serial bus connector
AU1567595A (en) Distributed protocol framework
WO2001037088A3 (en) Programmable multi-tasking memory management system
WO2000019292A3 (en) Upgrade card for a computer system
DE60142152D1 (de) Virtualisierung von E/A-Adapterressourcen
US6470408B1 (en) Apparatus and method for delivering interrupts via an APIC bus to IA-32 processors
ES2140241T3 (es) Procedimiento para la sincronizacion de programas en diferentes ordenadores de un sistema integrado.
WO1999066416A3 (en) Resource control in a computer system
WO2000052574A3 (en) Method and system for data processing by proxy
AU1742201A (en) Inter process communication in a distributed processing system
CA2159979A1 (en) Methology to Link Any PCI ROM Based Device Using a Single Software or Hardware Interrupt Vector in PC System at Runtime
AU1962401A (en) Power management method for a computer system having a hub interface architecture
CN201796311U (zh) 计算机主机板
CA2447876A1 (en) Self-synchronizing half duplex matrix switch
AU1708800A (en) Split computer architecture
KR100289191B1 (ko) 다중프로세서의스카시버스공유장치
EP0350911A3 (en) Tightly coupled multiprocessor structure for real-time applications
Vojvodić et al. Distributed intelligence and bus hierarchy system implementation for a highly intelligent workstation
TW275677B (en) Peripheral access architecture in computer system
MY119927A (en) Computer system.

Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase