AU1727901A - Universal hardware device and method and tools for use therewith - Google Patents

Universal hardware device and method and tools for use therewith

Info

Publication number
AU1727901A
AU1727901A AU17279/01A AU1727901A AU1727901A AU 1727901 A AU1727901 A AU 1727901A AU 17279/01 A AU17279/01 A AU 17279/01A AU 1727901 A AU1727901 A AU 1727901A AU 1727901 A AU1727901 A AU 1727901A
Authority
AU
Australia
Prior art keywords
cells
hardware device
tools
universal hardware
use therewith
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU17279/01A
Other languages
English (en)
Inventor
Meged Ofer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cellot Inc
Original Assignee
Cellot Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cellot Inc filed Critical Cellot Inc
Publication of AU1727901A publication Critical patent/AU1727901A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Automatic Tool Replacement In Machine Tools (AREA)
  • Bending Of Plates, Rods, And Pipes (AREA)
  • Stored Programmes (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Joining Of Building Structures In Genera (AREA)
AU17279/01A 1999-11-29 2000-11-28 Universal hardware device and method and tools for use therewith Abandoned AU1727901A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16768499P 1999-11-29 1999-11-29
US60167684 1999-11-29
PCT/IL2000/000797 WO2001039249A2 (en) 1999-11-29 2000-11-28 Universal hardware device and method and tools for use therewith

Publications (1)

Publication Number Publication Date
AU1727901A true AU1727901A (en) 2001-06-04

Family

ID=22608375

Family Applications (1)

Application Number Title Priority Date Filing Date
AU17279/01A Abandoned AU1727901A (en) 1999-11-29 2000-11-28 Universal hardware device and method and tools for use therewith

Country Status (6)

Country Link
EP (1) EP1236222B1 (enExample)
JP (1) JP4642304B2 (enExample)
AT (1) ATE244930T1 (enExample)
AU (1) AU1727901A (enExample)
DE (1) DE60003847T2 (enExample)
WO (1) WO2001039249A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6904576B2 (en) 2002-08-09 2005-06-07 Synplicity, Inc. Method and system for debugging using replicated logic
US7213216B2 (en) 2002-08-09 2007-05-01 Synplicity, Inc. Method and system for debugging using replicated logic and trigger logic
US9009545B2 (en) 2013-06-14 2015-04-14 International Business Machines Corporation Pulsed-latch based razor with 1-cycle error recovery scheme
CN105824285B (zh) * 2016-03-14 2018-09-14 上海交通大学 用于单片机的可编程逻辑控制系统的编程设计方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4984192A (en) * 1988-12-02 1991-01-08 Ultrasystems Defense Inc. Programmable state machines connectable in a reconfiguration switching network for performing real-time data processing
TW396312B (en) * 1993-12-30 2000-07-01 At & T Corp Method and apparatus for converting field-programmable gate array implementations into mask-programmable logic cell implementations
US5543640A (en) * 1994-03-15 1996-08-06 National Semiconductor Corporation Logical three dimensional interconnections between integrated circuit chips using a two dimensional multi-chip module
US5646544A (en) * 1995-06-05 1997-07-08 International Business Machines Corporation System and method for dynamically reconfiguring a programmable gate array
US5778439A (en) * 1995-08-18 1998-07-07 Xilinx, Inc. Programmable logic device with hierarchical confiquration and state storage
US5821773A (en) * 1995-09-06 1998-10-13 Altera Corporation Look-up table based logic element with complete permutability of the inputs to the secondary signals
US5991907A (en) * 1996-02-02 1999-11-23 Lucent Technologies Inc. Method for testing field programmable gate arrays
US6097211A (en) * 1996-07-18 2000-08-01 Altera Corporation Configuration memory integrated circuit
US5911059A (en) * 1996-12-18 1999-06-08 Applied Microsystems, Inc. Method and apparatus for testing software
GB2321989B (en) * 1997-02-05 2000-10-18 Altera Corp Redundancy circuitry for logic circuits
US6020759A (en) * 1997-03-21 2000-02-01 Altera Corporation Programmable logic array device with random access memory configurable as product terms
US6230304B1 (en) * 1997-12-24 2001-05-08 Magma Design Automation, Inc. Method of designing a constraint-driven integrated circuit layout
JP2000031284A (ja) * 1998-07-09 2000-01-28 Hitachi Ltd 検証用半導体集積回路および回路エミュレータ

Also Published As

Publication number Publication date
WO2001039249A2 (en) 2001-05-31
WO2001039249A3 (en) 2002-02-28
EP1236222A2 (en) 2002-09-04
JP2003516009A (ja) 2003-05-07
DE60003847D1 (de) 2003-08-14
ATE244930T1 (de) 2003-07-15
JP4642304B2 (ja) 2011-03-02
DE60003847T2 (de) 2004-05-27
WO2001039249B1 (en) 2002-03-28
EP1236222B1 (en) 2003-07-09

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase