ATE556573T1 - Ausbilden einer kontaktfläche auf einer leiterplatte - Google Patents

Ausbilden einer kontaktfläche auf einer leiterplatte

Info

Publication number
ATE556573T1
ATE556573T1 AT10162085T AT10162085T ATE556573T1 AT E556573 T1 ATE556573 T1 AT E556573T1 AT 10162085 T AT10162085 T AT 10162085T AT 10162085 T AT10162085 T AT 10162085T AT E556573 T1 ATE556573 T1 AT E556573T1
Authority
AT
Austria
Prior art keywords
circuit board
forming
contact surface
printed circuit
area
Prior art date
Application number
AT10162085T
Other languages
English (en)
Inventor
Michael Klar
Thomas Binzer
Klaus-Dieter Miosga
Oliver Brueggemann
Dirk Steinbuch
Juergen Seiz
Original Assignee
Bosch Gmbh Robert
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert filed Critical Bosch Gmbh Robert
Application granted granted Critical
Publication of ATE556573T1 publication Critical patent/ATE556573T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Structure Of Printed Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
AT10162085T 2009-07-06 2010-05-06 Ausbilden einer kontaktfläche auf einer leiterplatte ATE556573T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102009027470A DE102009027470A1 (de) 2009-07-06 2009-07-06 Ausbilden einer Kontaktfläche auf einer Leiterplatte

Publications (1)

Publication Number Publication Date
ATE556573T1 true ATE556573T1 (de) 2012-05-15

Family

ID=42455405

Family Applications (1)

Application Number Title Priority Date Filing Date
AT10162085T ATE556573T1 (de) 2009-07-06 2010-05-06 Ausbilden einer kontaktfläche auf einer leiterplatte

Country Status (3)

Country Link
EP (1) EP2280592B1 (de)
AT (1) ATE556573T1 (de)
DE (1) DE102009027470A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2999330B1 (fr) * 2012-12-07 2015-01-16 Thales Sa Procede de fabrication d'un bouton poussoir sur un circuit imprime avec une zone de contact renforcee
EP3047709B1 (de) * 2013-09-17 2020-07-15 California Institute of Technology Galvanisierungstechnik für mikrogefertigte gruppe

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6801438B1 (en) 2000-10-24 2004-10-05 Touch Future Technolocy Ltd. Electrical circuit and method of formation
US20070040688A1 (en) * 2005-08-16 2007-02-22 X-Cyte, Inc., A California Corporation RFID inlays and methods of their manufacture
TWI267996B (en) * 2005-10-13 2006-12-01 Phoenix Prec Technology Corp Method for manufacturing semiconductor package circuit board

Also Published As

Publication number Publication date
EP2280592B1 (de) 2012-05-02
EP2280592A1 (de) 2011-02-02
DE102009027470A1 (de) 2011-01-13

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