ATE553427T1 - Freilaufender numerisch gesteuerter oszillator mit komplexer multiplikation mit kompensation von amplitudenschwankungen aufgrund kumulativer rundungsfehler - Google Patents

Freilaufender numerisch gesteuerter oszillator mit komplexer multiplikation mit kompensation von amplitudenschwankungen aufgrund kumulativer rundungsfehler

Info

Publication number
ATE553427T1
ATE553427T1 AT05702781T AT05702781T ATE553427T1 AT E553427 T1 ATE553427 T1 AT E553427T1 AT 05702781 T AT05702781 T AT 05702781T AT 05702781 T AT05702781 T AT 05702781T AT E553427 T1 ATE553427 T1 AT E553427T1
Authority
AT
Austria
Prior art keywords
phasor
multiplation
compensation
running
complex
Prior art date
Application number
AT05702781T
Other languages
English (en)
Inventor
Karl Raymond Wittig
Geoffrey Francis Burns
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE553427T1 publication Critical patent/ATE553427T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B28/00—Generation of oscillations by methods not covered by groups H03B5/00 - H03B27/00, including modification of the waveform to produce sinusoidal oscillations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/26—Arbitrary function generators

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Complex Calculations (AREA)
AT05702781T 2004-01-28 2005-01-25 Freilaufender numerisch gesteuerter oszillator mit komplexer multiplikation mit kompensation von amplitudenschwankungen aufgrund kumulativer rundungsfehler ATE553427T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53972504P 2004-01-28 2004-01-28
PCT/IB2005/050294 WO2005073829A1 (en) 2004-01-28 2005-01-25 A free-running numerically-controlled oscillator using complex multiplication with compensation for amplitude variation due to cumulative round-off errors

Publications (1)

Publication Number Publication Date
ATE553427T1 true ATE553427T1 (de) 2012-04-15

Family

ID=34826120

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05702781T ATE553427T1 (de) 2004-01-28 2005-01-25 Freilaufender numerisch gesteuerter oszillator mit komplexer multiplikation mit kompensation von amplitudenschwankungen aufgrund kumulativer rundungsfehler

Country Status (6)

Country Link
US (1) US7707235B2 (de)
EP (1) EP1711879B1 (de)
JP (1) JP2007520138A (de)
CN (1) CN1914579B (de)
AT (1) ATE553427T1 (de)
WO (1) WO2005073829A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5662040B2 (ja) 2010-03-16 2015-01-28 株式会社メガチップス 数値制御発振器
CN104062494B (zh) * 2014-05-30 2018-08-14 深圳市中电软件有限公司 一种抑制频谱泄漏的采样间隔补偿方法及系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3633017A (en) * 1970-01-07 1972-01-04 Sperry Rand Corp Digital waveform generator
CA2079422C (en) 1991-09-30 1996-07-02 Osamu Ichiyoshi Phase-locked circuit capable of being quickly put in a phase-locked state
GB2288086A (en) 1994-03-28 1995-10-04 Hewlett Packard Co Digital phase-locked loop using a numerically-controlled oscillator
US5473385A (en) 1994-06-07 1995-12-05 Tv/Com Technologies, Inc. Clock correction in a video data decoder using video synchronization signals
JP2967699B2 (ja) * 1995-03-06 1999-10-25 日本電気株式会社 送信装置
US6370188B1 (en) 1999-03-31 2002-04-09 Texas Instruments Incorporated Phase and frequency offset compensation in a telecommunications receiver
US6281823B1 (en) * 1999-09-21 2001-08-28 Agere Systems Guardian Corp. Direct digital synthesis using a sine weighted DAC
JP2002182898A (ja) * 2000-12-14 2002-06-28 Nec Microsystems Ltd 積算値及び周期関数の生成方法及び回路
US20030063678A1 (en) 2001-08-21 2003-04-03 Crawford James A. OFDM pilot tone tracking to reduce performance loss due to frequency pulling and pushing
US6981011B1 (en) * 2001-10-01 2005-12-27 Durham Logistics Llc Precision complex sinusoid generation using limited processing
US6954114B2 (en) 2002-04-26 2005-10-11 Broadcom Corporation NCO with rational frequency and normalized phase

Also Published As

Publication number Publication date
CN1914579B (zh) 2010-08-11
US20070109027A1 (en) 2007-05-17
JP2007520138A (ja) 2007-07-19
WO2005073829A1 (en) 2005-08-11
US7707235B2 (en) 2010-04-27
EP1711879A1 (de) 2006-10-18
EP1711879B1 (de) 2012-04-11
CN1914579A (zh) 2007-02-14

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