ATE550719T1 - Gerätesteuerung und konfiguration - Google Patents

Gerätesteuerung und konfiguration

Info

Publication number
ATE550719T1
ATE550719T1 AT03719595T AT03719595T ATE550719T1 AT E550719 T1 ATE550719 T1 AT E550719T1 AT 03719595 T AT03719595 T AT 03719595T AT 03719595 T AT03719595 T AT 03719595T AT E550719 T1 ATE550719 T1 AT E550719T1
Authority
AT
Austria
Prior art keywords
configuration
bus
coupled
devices
device control
Prior art date
Application number
AT03719595T
Other languages
English (en)
Inventor
Paul Luse
Reinhardt Michel
Wolfgang Michel
Mark Brown
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE550719T1 publication Critical patent/ATE550719T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4081—Live connection to bus, e.g. hot-plugging

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Transplanting Machines (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)
AT03719595T 2002-05-07 2003-04-02 Gerätesteuerung und konfiguration ATE550719T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/140,631 US7032055B2 (en) 2002-05-07 2002-05-07 Device control and configuration
PCT/US2003/010429 WO2003096203A1 (en) 2002-05-07 2003-04-02 Device control and configuration

Publications (1)

Publication Number Publication Date
ATE550719T1 true ATE550719T1 (de) 2012-04-15

Family

ID=29399475

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03719595T ATE550719T1 (de) 2002-05-07 2003-04-02 Gerätesteuerung und konfiguration

Country Status (7)

Country Link
US (1) US7032055B2 (de)
EP (1) EP1504351B1 (de)
CN (1) CN100367259C (de)
AT (1) ATE550719T1 (de)
AU (1) AU2003223465A1 (de)
TW (1) TWI264648B (de)
WO (1) WO2003096203A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030188061A1 (en) * 2002-03-28 2003-10-02 Luse Paul E. Device discovery and dynamic configuration of control application
US6970986B1 (en) * 2002-05-21 2005-11-29 Adaptec, Inc. Software based system and method for I/O chip hiding of processor based controllers from operating system
US7143217B2 (en) * 2002-05-28 2006-11-28 Intel Corporation Device configuration
JP6629696B2 (ja) * 2016-08-09 2020-01-15 本田技研工業株式会社 内燃機関
CN108052470A (zh) * 2017-12-08 2018-05-18 中国核动力研究设计院 一种基于at96总线的热插拔装置及方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0821015B2 (ja) * 1992-01-20 1996-03-04 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュータならびにそのシステム再構成化装置および方法
WO1993015459A1 (en) * 1992-02-03 1993-08-05 Micro Industries Live insertion of computer modules
GB9405855D0 (en) * 1994-03-24 1994-05-11 Int Computers Ltd Computer system
US5838935A (en) * 1995-06-15 1998-11-17 Intel Corporation Method and apparatus providing programmable decode modes for secondary PCI bus interfaces
TW299404B (en) 1995-11-02 1997-03-01 Ibm Adapter card slot isolation for hot plugging
US6094699A (en) * 1998-02-13 2000-07-25 Mylex Corporation Apparatus and method for coupling devices to a PCI-to-PCI bridge in an intelligent I/O controller
US6065081A (en) * 1998-04-29 2000-05-16 Compact Computer Corp. Administrator controlled architecture for disabling add-in card slots

Also Published As

Publication number Publication date
US7032055B2 (en) 2006-04-18
TWI264648B (en) 2006-10-21
EP1504351B1 (de) 2012-03-21
WO2003096203A1 (en) 2003-11-20
CN1666184A (zh) 2005-09-07
CN100367259C (zh) 2008-02-06
TW200403562A (en) 2004-03-01
EP1504351A1 (de) 2005-02-09
US20030212846A1 (en) 2003-11-13
AU2003223465A1 (en) 2003-11-11

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