ATE550718T1 - Verfahren und system zur steuerung der zulassung eines speichermediums für einen peripheren bus eines datenreproduktionssystems - Google Patents
Verfahren und system zur steuerung der zulassung eines speichermediums für einen peripheren bus eines datenreproduktionssystemsInfo
- Publication number
- ATE550718T1 ATE550718T1 AT08807920T AT08807920T ATE550718T1 AT E550718 T1 ATE550718 T1 AT E550718T1 AT 08807920 T AT08807920 T AT 08807920T AT 08807920 T AT08807920 T AT 08807920T AT E550718 T1 ATE550718 T1 AT E550718T1
- Authority
- AT
- Austria
- Prior art keywords
- storage means
- data reproduction
- peripheral bus
- reproduction system
- controlling
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/28—Flow control; Congestion control in relation to timing considerations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9063—Intermediate storage in different physical parts of a node or terminal
- H04L49/9068—Intermediate storage in different physical parts of a node or terminal in the network interface card
- H04L49/9073—Early interruption upon arrival of a fraction of a packet
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9063—Intermediate storage in different physical parts of a node or terminal
- H04L49/9078—Intermediate storage in different physical parts of a node or terminal using an external memory or storage device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0617—Improving the reliability of storage systems in relation to availability
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0661—Format or protocol conversion arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40267—Bus for use in transportation systems
- H04L2012/40273—Bus for use in transportation systems the transportation system being a vehicle
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP07118278 | 2007-10-11 | ||
PCT/IB2008/054118 WO2009047713A2 (en) | 2007-10-11 | 2008-10-08 | Method and system for controlling the admission of a storage means to a perpheral bus of a data reproduction system |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE550718T1 true ATE550718T1 (de) | 2012-04-15 |
Family
ID=40436252
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT08807920T ATE550718T1 (de) | 2007-10-11 | 2008-10-08 | Verfahren und system zur steuerung der zulassung eines speichermediums für einen peripheren bus eines datenreproduktionssystems |
Country Status (4)
Country | Link |
---|---|
US (1) | US8478919B2 (de) |
EP (1) | EP2210180B1 (de) |
AT (1) | ATE550718T1 (de) |
WO (1) | WO2009047713A2 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9571315B2 (en) | 2013-09-10 | 2017-02-14 | Infineon Technologies Ag | Sensor systems and methods utilizing band pass filter tuning |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5157666A (en) * | 1990-09-24 | 1992-10-20 | Xerox Corporation | Disk timing diagnostic |
US5890014A (en) * | 1996-08-05 | 1999-03-30 | Micronet Technology, Inc. | System for transparently identifying and matching an input/output profile to optimal input/output device parameters |
US5978284A (en) * | 1997-08-22 | 1999-11-02 | Micron Technology, Inc. | Synchronous memory with programmable read latency |
JPH11275122A (ja) * | 1998-03-25 | 1999-10-08 | Sony Corp | データ伝送装置 |
US6256059B1 (en) * | 1999-01-07 | 2001-07-03 | Intel Corporation | Automatic transfer of image information between imaging device and host system |
TW430091U (en) * | 1999-01-22 | 2001-04-11 | Liou Pei Jung | PnP interface circuit with message display capability |
US6233629B1 (en) * | 1999-02-05 | 2001-05-15 | Broadcom Corporation | Self-adjusting elasticity data buffer with preload value |
US6658512B1 (en) * | 2000-09-28 | 2003-12-02 | Intel Corporation | Admission control method for data communications over peripheral buses |
FI118830B (fi) * | 2001-02-08 | 2008-03-31 | Nokia Corp | Tietovirran toisto |
US6658523B2 (en) * | 2001-03-13 | 2003-12-02 | Micron Technology, Inc. | System latency levelization for read data |
EP1248179A1 (de) * | 2001-04-03 | 2002-10-09 | Hewlett-Packard Company | Selektive Aktivierung und Inaktivierung von an ein USB-System angeschlossenen Peripheriegeräten |
US7139937B1 (en) * | 2002-08-15 | 2006-11-21 | Network Appliance, Inc. | Method and apparatus to establish safe state in a volatile computer memory under multiple hardware and software malfunction conditions |
US20060064730A1 (en) | 2004-09-17 | 2006-03-23 | Jacob Rael | Configurable entertainment network |
US20060062541A1 (en) * | 2004-09-17 | 2006-03-23 | Sharp Laboratories Of America, Inc. | Method and system for preparing a removable HD for live TV control |
US7590779B2 (en) * | 2004-10-29 | 2009-09-15 | Microsoft Corporation | Determining latency and persistency of storage devices and presenting a save/read user interface through abstracted storage |
JP4748641B2 (ja) * | 2004-12-06 | 2011-08-17 | ルネサスエレクトロニクス株式会社 | 情報処理システム |
US7571297B2 (en) * | 2005-12-30 | 2009-08-04 | Intel Corporation | Data invalid signal for non-deterministic latency in a memory system |
US7873040B2 (en) * | 2007-08-20 | 2011-01-18 | Stephen KARLSGODT | Internet radio player |
-
2008
- 2008-10-08 US US12/681,965 patent/US8478919B2/en active Active
- 2008-10-08 EP EP08807920A patent/EP2210180B1/de active Active
- 2008-10-08 AT AT08807920T patent/ATE550718T1/de active
- 2008-10-08 WO PCT/IB2008/054118 patent/WO2009047713A2/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2009047713A3 (en) | 2009-05-28 |
US8478919B2 (en) | 2013-07-02 |
EP2210180B1 (de) | 2012-03-21 |
US20100228897A1 (en) | 2010-09-09 |
WO2009047713A2 (en) | 2009-04-16 |
EP2210180A2 (de) | 2010-07-28 |
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