ATE531080T1 - SYSTEM FOR SHIELDING INTEGRATED CIRCUITS - Google Patents

SYSTEM FOR SHIELDING INTEGRATED CIRCUITS

Info

Publication number
ATE531080T1
ATE531080T1 AT05740533T AT05740533T ATE531080T1 AT E531080 T1 ATE531080 T1 AT E531080T1 AT 05740533 T AT05740533 T AT 05740533T AT 05740533 T AT05740533 T AT 05740533T AT E531080 T1 ATE531080 T1 AT E531080T1
Authority
AT
Austria
Prior art keywords
integrated circuit
additional layer
integrated circuits
circuit
sub
Prior art date
Application number
AT05740533T
Other languages
German (de)
Inventor
John Fleming Walker
Original Assignee
Nds Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nds Ltd filed Critical Nds Ltd
Application granted granted Critical
Publication of ATE531080T1 publication Critical patent/ATE531080T1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • H10W42/405—

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Amplifiers (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
  • Debugging And Monitoring (AREA)

Abstract

A method for adding an additional layer to an integrated circuit, the method including providing an integrated circuit having an interconnect layer, depositing, over substantially all of an exposed surface of the integrated circuit, an additional layer of material whose conductivity can be altered, and selectively altering the conductivity of a first portion of the additional layer by selective annealing, to produce a sub-circuit in the additional layer, the sub-circuit being in operative electrical communication with the integrated circuit. Related apparatus and methods are also described.
AT05740533T 2004-05-17 2005-05-04 SYSTEM FOR SHIELDING INTEGRATED CIRCUITS ATE531080T1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
GBGB0410975.7A GB0410975D0 (en) 2004-05-17 2004-05-17 Chip shielding system and method
US57243404P 2004-05-19 2004-05-19
US65267305P 2005-02-14 2005-02-14
US65913305P 2005-03-07 2005-03-07
PCT/GB2005/001709 WO2005114733A1 (en) 2004-05-17 2005-05-04 System for shielding integrated circuits

Publications (1)

Publication Number Publication Date
ATE531080T1 true ATE531080T1 (en) 2011-11-15

Family

ID=32527179

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05740533T ATE531080T1 (en) 2004-05-17 2005-05-04 SYSTEM FOR SHIELDING INTEGRATED CIRCUITS

Country Status (8)

Country Link
US (1) US7732321B2 (en)
EP (1) EP1747584B1 (en)
CN (1) CN100505239C (en)
AT (1) ATE531080T1 (en)
ES (1) ES2375966T3 (en)
GB (1) GB0410975D0 (en)
IL (1) IL179178A (en)
WO (1) WO2005114733A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7991521B2 (en) * 2006-02-01 2011-08-02 Jervis B. Webb Company Variable path automated guided vehicle
EP2198384B1 (en) 2007-10-09 2012-12-05 NDS Limited Tamper-detecting electronic system
EP2300954B1 (en) 2008-06-24 2014-12-03 NDS Limited Security within integrated circuits
US10249579B2 (en) * 2017-04-25 2019-04-02 Nuvoton Technology Corporation Active shield for protecting a device from backside attacks
US10622316B2 (en) * 2017-05-08 2020-04-14 International Business Machines Corporation Security arrangement for integrated circuits using microcapsules in dielectric layer

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4214918A (en) 1978-10-12 1980-07-29 Stanford University Method of forming polycrystalline semiconductor interconnections, resistors and contacts by applying radiation beam
US4339285A (en) * 1980-07-28 1982-07-13 Rca Corporation Method for fabricating adjacent conducting and insulating regions in a film by laser irradiation
US4583011A (en) 1983-11-01 1986-04-15 Standard Microsystems Corp. Circuit to prevent pirating of an MOS circuit
US4766516A (en) * 1987-09-24 1988-08-23 Hughes Aircraft Company Method and apparatus for securing integrated circuits from unauthorized copying and use
US4920402A (en) 1988-02-15 1990-04-24 Mitsubishi Denki Kabushiki Kaisha Integrated circuit device
US4908226A (en) * 1988-05-23 1990-03-13 Hughes Aircraft Company Selective area nucleation and growth method for metal chemical vapor deposition using focused ion beams
US5202591A (en) 1991-08-09 1993-04-13 Hughes Aircraft Company Dynamic circuit disguise for microelectronic integrated digital logic circuits
IL106513A (en) 1992-07-31 1997-03-18 Hughes Aircraft Co Integrated circuit security system and method with implanted interconnections
US5468990A (en) 1993-07-22 1995-11-21 National Semiconductor Corp. Structures for preventing reverse engineering of integrated circuits
US5883000A (en) 1995-05-03 1999-03-16 Lsi Logic Corporation Circuit device interconnection by direct writing of patterns therein
US5783846A (en) 1995-09-22 1998-07-21 Hughes Electronics Corporation Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
US5824571A (en) 1995-12-20 1998-10-20 Intel Corporation Multi-layered contacting for securing integrated circuits
IL117085A (en) 1996-02-08 2005-07-25 Milsys Ltd Secure computer system
US5793095A (en) * 1996-08-21 1998-08-11 Vlsi Technology, Inc. Custom laser conductor linkage for integrated circuits
US6017829A (en) * 1997-04-01 2000-01-25 Micron Technology, Inc. Implanted conductor and methods of making
US5973375A (en) 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants
JP2002529928A (en) * 1998-11-05 2002-09-10 インフィネオン テクノロジース アクチエンゲゼルシャフト Protection circuit for IC integrated circuit
JP3583633B2 (en) 1998-12-21 2004-11-04 シャープ株式会社 Method for manufacturing semiconductor device
US6117762A (en) 1999-04-23 2000-09-12 Hrl Laboratories, Llc Method and apparatus using silicide layer for protecting integrated circuits from reverse engineering
US7005733B2 (en) 1999-12-30 2006-02-28 Koemmerling Oliver Anti tamper encapsulation for an integrated circuit
AU2001223813A1 (en) 2000-01-20 2001-07-31 Zavitan Semiconductors, Inc. Personalized hardware
US6515304B1 (en) * 2000-06-23 2003-02-04 International Business Machines Corporation Device for defeating reverse engineering of integrated circuits by optical means
DE60140722D1 (en) * 2000-09-05 2010-01-21 Nxp Bv Integrated electromagnetic shielding device
US6815816B1 (en) 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
JP2002198490A (en) * 2000-12-26 2002-07-12 Toshiba Corp Semiconductor device

Also Published As

Publication number Publication date
ES2375966T3 (en) 2012-03-07
US7732321B2 (en) 2010-06-08
CN1954426A (en) 2007-04-25
CN100505239C (en) 2009-06-24
EP1747584A1 (en) 2007-01-31
GB0410975D0 (en) 2004-06-16
EP1747584B1 (en) 2011-10-26
WO2005114733A1 (en) 2005-12-01
US20080093742A1 (en) 2008-04-24
IL179178A0 (en) 2007-03-08
IL179178A (en) 2011-01-31

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Legal Events

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