ATE528708T1 - System und verfahren für leistungsverwaltung in einer java beschleuniger-umgebung - Google Patents

System und verfahren für leistungsverwaltung in einer java beschleuniger-umgebung

Info

Publication number
ATE528708T1
ATE528708T1 AT01980250T AT01980250T ATE528708T1 AT E528708 T1 ATE528708 T1 AT E528708T1 AT 01980250 T AT01980250 T AT 01980250T AT 01980250 T AT01980250 T AT 01980250T AT E528708 T1 ATE528708 T1 AT E528708T1
Authority
AT
Austria
Prior art keywords
java
methods
performance management
processor
host processor
Prior art date
Application number
AT01980250T
Other languages
English (en)
Inventor
David Envoy
Lonnie Goff
Bonnie Sexton
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE528708T1 publication Critical patent/ATE528708T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
AT01980250T 2000-08-23 2001-08-17 System und verfahren für leistungsverwaltung in einer java beschleuniger-umgebung ATE528708T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/645,468 US6766460B1 (en) 2000-08-23 2000-08-23 System and method for power management in a Java accelerator environment
PCT/EP2001/009509 WO2002017064A2 (en) 2000-08-23 2001-08-17 System and method for power management in a java accelerator environment

Publications (1)

Publication Number Publication Date
ATE528708T1 true ATE528708T1 (de) 2011-10-15

Family

ID=24589147

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01980250T ATE528708T1 (de) 2000-08-23 2001-08-17 System und verfahren für leistungsverwaltung in einer java beschleuniger-umgebung

Country Status (7)

Country Link
US (1) US6766460B1 (de)
EP (1) EP1368729B1 (de)
JP (1) JP2004507814A (de)
KR (1) KR20020085883A (de)
CN (1) CN100437433C (de)
AT (1) ATE528708T1 (de)
WO (1) WO2002017064A2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1387258A3 (de) * 2002-07-31 2008-01-02 Texas Instruments Incorporated Prozessor-Prozessor-Synchronisierung
TW583530B (en) * 2002-08-20 2004-04-11 Via Tech Inc Method of using N division operation to switch CPU work voltage
US8086884B2 (en) * 2002-12-16 2011-12-27 Hewlett-Packard Development Company, L.P. System and method for implementing an integrated circuit having dynamically variable power limit
US7444524B2 (en) * 2002-12-30 2008-10-28 Intel Corporation Dynamic voltage transitions
US7203857B2 (en) * 2003-03-28 2007-04-10 Elliptic Semiconductor Inc. On-demand clock switching
US7281149B2 (en) * 2004-02-24 2007-10-09 Hewlett-Packard Development Company, L.P. Systems and methods for transitioning a CPU from idle to active
US7409670B1 (en) * 2004-04-01 2008-08-05 Altera Corporation Scheduling logic on a programmable device implemented using a high-level language
US7370311B1 (en) 2004-04-01 2008-05-06 Altera Corporation Generating components on a programmable device using a high-level language
US7536567B2 (en) * 2004-12-10 2009-05-19 Hewlett-Packard Development Company, L.P. BIOS-based systems and methods of processor power management
US7502948B2 (en) * 2004-12-30 2009-03-10 Intel Corporation Method, system, and apparatus for selecting a maximum operation point based on number of active cores and performance level of each of the active cores
US7346863B1 (en) 2005-09-28 2008-03-18 Altera Corporation Hardware acceleration of high-level language code sequences on programmable devices
US7752480B2 (en) * 2006-08-18 2010-07-06 International Business Machines Corporation System and method for switching digital circuit clock net driver without losing clock pulses
US8086977B2 (en) * 2006-08-18 2011-12-27 International Business Machines Corporation Design Structure for switching digital circuit clock net driver without losing clock pulses
US7962775B1 (en) * 2007-01-10 2011-06-14 Marvell International Ltd. Methods and apparatus for power mode control for PDA with separate communications and applications processors
JP5084372B2 (ja) 2007-07-03 2012-11-28 キヤノン株式会社 データ処理装置およびデータ処理装置の制御方法
GB2452778A (en) * 2007-09-17 2009-03-18 Toshiba Res Europ Ltd Linking dynamic voltage scaling in master and slave modules
US8949635B2 (en) * 2007-09-28 2015-02-03 Intel Corporation Integrated circuit performance improvement across a range of operating conditions and physical constraints
US7992015B2 (en) * 2008-02-05 2011-08-02 Dell Products L.P. Processor performance state optimization
KR101832821B1 (ko) * 2012-09-10 2018-02-27 삼성전자주식회사 동적 전압 주파수 스케일링 방법, 어플리케이션 프로세서 및 이를 구비하는 모바일 기기
US11073894B2 (en) * 2019-05-24 2021-07-27 Qualcomm Incorporated System power management for peripheral component interconnect express (PCIE)-based devices

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US565679A (en) 1896-08-11 William glanzer
US670496A (en) 1900-10-20 1901-03-26 Eureka Shoe Company Hand tacking tool.
US4171539A (en) * 1977-12-19 1979-10-16 The Bendix Corporation Power strobed digital computer system
US4203153A (en) * 1978-04-12 1980-05-13 Diebold, Incorporated Circuit for reducing power consumption in battery operated microprocessor based systems
US5497497A (en) * 1989-11-03 1996-03-05 Compaq Computer Corp. Method and apparatus for resetting multiple processors using a common ROM
US5251320A (en) * 1990-05-25 1993-10-05 International Business Machines Corporation Power controller for permitting multiple processors to power up shared input/output devices and inhibit power down until all processors have ceased service with the I/O devices
US5452401A (en) * 1992-03-31 1995-09-19 Seiko Epson Corporation Selective power-down for high performance CPU/system
US5392437A (en) * 1992-11-06 1995-02-21 Intel Corporation Method and apparatus for independently stopping and restarting functional units
US6026484A (en) 1993-11-30 2000-02-15 Texas Instruments Incorporated Data processing apparatus, system and method for if, then, else operation using write priority
US6116768A (en) 1993-11-30 2000-09-12 Texas Instruments Incorporated Three input arithmetic logic unit with barrel rotator
US5517649A (en) * 1994-04-19 1996-05-14 Maxtor Corporation Adaptive power management for hard disk drives
US5530932A (en) * 1994-12-23 1996-06-25 Intel Corporation Cache coherent multiprocessing computer system with reduced power operating features
US5996083A (en) * 1995-08-11 1999-11-30 Hewlett-Packard Company Microprocessor having software controllable power consumption
US5983340A (en) 1995-12-07 1999-11-09 Conexant Systems, Inc. Microprocessor system with flexible instruction controlled by prior instruction
US6026485A (en) 1996-01-24 2000-02-15 Sun Microsystems, Inc. Instruction folding for a stack-based machine
US5991863A (en) 1996-08-30 1999-11-23 Texas Instruments Incorporated Single carry/borrow propagate adder/decrementer for generating register stack addresses in a microprocessor
US5953741A (en) 1996-11-27 1999-09-14 Vlsi Technology, Inc. Stack cache for stack-based processor and method thereof
US6009505A (en) 1996-12-02 1999-12-28 Compaq Computer Corp. System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot
US6330659B1 (en) * 1997-11-06 2001-12-11 Iready Corporation Hardware accelerator for an object-oriented programming language
DE19749068B4 (de) * 1997-11-06 2005-03-10 Bosch Gmbh Robert Verfahren und Vorrichtung zur Überwachung eines Rechnersystems bestehend aus wenigstens zwei Prozessoren
US6035408A (en) * 1998-01-06 2000-03-07 Magnex Corp. Portable computer with dual switchable processors for selectable power consumption
JP3857052B2 (ja) 1998-07-02 2006-12-13 株式会社ルネサステクノロジ マイクロプロセッサ
US6240521B1 (en) * 1998-09-10 2001-05-29 International Business Machines Corp. Sleep mode transition between processors sharing an instruction set and an address space
JP2000194668A (ja) * 1998-12-25 2000-07-14 Toshiba Corp 計算機システム及び同システムに適用される中間コ―ド実行装置並びに中間コ―ド実行方法
US6341354B1 (en) * 1999-04-16 2002-01-22 Smartpower Corporation Energy-conserving computer accessible remotely and instantaneously by providing keep-alive power to memory
US6425086B1 (en) * 1999-04-30 2002-07-23 Intel Corporation Method and apparatus for dynamic power control of a low power processor
US6507946B2 (en) * 1999-06-11 2003-01-14 International Business Machines Corporation Process and system for Java virtual method invocation

Also Published As

Publication number Publication date
EP1368729B1 (de) 2011-10-12
US6766460B1 (en) 2004-07-20
WO2002017064A3 (en) 2003-10-09
CN100437433C (zh) 2008-11-26
CN1478224A (zh) 2004-02-25
WO2002017064A2 (en) 2002-02-28
EP1368729A2 (de) 2003-12-10
KR20020085883A (ko) 2002-11-16
JP2004507814A (ja) 2004-03-11

Similar Documents

Publication Publication Date Title
ATE528708T1 (de) System und verfahren für leistungsverwaltung in einer java beschleuniger-umgebung
AU2891499A (en) System and method for model mining complex information technology systems
IL171906A (en) Instructions to assist the processing of a cipher message
WO2004053634A3 (en) Generating java bean code
WO2002041146A3 (en) Instruction processor systems and methods
WO2006032001A3 (en) Methods and system for executing a program in multiple execution environments
WO2004102438A3 (en) Business process management for a message-based exchange infrastructure
WO2004042499A3 (en) Debugging using control-dataflow graph with reconfigurable hardware emulation
ATE437393T1 (de) Verfahren und vorrichtung zur bereitstellung eines entkoppelten leistungsverwaltungszustands
DE60142152D1 (de) Virtualisierung von E/A-Adapterressourcen
TW200641685A (en) Digital signal system with accelerators and method for operating the same
EP1536322A3 (de) System und Verfahren zum Entwurf einer Zielanwendung für ein Zielsystem in einer Querentwicklungumgebung.
ATE473351T1 (de) Universalverbindungsgrenzfläche für unterwasserkomplettierungssysteme
DE60032801D1 (de) System zur abhängigkeitsuntersuchung von netzwerkereignissen mittels protokollmodelle
ATE520077T1 (de) Betriebsmittelverwaltung
GB2378546B (en) Automatic configuration of performance management tools
ATE385325T1 (de) Verfahren und einrichtung zur konfiguration eines steuerungssystems
WO2003083617A3 (en) Hardware-translator-based custom method invocation system and method
TW200612331A (en) Method for forming a firmware framework of Intelligent Platform Management Interface
WO2002073479A3 (en) Controlling the creation of process instances in workflow management systems
DE60332450D1 (de) Vorrichtung und verfahren zur verwaltung von betriebssystemparametern
EP1679642A4 (de) Einrichtungs-vorrichtungskostenschätzprogramm und kostenschätzeinrichtung
TW200701198A (en) Method for executing scheduled record task
TW200617781A (en) Program invocation methods and devices utilizing same
WO2001065369A3 (de) Rechnerknotenarchitektur mit dediziertem middleware prozessor

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties