ATE519154T1 - Vorrichtung und verfahren zur durchführung von permutationsoperationen auf daten - Google Patents
Vorrichtung und verfahren zur durchführung von permutationsoperationen auf datenInfo
- Publication number
- ATE519154T1 ATE519154T1 AT08871314T AT08871314T ATE519154T1 AT E519154 T1 ATE519154 T1 AT E519154T1 AT 08871314 T AT08871314 T AT 08871314T AT 08871314 T AT08871314 T AT 08871314T AT E519154 T1 ATE519154 T1 AT E519154T1
- Authority
- AT
- Austria
- Prior art keywords
- ordering
- circuitry
- data
- permutation
- control
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
- G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
- G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general
- G06F7/26—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general the sorted data being recorded on the original record carrier within the same space in which the data had been recorded prior to their sorting, without using intermediate storage
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/764—Masking
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/768—Data position reversal, e.g. bit reversal, byte swapping
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30018—Bit or string instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0801137.1A GB2456775B (en) | 2008-01-22 | 2008-01-22 | Apparatus and method for performing permutation operations on data |
PCT/GB2008/003948 WO2009092987A1 (en) | 2008-01-22 | 2008-11-26 | Apparatus and method for performing permutation operations on data |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE519154T1 true ATE519154T1 (de) | 2011-08-15 |
Family
ID=39166156
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT08871314T ATE519154T1 (de) | 2008-01-22 | 2008-11-26 | Vorrichtung und verfahren zur durchführung von permutationsoperationen auf daten |
Country Status (11)
Country | Link |
---|---|
US (1) | US8423752B2 (de) |
EP (1) | EP2235622B1 (de) |
JP (1) | JP5279843B2 (de) |
KR (1) | KR20100120154A (de) |
CN (1) | CN101925877B (de) |
AT (1) | ATE519154T1 (de) |
GB (1) | GB2456775B (de) |
IL (1) | IL206176A0 (de) |
MY (1) | MY150315A (de) |
TW (1) | TW200935304A (de) |
WO (1) | WO2009092987A1 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120047344A1 (en) * | 2010-08-17 | 2012-02-23 | Sheaffer Gad S | Methods and apparatuses for re-ordering data |
US20120254588A1 (en) * | 2011-04-01 | 2012-10-04 | Jesus Corbal San Adrian | Systems, apparatuses, and methods for blending two source operands into a single destination using a writemask |
CN103502935B (zh) | 2011-04-01 | 2016-10-12 | 英特尔公司 | 向量友好指令格式及其执行 |
US20120254592A1 (en) * | 2011-04-01 | 2012-10-04 | Jesus Corbal San Adrian | Systems, apparatuses, and methods for expanding a memory source into a destination register and compressing a source register into a destination memory location |
WO2013006030A1 (en) * | 2011-07-06 | 2013-01-10 | Mimos Berhad | Apparatus and method for performing parallel bits distribution with bi-delta network |
MY174802A (en) * | 2011-07-12 | 2020-05-15 | Mimos Berhad | Apparatus and method of performing bit separation |
GB2497070B (en) * | 2011-11-17 | 2015-11-25 | Advanced Risc Mach Ltd | Cryptographic support instructions |
US10223112B2 (en) | 2011-12-22 | 2019-03-05 | Intel Corporation | Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset |
CN104011646B (zh) | 2011-12-22 | 2018-03-27 | 英特尔公司 | 用于产生按照数值顺序的连续整数的序列的处理器、方法、系统和指令 |
US10157061B2 (en) | 2011-12-22 | 2018-12-18 | Intel Corporation | Instructions for storing in general purpose registers one of two scalar constants based on the contents of vector write masks |
CN104011644B (zh) | 2011-12-22 | 2017-12-08 | 英特尔公司 | 用于产生按照数值顺序的相差恒定跨度的整数的序列的处理器、方法、系统和指令 |
CN108681465B (zh) * | 2011-12-22 | 2022-08-02 | 英特尔公司 | 用于产生整数序列的处理器、处理器核及系统 |
CN104025020B (zh) | 2011-12-23 | 2017-06-13 | 英特尔公司 | 用于执行掩码位压缩的系统、装置以及方法 |
WO2013101227A1 (en) * | 2011-12-30 | 2013-07-04 | Intel Corporation | Vector frequency compress instruction |
US9098449B2 (en) | 2013-03-15 | 2015-08-04 | Analog Devices, Inc. | FFT accelerator |
US9639503B2 (en) | 2013-03-15 | 2017-05-02 | Qualcomm Incorporated | Vector indirect element vertical addressing mode with horizontal permute |
KR102122406B1 (ko) * | 2013-11-06 | 2020-06-12 | 삼성전자주식회사 | 셔플 명령어 처리 장치 및 방법 |
WO2015089314A1 (en) | 2013-12-11 | 2015-06-18 | Mill Computing, Inc. | Computer processor employing operand data with associated meta-data |
EP3001307B1 (de) * | 2014-09-25 | 2019-11-13 | Intel Corporation | Bit-Shuffle-Prozessoren, Verfahren, Systeme und Anweisungen |
US9772849B2 (en) * | 2014-11-14 | 2017-09-26 | Intel Corporation | Four-dimensional morton coordinate conversion processors, methods, systems, and instructions |
US9772848B2 (en) * | 2014-11-14 | 2017-09-26 | Intel Corporation | Three-dimensional morton coordinate conversion processors, methods, systems, and instructions |
US10013253B2 (en) * | 2014-12-23 | 2018-07-03 | Intel Corporation | Method and apparatus for performing a vector bit reversal |
US9785437B2 (en) * | 2014-12-23 | 2017-10-10 | Intel Corporation | Method and apparatus for performing a vector bit reversal and crossing |
US10459723B2 (en) * | 2015-07-20 | 2019-10-29 | Qualcomm Incorporated | SIMD instructions for multi-stage cube networks |
US9965275B2 (en) * | 2015-07-31 | 2018-05-08 | Arm Limited | Element size increasing instruction |
US10198264B2 (en) * | 2015-12-15 | 2019-02-05 | Intel Corporation | Sorting data and merging sorted data in an instruction set architecture |
US20170177355A1 (en) * | 2015-12-18 | 2017-06-22 | Intel Corporation | Instruction and Logic for Permute Sequence |
US11170294B2 (en) * | 2016-01-07 | 2021-11-09 | Intel Corporation | Hardware accelerated machine learning |
US9959247B1 (en) | 2017-02-17 | 2018-05-01 | Google Llc | Permuting in a matrix-vector processor |
CN108733352B (zh) * | 2017-04-25 | 2021-06-11 | 上海寒武纪信息科技有限公司 | 支持向量排序的装置、方法及应用 |
US20200034698A1 (en) * | 2017-04-20 | 2020-01-30 | Shanghai Cambricon Information Technology Co., Ltd. | Computing apparatus and related product |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5673321A (en) * | 1995-06-29 | 1997-09-30 | Hewlett-Packard Company | Efficient selection and mixing of multiple sub-word items packed into two or more computer words |
JP3450788B2 (ja) * | 2000-03-06 | 2003-09-29 | 松下電器産業株式会社 | 復号化装置および復号化処理方法 |
US6718492B1 (en) * | 2000-04-07 | 2004-04-06 | Sun Microsystems, Inc. | System and method for arranging bits of a data word in accordance with a mask |
AU2001286383A1 (en) * | 2000-05-05 | 2001-11-26 | Ruby B. Lee | A method and system for performing permutations with bit permutation instructions |
WO2001089131A2 (en) * | 2000-05-05 | 2001-11-22 | Lee Ruby B | A method and system for performing permutations using permutation instructions based on modified omega and flip stages |
US6922472B2 (en) * | 2000-05-05 | 2005-07-26 | Teleputers, Llc | Method and system for performing permutations using permutation instructions based on butterfly networks |
US20030002474A1 (en) * | 2001-03-21 | 2003-01-02 | Thomas Alexander | Multi-stream merge network for data width conversion and multiplexing |
JP2002351858A (ja) * | 2001-05-30 | 2002-12-06 | Fujitsu Ltd | 処理装置 |
US20040054877A1 (en) * | 2001-10-29 | 2004-03-18 | Macy William W. | Method and apparatus for shuffling data |
KR100860660B1 (ko) * | 2002-01-09 | 2008-09-26 | 삼성전자주식회사 | 통신시스템의 인터리빙 장치 및 방법 |
JP3857614B2 (ja) * | 2002-06-03 | 2006-12-13 | 松下電器産業株式会社 | プロセッサ |
US7730292B2 (en) * | 2003-03-31 | 2010-06-01 | Hewlett-Packard Development Company, L.P. | Parallel subword instructions for directing results to selected subword locations of data processor result register |
US7660840B2 (en) * | 2003-09-29 | 2010-02-09 | Broadcom Corporation | Method, system, and computer program product for executing SIMD instruction for flexible FFT butterfly |
US7428564B2 (en) * | 2003-11-26 | 2008-09-23 | Gibb Sean G | Pipelined FFT processor with memory address interleaving |
US20060095485A1 (en) * | 2004-10-30 | 2006-05-04 | Moore George S | System and method for permuting a vector |
US7933405B2 (en) * | 2005-04-08 | 2011-04-26 | Icera Inc. | Data access and permute unit |
US7856579B2 (en) * | 2006-04-28 | 2010-12-21 | Industrial Technology Research Institute | Network for permutation or de-permutation utilized by channel coding algorithm |
US20070106881A1 (en) * | 2005-11-08 | 2007-05-10 | Stexar Corp. | Bit-wise operation followed by byte-wise permutation for implementing DSP data manipulation instructions |
US7868894B2 (en) * | 2006-11-28 | 2011-01-11 | International Business Machines Corporation | Operand multiplexor control modifier instruction in a fine grain multithreaded vector microprocessor |
US8285766B2 (en) * | 2007-05-23 | 2012-10-09 | The Trustees Of Princeton University | Microprocessor shifter circuits utilizing butterfly and inverse butterfly routing circuits, and control circuits therefor |
US8051239B2 (en) * | 2007-06-04 | 2011-11-01 | Nokia Corporation | Multiple access for parallel turbo decoder |
-
2008
- 2008-01-22 GB GB0801137.1A patent/GB2456775B/en active Active
- 2008-11-26 KR KR1020107018207A patent/KR20100120154A/ko not_active Application Discontinuation
- 2008-11-26 CN CN200880125258.7A patent/CN101925877B/zh active Active
- 2008-11-26 JP JP2010542674A patent/JP5279843B2/ja active Active
- 2008-11-26 AT AT08871314T patent/ATE519154T1/de not_active IP Right Cessation
- 2008-11-26 EP EP08871314A patent/EP2235622B1/de active Active
- 2008-11-26 WO PCT/GB2008/003948 patent/WO2009092987A1/en active Application Filing
- 2008-11-26 MY MYPI2010002199A patent/MY150315A/en unknown
- 2008-12-04 TW TW097147150A patent/TW200935304A/zh unknown
- 2008-12-16 US US12/314,760 patent/US8423752B2/en active Active
-
2010
- 2010-06-03 IL IL206176A patent/IL206176A0/en unknown
Also Published As
Publication number | Publication date |
---|---|
MY150315A (en) | 2013-12-31 |
KR20100120154A (ko) | 2010-11-12 |
CN101925877B (zh) | 2014-04-23 |
US20090187746A1 (en) | 2009-07-23 |
GB2456775A (en) | 2009-07-29 |
CN101925877A (zh) | 2010-12-22 |
EP2235622B1 (de) | 2011-08-03 |
IL206176A0 (en) | 2010-12-30 |
GB0801137D0 (en) | 2008-02-27 |
US8423752B2 (en) | 2013-04-16 |
EP2235622A1 (de) | 2010-10-06 |
TW200935304A (en) | 2009-08-16 |
WO2009092987A1 (en) | 2009-07-30 |
JP2011510389A (ja) | 2011-03-31 |
GB2456775B (en) | 2012-10-31 |
JP5279843B2 (ja) | 2013-09-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ATE519154T1 (de) | Vorrichtung und verfahren zur durchführung von permutationsoperationen auf daten | |
MY168503A (en) | Cryptographic support instructions | |
ATE521034T1 (de) | Einrichtung und verfahren zur konfiguration eines steuerungssystems | |
JP2008131311A5 (de) | ||
ATE477539T1 (de) | Verfahren, system und computerprogramm zum prüfen von softwareanwendungen auf der basis mehrerer datenquellen | |
ATE456837T1 (de) | Verschleierung von ausführungsspuren eines computerprogrammcodes | |
JP2012068783A5 (ja) | 価値付加方法、価値付加装置、及び、プログラム | |
JP2010539593A5 (de) | ||
CA2953788C (en) | Automated code lockdown to reduce attack surface for software | |
GB2537533A (en) | A data processing apparatus and method for performing segmented operations | |
JP2016207166A5 (de) | ||
ATE493703T1 (de) | Programmierbare datenverarbeitungsschaltung, die simd-befehle unterstützt | |
WO2014004050A3 (en) | Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op) | |
NO20083465L (no) | Transformasjoner med felles faktorer | |
EP2879054A3 (de) | Kommunikationssteuerungsvorrichtung, Informationsverarbeitungsvorrichtung, Parallelcomputersystem und Steuerungsverfahren für Parallelcomputersystem | |
WO2012040552A3 (en) | Method and apparatus for universal logical operations | |
GB2571685A (en) | An apparatus and method for processing input operand values | |
GB2555315A (en) | Element size increasing instruction | |
ATE542218T1 (de) | Audioinformationsverarbeitungsgerät, audioinformationsverarbeitungsverfahren und dazugehöriges computer-programm | |
ATE507530T1 (de) | Verfahren und vorrichtung für konditionales broadcast von barrierenoperationen | |
RU2014106624A (ru) | Точная сигнализация исключения для архитектуры с множеством данных | |
GB2565024A (en) | Method and apparatus for reordering in a non-uniform compute device | |
JP2006331399A5 (de) | ||
JP2015099999A5 (de) | ||
ATE524793T1 (de) | Vorrichtung und verfahren zur zusammenfassung mehrerer teilbilder für beliebige abbildungsflächen |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |