ATE476701T1 - Verfahren und vorrichtung zur verwaltung eines rücksprungstapels - Google Patents

Verfahren und vorrichtung zur verwaltung eines rücksprungstapels

Info

Publication number
ATE476701T1
ATE476701T1 AT06735437T AT06735437T ATE476701T1 AT E476701 T1 ATE476701 T1 AT E476701T1 AT 06735437 T AT06735437 T AT 06735437T AT 06735437 T AT06735437 T AT 06735437T AT E476701 T1 ATE476701 T1 AT E476701T1
Authority
AT
Austria
Prior art keywords
return
stack
instruction
addresses
procedure
Prior art date
Application number
AT06735437T
Other languages
English (en)
Inventor
Rodney Smith
Jeffrey Bridges
James Dieffenderfer
Thomas Sartorius
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Application granted granted Critical
Publication of ATE476701T1 publication Critical patent/ATE476701T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms
    • G06F9/4486—Formation of subprogram jump address

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Pile Receivers (AREA)
AT06735437T 2005-02-18 2006-02-17 Verfahren und vorrichtung zur verwaltung eines rücksprungstapels ATE476701T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/061,975 US7203826B2 (en) 2005-02-18 2005-02-18 Method and apparatus for managing a return stack
PCT/US2006/005775 WO2006089188A2 (en) 2005-02-18 2006-02-17 Method and apparatus for managing a return stack

Publications (1)

Publication Number Publication Date
ATE476701T1 true ATE476701T1 (de) 2010-08-15

Family

ID=36914213

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06735437T ATE476701T1 (de) 2005-02-18 2006-02-17 Verfahren und vorrichtung zur verwaltung eines rücksprungstapels

Country Status (10)

Country Link
US (1) US7203826B2 (de)
EP (1) EP1853995B1 (de)
JP (2) JP2008530712A (de)
KR (1) KR101026978B1 (de)
CN (2) CN101156135A (de)
AT (1) ATE476701T1 (de)
BR (1) BRPI0608139A2 (de)
DE (1) DE602006015923D1 (de)
IL (1) IL185303A0 (de)
WO (1) WO2006089188A2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI261197B (en) * 2005-05-20 2006-09-01 Benq Corp Method for finding function call stack in run time for a computer system
US20070061555A1 (en) * 2005-09-15 2007-03-15 St Clair Michael Call return tracking technique
US8578347B1 (en) * 2006-12-28 2013-11-05 The Mathworks, Inc. Determining stack usage of generated code from a model
EP2592792B1 (de) * 2010-08-30 2017-09-27 Huawei Technologies Co. Ltd. Verfahren zur verarbeitung von anweisungen für einen netzwerkprozessor und netzwerkprozessor
US10042776B2 (en) * 2012-11-20 2018-08-07 Arm Limited Prefetching based upon return addresses
GB2542831B (en) * 2015-09-30 2018-05-30 Imagination Tech Ltd Fetch unit for predicting target for subroutine return instructions
US20170090927A1 (en) * 2015-09-30 2017-03-30 Paul Caprioli Control transfer instructions indicating intent to call or return
US20210303470A1 (en) * 2020-03-27 2021-09-30 Micron Technology, Inc. Sequential prefetching through a linking array
US11586440B2 (en) * 2021-06-01 2023-02-21 International Business Machines Corporation Link stack based instruction prefetch augmentation

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* Cited by examiner, † Cited by third party
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JPS60105046A (ja) * 1983-11-11 1985-06-10 Nec Corp アドレススタツク制御方式
JPS63311439A (ja) * 1987-06-12 1988-12-20 Nec Corp コ−ル・リタ−ン方式
JPH01216429A (ja) * 1988-02-24 1989-08-30 Nec Corp マイクロコンピュータ
US5193205A (en) * 1988-03-01 1993-03-09 Mitsubishi Denki Kabushiki Kaisha Pipeline processor, with return address stack storing only pre-return processed address for judging validity and correction of unprocessed address
JPH02224026A (ja) * 1988-11-17 1990-09-06 Nec Corp スタック回路
JP3049561B2 (ja) * 1990-05-21 2000-06-05 東洋通信機株式会社 プロダクションシステムとプロダクションシステムの変換装置
US5522072A (en) * 1990-09-04 1996-05-28 At&T Corp. Arrangement for efficiently transferring program execution between subprograms
JPH04317129A (ja) * 1991-04-17 1992-11-09 Nec Ibaraki Ltd マイクロプログラムアドレススタック回路
US5313634A (en) 1992-07-28 1994-05-17 International Business Machines Corporation Computer system branch prediction of subroutine returns
JPH0728644A (ja) * 1993-07-12 1995-01-31 Seiko Epson Corp データ処理装置
US6035321A (en) 1994-06-29 2000-03-07 Acis, Inc. Method for enforcing a hierarchical invocation structure in real time asynchronous software applications
US5706491A (en) * 1994-10-18 1998-01-06 Cyrix Corporation Branch processing unit with a return stack including repair using pointers from different pipe stages
US6035118A (en) * 1997-06-23 2000-03-07 Sun Microsystems, Inc. Mechanism to eliminate the performance penalty of computed jump targets in a pipelined processor
US6151671A (en) * 1998-02-20 2000-11-21 Intel Corporation System and method of maintaining and utilizing multiple return stack buffers
JP3513038B2 (ja) * 1998-12-10 2004-03-31 富士通株式会社 命令フェッチ制御装置
US6289444B1 (en) * 1999-06-02 2001-09-11 International Business Machines Corporation Method and apparatus for subroutine call-return prediction
US6560696B1 (en) * 1999-12-29 2003-05-06 Intel Corporation Return register stack target predictor
US20040003213A1 (en) 2002-06-28 2004-01-01 Bockhaus John W. Method for reducing the latency of a branch target calculation by linking the branch target address cache with the call-return stack
US20040049666A1 (en) * 2002-09-11 2004-03-11 Annavaram Murali M. Method and apparatus for variable pop hardware return address stack
CN1447244A (zh) * 2003-04-03 2003-10-08 杭州中天微系统有限公司 一种设计在cpu里的侦测缓冲区溢出的方法
US7293265B2 (en) * 2003-05-15 2007-11-06 Intel Corporation Methods and apparatus to perform return-address prediction
CN1294468C (zh) * 2004-04-09 2007-01-10 南京大学 一种防止缓冲区溢出攻击的动态堆栈内存管理方法

Also Published As

Publication number Publication date
US7203826B2 (en) 2007-04-10
US20060190711A1 (en) 2006-08-24
JP5579694B2 (ja) 2014-08-27
CN102707933B (zh) 2017-03-01
EP1853995B1 (de) 2010-08-04
BRPI0608139A2 (pt) 2009-11-17
JP2012123810A (ja) 2012-06-28
IL185303A0 (en) 2008-02-09
KR20070106783A (ko) 2007-11-05
KR101026978B1 (ko) 2011-04-11
EP1853995A2 (de) 2007-11-14
CN101156135A (zh) 2008-04-02
JP2008530712A (ja) 2008-08-07
CN102707933A (zh) 2012-10-03
DE602006015923D1 (de) 2010-09-16
WO2006089188A2 (en) 2006-08-24
WO2006089188A3 (en) 2007-01-04

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties