ATE470186T1 - Asynchroner kreuzschienenschalter mit deterministischer oder arbitrierender steuerung - Google Patents

Asynchroner kreuzschienenschalter mit deterministischer oder arbitrierender steuerung

Info

Publication number
ATE470186T1
ATE470186T1 AT03703946T AT03703946T ATE470186T1 AT E470186 T1 ATE470186 T1 AT E470186T1 AT 03703946 T AT03703946 T AT 03703946T AT 03703946 T AT03703946 T AT 03703946T AT E470186 T1 ATE470186 T1 AT E470186T1
Authority
AT
Austria
Prior art keywords
deterministic
crossbar switch
links
arbitration control
operable
Prior art date
Application number
AT03703946T
Other languages
German (de)
English (en)
Inventor
Uri Cummings
Andrew Lines
Original Assignee
Fulcrum Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fulcrum Microsystems Inc filed Critical Fulcrum Microsystems Inc
Application granted granted Critical
Publication of ATE470186T1 publication Critical patent/ATE470186T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/0004—Selecting arrangements using crossbar selectors in the switching stages

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multi Processors (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
AT03703946T 2002-01-25 2003-01-21 Asynchroner kreuzschienenschalter mit deterministischer oder arbitrierender steuerung ATE470186T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US35213102P 2002-01-25 2002-01-25
US10/136,025 US7283557B2 (en) 2002-01-25 2002-04-30 Asynchronous crossbar with deterministic or arbitrated control
PCT/US2003/001860 WO2003065236A1 (en) 2002-01-25 2003-01-21 Asynchronous crossbar with deterministic or arbitrated control

Publications (1)

Publication Number Publication Date
ATE470186T1 true ATE470186T1 (de) 2010-06-15

Family

ID=27668059

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03703946T ATE470186T1 (de) 2002-01-25 2003-01-21 Asynchroner kreuzschienenschalter mit deterministischer oder arbitrierender steuerung

Country Status (6)

Country Link
US (3) US7283557B2 (enExample)
EP (1) EP1468372B1 (enExample)
JP (1) JP4331617B2 (enExample)
AT (1) ATE470186T1 (enExample)
DE (1) DE60332811D1 (enExample)
WO (1) WO2003065236A1 (enExample)

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US7296105B2 (en) * 2003-10-03 2007-11-13 Sonics, Inc. Method and apparatus for configuring an interconnect to implement arbitration
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US7814280B2 (en) * 2005-01-12 2010-10-12 Fulcrum Microsystems Inc. Shared-memory switch fabric architecture
US20060161718A1 (en) * 2005-01-20 2006-07-20 Berke Stuart A System and method for a non-uniform crossbar switch plane topology
FR2883117B1 (fr) 2005-03-08 2007-04-27 Commissariat Energie Atomique Architecture de noeud de communication dans un systeme de reseau sur puce globalement asynchrone.
FR2883116B1 (fr) 2005-03-08 2007-04-13 Commissariat Energie Atomique Architecture de communication globalement asynchrone pour systeme sur puce.
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US7568063B2 (en) * 2006-02-02 2009-07-28 Hewlett-Packard Development Company, L.P. System and method for a distributed crossbar network using a plurality of crossbars
US7504851B2 (en) * 2006-04-27 2009-03-17 Achronix Semiconductor Corporation Fault tolerant asynchronous circuits
US7505304B2 (en) * 2006-04-27 2009-03-17 Achronix Semiconductor Corporation Fault tolerant asynchronous circuits
US20100002601A1 (en) * 2006-09-13 2010-01-07 Ecole Polytechnique Federale De Lausanne (Epfl) Methods for hardware reduction and overall performance improvement in communication system
US9262356B2 (en) * 2006-12-15 2016-02-16 Lantiq Beteiligungs-GmbH & Co.KG Arbiter device and arbitration method
US7916718B2 (en) * 2007-04-19 2011-03-29 Fulcrum Microsystems, Inc. Flow and congestion control in switch architectures for multi-hop, memory efficient fabrics
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US8370557B2 (en) * 2008-12-19 2013-02-05 Intel Corporation Pseudo dual-port SRAM and a shared memory switch using multiple memory banks and a sideband memory
US8514902B2 (en) 2011-03-17 2013-08-20 Corning Incorporated P-type isolation between QCL regions
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US8644318B2 (en) * 2011-09-21 2014-02-04 Qualcomm, Incorporated Systems and methods for asynchronous handshake-based interconnects
US10439871B2 (en) 2017-09-25 2019-10-08 Cisco Technology, Inc. Deterministic stitching of deterministic segments across distinct deterministic domains

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Also Published As

Publication number Publication date
JP4331617B2 (ja) 2009-09-16
EP1468372B1 (en) 2010-06-02
US7274709B2 (en) 2007-09-25
JP2005516508A (ja) 2005-06-02
US20030146073A1 (en) 2003-08-07
US20030146075A1 (en) 2003-08-07
US7274710B2 (en) 2007-09-25
US7283557B2 (en) 2007-10-16
EP1468372A1 (en) 2004-10-20
US20030146074A1 (en) 2003-08-07
DE60332811D1 (de) 2010-07-15
WO2003065236A1 (en) 2003-08-07

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