ATE464600T1 - Datenprozessor mit meherern befehlen umfassende befehlswörtern - Google Patents
Datenprozessor mit meherern befehlen umfassende befehlswörternInfo
- Publication number
- ATE464600T1 ATE464600T1 AT01916981T AT01916981T ATE464600T1 AT E464600 T1 ATE464600 T1 AT E464600T1 AT 01916981 T AT01916981 T AT 01916981T AT 01916981 T AT01916981 T AT 01916981T AT E464600 T1 ATE464600 T1 AT E464600T1
- Authority
- AT
- Austria
- Prior art keywords
- commands
- command
- branch
- processor
- data processor
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
- G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
- G06F9/3848—Speculative instruction execution using hybrid branch prediction, e.g. selection between prediction techniques
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Electrotherapy Devices (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00200679 | 2000-02-28 | ||
PCT/EP2001/001463 WO2001065362A1 (en) | 2000-02-28 | 2001-02-12 | Data processor with multi-command instruction words |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE464600T1 true ATE464600T1 (de) | 2010-04-15 |
Family
ID=8171104
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT01916981T ATE464600T1 (de) | 2000-02-28 | 2001-02-12 | Datenprozessor mit meherern befehlen umfassende befehlswörtern |
Country Status (6)
Country | Link |
---|---|
US (1) | US7577827B2 (de) |
EP (1) | EP1236095B1 (de) |
JP (1) | JP2003525493A (de) |
AT (1) | ATE464600T1 (de) |
DE (1) | DE60141807D1 (de) |
WO (1) | WO2001065362A1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8127115B2 (en) * | 2009-04-03 | 2012-02-28 | International Business Machines Corporation | Group formation with multiple taken branches per group |
US9280398B2 (en) | 2012-01-31 | 2016-03-08 | International Business Machines Corporation | Major branch instructions |
US9229722B2 (en) | 2012-01-31 | 2016-01-05 | International Business Machines Corporation | Major branch instructions with transactional memory |
FR3021433B1 (fr) * | 2014-05-21 | 2016-06-24 | Kalray | Systeme de synchronisation inter-processeurs |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4833599A (en) | 1987-04-20 | 1989-05-23 | Multiflow Computer, Inc. | Hierarchical priority branch handling for parallel execution in a parallel processor |
US5414822A (en) | 1991-04-05 | 1995-05-09 | Kabushiki Kaisha Toshiba | Method and apparatus for branch prediction using branch prediction table with improved branch prediction effectiveness |
US5442756A (en) * | 1992-07-31 | 1995-08-15 | Intel Corporation | Branch prediction and resolution apparatus for a superscalar computer processor |
JPH09500989A (ja) * | 1993-05-14 | 1997-01-28 | インテル・コーポレーション | 分岐ターゲット・バッファにおける推論履歴 |
US5664135A (en) * | 1994-09-28 | 1997-09-02 | Hewlett-Packard Company | Apparatus and method for reducing delays due to branches |
US5699536A (en) * | 1995-04-13 | 1997-12-16 | International Business Machines Corporation | Computer processing system employing dynamic instruction formatting |
GB9521978D0 (en) * | 1995-10-26 | 1996-01-03 | Sgs Thomson Microelectronics | Computer instruction supply |
US5774710A (en) * | 1996-09-19 | 1998-06-30 | Advanced Micro Devices, Inc. | Cache line branch prediction scheme that shares among sets of a set associative cache |
US5850543A (en) * | 1996-10-30 | 1998-12-15 | Texas Instruments Incorporated | Microprocessor with speculative instruction pipelining storing a speculative register value within branch target buffer for use in speculatively executing instructions after a return |
US5903750A (en) * | 1996-11-20 | 1999-05-11 | Institute For The Development Of Emerging Architectures, L.L.P. | Dynamic branch prediction for branch instructions with multiple targets |
US6157988A (en) * | 1997-08-01 | 2000-12-05 | Micron Technology, Inc. | Method and apparatus for high performance branching in pipelined microsystems |
US5978909A (en) * | 1997-11-26 | 1999-11-02 | Intel Corporation | System for speculative branch target prediction having a dynamic prediction history buffer and a static prediction history buffer |
US6014742A (en) * | 1997-12-31 | 2000-01-11 | Intel Corporation | Trace branch prediction unit |
US6304962B1 (en) * | 1999-06-02 | 2001-10-16 | International Business Machines Corporation | Method and apparatus for prefetching superblocks in a computer processing system |
-
2001
- 2001-02-12 EP EP01916981A patent/EP1236095B1/de not_active Expired - Lifetime
- 2001-02-12 DE DE60141807T patent/DE60141807D1/de not_active Expired - Lifetime
- 2001-02-12 AT AT01916981T patent/ATE464600T1/de not_active IP Right Cessation
- 2001-02-12 JP JP2001563991A patent/JP2003525493A/ja active Pending
- 2001-02-12 WO PCT/EP2001/001463 patent/WO2001065362A1/en active Application Filing
- 2001-02-28 US US09/794,943 patent/US7577827B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO2001065362A1 (en) | 2001-09-07 |
US20010020265A1 (en) | 2001-09-06 |
US7577827B2 (en) | 2009-08-18 |
EP1236095A1 (de) | 2002-09-04 |
JP2003525493A (ja) | 2003-08-26 |
DE60141807D1 (de) | 2010-05-27 |
EP1236095B1 (de) | 2010-04-14 |
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Legal Events
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RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |