ATE410828T1 - Vorrichtung zur analog/digital-umwandlung mit zeitlicher verschachtelung und automatischer einregelung - Google Patents

Vorrichtung zur analog/digital-umwandlung mit zeitlicher verschachtelung und automatischer einregelung

Info

Publication number
ATE410828T1
ATE410828T1 AT06127164T AT06127164T ATE410828T1 AT E410828 T1 ATE410828 T1 AT E410828T1 AT 06127164 T AT06127164 T AT 06127164T AT 06127164 T AT06127164 T AT 06127164T AT E410828 T1 ATE410828 T1 AT E410828T1
Authority
AT
Austria
Prior art keywords
analog
signal
filter
digital
conversion device
Prior art date
Application number
AT06127164T
Other languages
English (en)
Inventor
Philippe Buisson
Original Assignee
Thales Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales Sa filed Critical Thales Sa
Application granted granted Critical
Publication of ATE410828T1 publication Critical patent/ATE410828T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10—Calibration or testing
    • H03M1/1009—Calibration
    • H03M1/1014—Calibration at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M1/1019—Calibration at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error by storing a corrected or correction value in a digital look-up table
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems
    • H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
    • H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Television Signal Processing For Recording (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Filters That Use Time-Delay Elements (AREA)
AT06127164T 2006-01-06 2006-12-22 Vorrichtung zur analog/digital-umwandlung mit zeitlicher verschachtelung und automatischer einregelung ATE410828T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0600121A FR2896109B1 (fr) 2006-01-06 2006-01-06 Dispositif de conversion analogique numerique a entrelacement temporel et a egalisation auto adaptative.

Publications (1)

Publication Number Publication Date
ATE410828T1 true ATE410828T1 (de) 2008-10-15

Family

ID=36593779

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06127164T ATE410828T1 (de) 2006-01-06 2006-12-22 Vorrichtung zur analog/digital-umwandlung mit zeitlicher verschachtelung und automatischer einregelung

Country Status (5)

Country Link
US (1) US7466250B2 (de)
EP (1) EP1811673B1 (de)
AT (1) ATE410828T1 (de)
DE (1) DE602006003056D1 (de)
FR (1) FR2896109B1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8483343B2 (en) * 2005-10-03 2013-07-09 Clariphy Communications, Inc. High-speed receiver architecture
US7778320B2 (en) * 2005-10-03 2010-08-17 Clariphy Communications, Inc. Multi-channel equalization to compensate for impairments introduced by interleaved devices
US8831074B2 (en) 2005-10-03 2014-09-09 Clariphy Communications, Inc. High-speed receiver architecture
US8094056B2 (en) * 2006-02-02 2012-01-10 Clariphy Communications, Inc. Analog-to-digital converter
US8165190B2 (en) * 2006-03-06 2012-04-24 Samsung Electronics Co., Ltd. Apparatus and method for sample rate conversion in a software defined radio communication system
US7425911B2 (en) * 2006-08-10 2008-09-16 Texas Instruments Incorporated Signal-to-noise ratio when using fewer bits than the number of output bits of an analog to digital converter
US8041757B2 (en) 2006-09-29 2011-10-18 Netlogic Microsystems, Inc. Low power and low complexity adaptive self-linearization
US8032336B2 (en) 2006-09-29 2011-10-04 Netlogic Microsystems, Inc. Distortion cancellation using adaptive linearization
US7688235B2 (en) * 2006-09-29 2010-03-30 Optichron, Inc. Composite analog to digital receiver with adaptive self-linearization
US8370113B2 (en) 2006-09-29 2013-02-05 Netlogic Microsystems, Inc. Low-power and low-cost adaptive self-linearization system with fast convergence
US7952502B2 (en) * 2008-08-29 2011-05-31 Broadcom Corporation Imbalance and distortion cancellation for composite analog to digital converter (ADC)
CN102270987B (zh) * 2010-03-25 2016-06-22 株式会社巨晶片 时间交织模拟-数字转换电路
JP5742556B2 (ja) * 2011-07-29 2015-07-01 富士通セミコンダクター株式会社 Ａｄｃ
JP5835031B2 (ja) * 2012-03-13 2015-12-24 株式会社ソシオネクスト アナログデジタル変換器（ａｄｃ），その補正回路およびその補正方法
US10693485B1 (en) * 2019-03-22 2020-06-23 Avago Technologies International Sales Pte. Limited Adaptive background ADC calibration
US11349490B2 (en) * 2020-03-03 2022-05-31 Cirrus Logic, Inc. Dual-path digital filtering in an analog-to-digital conversion system

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239299A (en) * 1991-08-06 1993-08-24 Trw Inc. Digital equalization of time interleaved analog to digital converters
US7245638B2 (en) * 2000-07-21 2007-07-17 Broadcom Corporation Methods and systems for DSP-based receivers
EP1401105B1 (de) * 2002-09-17 2006-06-14 Siemens Mobile Communications S.p.A. Offsetspannungskompensationsverfahren für parallele zeitverschachtelte Analog-Digitalwandler sowie Schaltung dafür
JP3752237B2 (ja) * 2003-04-25 2006-03-08 アンリツ株式会社 Ａ／ｄ変換装置
US7394415B2 (en) * 2005-01-11 2008-07-01 Anritsu Corporation Time-interleaved analog-to-digital converter and high speed signal processing system using the same
US7330140B2 (en) * 2005-07-01 2008-02-12 Texas Instruments Incorporated Interleaved analog to digital converter with compensation for parameter mismatch among individual converters
US7227479B1 (en) * 2005-12-22 2007-06-05 Lucent Technologies Inc. Digital background calibration for time-interlaced analog-to-digital converters

Also Published As

Publication number Publication date
DE602006003056D1 (de) 2008-11-20
FR2896109B1 (fr) 2008-06-20
US20070205934A1 (en) 2007-09-06
EP1811673A1 (de) 2007-07-25
US7466250B2 (en) 2008-12-16
EP1811673B1 (de) 2008-10-08
FR2896109A1 (fr) 2007-07-13

Similar Documents

Publication Publication Date Title
ATE410828T1 (de) Vorrichtung zur analog/digital-umwandlung mit zeitlicher verschachtelung und automatischer einregelung
EP1928116A3 (de) Rundfunk von digitalen Videos an mobile Endgeräte
EP2690787A3 (de) Fehlanpassungskorrektur eines Zeitverschachtelten Analog-Digital-Wandlers
WO2006044992A3 (en) Analog-to-digital converter with reduced average input current and reduced average reference current
EP2549775A3 (de) Dynamisch konfigurierbares ANR-Filter und Signalverarbeitungstopologie
EP2448163A3 (de) Vorrichtung zum Senden und Empfangen eines Signals und Verfahren zum Senden und Empfangen eines Signals
EP1762294A3 (de) Abgasreinigungsverfahren
WO2010033232A3 (en) Unified architecture for folding adc
EP1959590A3 (de) Steuerung für Analog-Digital-Umwandlung, optische Empfangsvorrichtung, optisches Empfangsverfahren und Vorrichtung zur Kompensation von Wellenformverzerrung
MX2013005626A (es) Ensamble de sujetador de sensor para un sistema de monitoreo optico.
EP1923864A3 (de) Rauschreduzierende Vorrichtung, rauschreduzierendes Verfahren, rauschreduzierendes Programm und rauschreduzierende Audio-Ausgabevorrichtung
TW200637165A (en) Receiver capable of correcting mismatch of time-interleaved parallel ADC and method thereof
ATE491263T1 (de) Schätzung von timing-fehlern in einem zeitlich verschachtelten analog/digital-umsetzersystem
WO2007133792A3 (en) Digital equalization of multiple interleaved analog-to-digital converters
WO2008061052A3 (en) Delay line calibration
WO2012116006A3 (en) Pipelined adc inter-stage error calibration
DE602007009745D1 (de) Verfahren zur automatischen Entzerrung eines Tonsystems
EP2779466A3 (de) System, Verfahren und Aufzeichnungsmedium zur Kalibrierung eines Analog/Digitalwandlers
EP2590331A3 (de) Analog-Digital-Wandler mit schrittweiser Annäherung
IN2014MN02566A (de)
WO2008142278A3 (fr) Récepteur haute fréquence à traitement numérique multi-canaux
EP2442441A3 (de) Verstärkung
EP2482461A3 (de) Multi-Bit-Digital-Analog-Wandler und Delta-Sigma-Analog-Digitalwandler
EP2160896A4 (de) Verfahren und vorrichtung zur übertragung digitaler funksignale sowie verfahren und vorrichtung für den empfang digitaler funksignale
WO2008027671A3 (en) Multiple transmission protocol transceiver

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties