ATE272862T1 - Verfahren und gerät zum transferieren von daten zwischen einem registerstapel und einer speicherquelle - Google Patents

Verfahren und gerät zum transferieren von daten zwischen einem registerstapel und einer speicherquelle

Info

Publication number
ATE272862T1
ATE272862T1 AT98949726T AT98949726T ATE272862T1 AT E272862 T1 ATE272862 T1 AT E272862T1 AT 98949726 T AT98949726 T AT 98949726T AT 98949726 T AT98949726 T AT 98949726T AT E272862 T1 ATE272862 T1 AT E272862T1
Authority
AT
Austria
Prior art keywords
register
contents
backing store
general register
location
Prior art date
Application number
AT98949726T
Other languages
English (en)
Inventor
Jonathan K Ross
Cary A Coutant
Carol L Thompson
Achmed R Zahir
Original Assignee
Idea Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Idea Corp filed Critical Idea Corp
Application granted granted Critical
Publication of ATE272862T1 publication Critical patent/ATE272862T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/463—Program control block organisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G06F9/30127—Register windows
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Communication Control (AREA)
AT98949726T 1997-09-30 1998-09-30 Verfahren und gerät zum transferieren von daten zwischen einem registerstapel und einer speicherquelle ATE272862T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/940,834 US6263401B1 (en) 1997-09-30 1997-09-30 Method and apparatus for transferring data between a register stack and a memory resource
PCT/US1998/020746 WO1999017207A1 (en) 1997-09-30 1998-09-30 Method and apparatus for transferring data between a register stack and a memory resource

Publications (1)

Publication Number Publication Date
ATE272862T1 true ATE272862T1 (de) 2004-08-15

Family

ID=25475508

Family Applications (1)

Application Number Title Priority Date Filing Date
AT98949726T ATE272862T1 (de) 1997-09-30 1998-09-30 Verfahren und gerät zum transferieren von daten zwischen einem registerstapel und einer speicherquelle

Country Status (8)

Country Link
US (1) US6263401B1 (de)
EP (1) EP1019829B1 (de)
CN (1) CN1203410C (de)
AT (1) ATE272862T1 (de)
AU (1) AU9599198A (de)
DE (1) DE69825461T2 (de)
HK (1) HK1030275A1 (de)
WO (1) WO1999017207A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6487630B2 (en) 1999-02-26 2002-11-26 Intel Corporation Processor with register stack engine that dynamically spills/fills physical registers to backing store
US6895527B1 (en) * 2000-09-30 2005-05-17 Intel Corporation Error recovery for speculative memory accesses
US7290176B2 (en) * 2004-07-31 2007-10-30 Hewlett-Packard Development Company, L.P. Method and system for generating stacked register dumps from backing-store memory
US7647481B2 (en) * 2005-02-25 2010-01-12 Qualcomm Incorporated Reducing power by shutting down portions of a stacked register file
US7962731B2 (en) * 2005-10-20 2011-06-14 Qualcomm Incorporated Backing store buffer for the register save engine of a stacked register file
US7844804B2 (en) * 2005-11-10 2010-11-30 Qualcomm Incorporated Expansion of a stacked register file using shadow registers
EP1887462A1 (de) * 2006-07-26 2008-02-13 Semiconductor Energy Laboratory Co., Ltd. Halbleiterbauelement, Speicherschaltung und Vorrichtung zur Erstellung eines Gerätesprachprogramms sowie Betriebsverfahren für das Halbleiterbauelement und die Steuerschaltung
US8447962B2 (en) * 2009-12-22 2013-05-21 Intel Corporation Gathering and scattering multiple data elements
US10175990B2 (en) 2009-12-22 2019-01-08 Intel Corporation Gathering and scattering multiple data elements

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3810117A (en) * 1972-10-20 1974-05-07 Ibm Stack mechanism for a data processor
US4325120A (en) 1978-12-21 1982-04-13 Intel Corporation Data processing system
US4520439A (en) * 1981-01-05 1985-05-28 Sperry Corporation Variable field partial write data merge
US4500958A (en) * 1982-04-21 1985-02-19 Digital Equipment Corporation Memory controller with data rotation arrangement
US5440749A (en) 1989-08-03 1995-08-08 Nanotronics Corporation High performance, low cost microprocessor architecture
US5522072A (en) 1990-09-04 1996-05-28 At&T Corp. Arrangement for efficiently transferring program execution between subprograms
US5325494A (en) * 1991-06-21 1994-06-28 Kabushiki Kaisha Toshiba Computer
US5327566A (en) 1991-07-12 1994-07-05 Hewlett Packard Company Stage saving and restoring hardware mechanism
US5398330A (en) * 1992-03-05 1995-03-14 Seiko Epson Corporation Register file backup queue
US5640582A (en) 1992-05-21 1997-06-17 Intel Corporation Register stacking in a computer system
US5428779A (en) 1992-11-09 1995-06-27 Seiko Epson Corporation System and method for supporting context switching within a multiprocessor system having functional blocks that generate state programs with coded register load instructions
JPH0744586B2 (ja) * 1993-02-26 1995-05-15 日本電気株式会社 パラレルデータ転送回路
US5428807A (en) * 1993-06-17 1995-06-27 Digital Equipment Corporation Method and apparatus for propagating exception conditions of a computer system
US5535397A (en) 1993-06-30 1996-07-09 Intel Corporation Method and apparatus for providing a context switch in response to an interrupt in a computer process
US5761467A (en) 1993-09-28 1998-06-02 Mitsubishi Denki Kabushiki Kaisha System for committing execution results when branch conditions coincide with predetermined commit conditions specified in the instruction field
EP0676691A3 (de) 1994-04-06 1996-12-11 Hewlett Packard Co Vorrichtung zur Registersicherstellung und Umspeicherung in einem digitalen Rechner.
US5628016A (en) 1994-06-15 1997-05-06 Borland International, Inc. Systems and methods and implementing exception handling using exception registration records stored in stack memory
US5706466A (en) 1995-01-13 1998-01-06 Vlsi Technology, Inc. Von Neumann system with harvard processor and instruction buffer
DE69734399D1 (de) * 1996-01-24 2006-03-02 Sun Microsystems Inc Verfahren und vorrichtung zur stapel-cachespeicherung
US5748936A (en) * 1996-05-30 1998-05-05 Hewlett-Packard Company Method and system for supporting speculative execution using a speculative look-aside table

Also Published As

Publication number Publication date
EP1019829B1 (de) 2004-08-04
HK1030275A1 (en) 2001-04-27
AU9599198A (en) 1999-04-23
US6263401B1 (en) 2001-07-17
DE69825461D1 (de) 2004-09-09
EP1019829A4 (de) 2003-04-16
DE69825461T2 (de) 2005-09-15
CN1203410C (zh) 2005-05-25
WO1999017207A1 (en) 1999-04-08
EP1019829A1 (de) 2000-07-19
CN1278344A (zh) 2000-12-27

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties