ATE237847T1 - Verfahren zur herstellung eines moduls für chipkarten - Google Patents

Verfahren zur herstellung eines moduls für chipkarten

Info

Publication number
ATE237847T1
ATE237847T1 AT00936989T AT00936989T ATE237847T1 AT E237847 T1 ATE237847 T1 AT E237847T1 AT 00936989 T AT00936989 T AT 00936989T AT 00936989 T AT00936989 T AT 00936989T AT E237847 T1 ATE237847 T1 AT E237847T1
Authority
AT
Austria
Prior art keywords
metallizing
gate
producing
support film
chip cards
Prior art date
Application number
AT00936989T
Other languages
English (en)
Inventor
Jean-Christophe Fidalgo
Lucille Dossetto
Original Assignee
Gemplus Card Int
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card Int filed Critical Gemplus Card Int
Application granted granted Critical
Publication of ATE237847T1 publication Critical patent/ATE237847T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Manufacturing Of Magnetic Record Carriers (AREA)
  • Catalysts (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Manufacturing Of Printed Wiring (AREA)
AT00936989T 1999-06-17 2000-05-30 Verfahren zur herstellung eines moduls für chipkarten ATE237847T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9908123A FR2795204B1 (fr) 1999-06-17 1999-06-17 Procede pour la fabrication d'un support de memorisation comportant une grille de metallisation tridimensionnelle support obtenu
PCT/FR2000/001491 WO2000079478A1 (fr) 1999-06-17 2000-05-30 Procede pour la fabrication d'un module pour cartes a puces et module obtenu

Publications (1)

Publication Number Publication Date
ATE237847T1 true ATE237847T1 (de) 2003-05-15

Family

ID=9547286

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00936989T ATE237847T1 (de) 1999-06-17 2000-05-30 Verfahren zur herstellung eines moduls für chipkarten

Country Status (7)

Country Link
EP (1) EP1192591B1 (de)
CN (1) CN1370307A (de)
AT (1) ATE237847T1 (de)
AU (1) AU5229000A (de)
DE (1) DE60002204D1 (de)
FR (1) FR2795204B1 (de)
WO (1) WO2000079478A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10358422B3 (de) * 2003-08-26 2005-04-28 Muehlbauer Ag Verfahren zur Herstellung von Modulbrücken

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0688050A1 (de) * 1994-06-15 1995-12-20 Philips Cartes Et Systemes Montageverfahren für IC-Karte und so erhaltene Karte
FR2736740A1 (fr) * 1995-07-11 1997-01-17 Trt Telecom Radio Electr Procede de production et d'assemblage de carte a circuit integre et carte ainsi obtenue
FR2741191B1 (fr) * 1995-11-14 1998-01-09 Sgs Thomson Microelectronics Procede de fabrication d'un micromodule, notamment pour cartes a puces

Also Published As

Publication number Publication date
FR2795204B1 (fr) 2001-08-31
CN1370307A (zh) 2002-09-18
DE60002204D1 (de) 2003-05-22
EP1192591A1 (de) 2002-04-03
WO2000079478A1 (fr) 2000-12-28
AU5229000A (en) 2001-01-09
FR2795204A1 (fr) 2000-12-22
EP1192591B1 (de) 2003-04-16

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties