ATE226331T1 - Verfahren zur verbesserung eines zufallsgenerators hinsichtlich resistenz gegen stromverbrauchmessungsanfälle - Google Patents

Verfahren zur verbesserung eines zufallsgenerators hinsichtlich resistenz gegen stromverbrauchmessungsanfälle

Info

Publication number
ATE226331T1
ATE226331T1 AT00951656T AT00951656T ATE226331T1 AT E226331 T1 ATE226331 T1 AT E226331T1 AT 00951656 T AT00951656 T AT 00951656T AT 00951656 T AT00951656 T AT 00951656T AT E226331 T1 ATE226331 T1 AT E226331T1
Authority
AT
Austria
Prior art keywords
sub
introducing
key
surges
improving
Prior art date
Application number
AT00951656T
Other languages
English (en)
Inventor
Jean-Sebastien Coron
David Naccache
Original Assignee
Gemplus Card Int
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card Int filed Critical Gemplus Card Int
Application granted granted Critical
Publication of ATE226331T1 publication Critical patent/ATE226331T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/0806—Details of the card
    • G07F7/0833—Card having specific functional components
    • G07F7/084—Additional components relating to data transfer and storing, e.g. error detection, self-diagnosis
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
    • G07F7/1008—Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/08—Randomization, e.g. dummy operations or using noise

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Business, Economics & Management (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Accounting & Taxation (AREA)
  • Strategic Management (AREA)
  • General Business, Economics & Management (AREA)
  • Storage Device Security (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Electrostatic Separation (AREA)
  • Fuel Cell (AREA)
  • Secondary Cells (AREA)
  • Control Of Eletrric Generators (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
AT00951656T 1999-07-15 2000-07-12 Verfahren zur verbesserung eines zufallsgenerators hinsichtlich resistenz gegen stromverbrauchmessungsanfälle ATE226331T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9909316A FR2796477B1 (fr) 1999-07-15 1999-07-15 Procede d'amelioration d'un generateur aleatoire en vue de le rendre resistant contre les attaques par mesure de courant
PCT/FR2000/002009 WO2001006350A1 (fr) 1999-07-15 2000-07-12 Procede d'amelioration d'un generateur aleatoire en vue de le rendre resistant contre les attaques par mesure de courant

Publications (1)

Publication Number Publication Date
ATE226331T1 true ATE226331T1 (de) 2002-11-15

Family

ID=9548236

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00951656T ATE226331T1 (de) 1999-07-15 2000-07-12 Verfahren zur verbesserung eines zufallsgenerators hinsichtlich resistenz gegen stromverbrauchmessungsanfälle

Country Status (8)

Country Link
US (1) US7146006B1 (de)
EP (1) EP1200889B1 (de)
CN (1) CN1360692A (de)
AT (1) ATE226331T1 (de)
AU (1) AU6452700A (de)
DE (1) DE60000624D1 (de)
FR (1) FR2796477B1 (de)
WO (1) WO2001006350A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6760739B2 (en) 2001-03-01 2004-07-06 Corrent Corporation Pipelined digital randomizer based on permutation and substitution using data sampling with variable frequency and non-coherent clock sources
CN100447763C (zh) * 2003-05-29 2008-12-31 联想(北京)有限公司 一种安全芯片及基于该芯片的信息安全处理设备和方法
WO2008056461A1 (en) * 2006-11-09 2008-05-15 Panasonic Corporation Cryptographic calculation processing circuit
JP5146156B2 (ja) * 2008-06-30 2013-02-20 富士通株式会社 演算処理装置
US10200865B2 (en) * 2013-08-29 2019-02-05 Nokia Technologies Oy Adaptive security indicator for wireless devices
CN105025037B (zh) * 2015-08-14 2018-08-21 武汉天喻信息产业股份有限公司 抗cpa攻击的密文分组链接模式mac算法的实现方法
US11133935B2 (en) 2019-09-30 2021-09-28 Bank Of America Corporation System for integrity validation of authorization data using cryptographic hashes

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2672402B1 (fr) * 1991-02-05 1995-01-27 Gemplus Card Int Procede et dispositif pour la generation de nombres pseudo-aleatoires uniques.
US5727063A (en) * 1995-11-27 1998-03-10 Bell Communications Research, Inc. Pseudo-random generator
US5793871A (en) * 1996-11-26 1998-08-11 California Institute Of Technology Optical encryption interface
US6028939A (en) * 1997-01-03 2000-02-22 Redcreek Communications, Inc. Data security system and method
US6044388A (en) * 1997-05-15 2000-03-28 International Business Machine Corporation Pseudorandom number generator
WO1999063696A1 (en) * 1998-06-03 1999-12-09 Cryptography Research, Inc. Using unpredictable information to minimize leakage from smartcards and other cryptosystems
IL139935A (en) * 1998-06-03 2005-06-19 Cryptography Res Inc Des and other cryptographic processes with leak minimization for smartcards and other cryptosystems
US20040040026A1 (en) * 1999-06-08 2004-02-26 Thinkpulse, Inc. Method and System of Linking a Smart Device Description File with the Logic of an Application Program

Also Published As

Publication number Publication date
AU6452700A (en) 2001-02-05
DE60000624D1 (de) 2002-11-21
FR2796477B1 (fr) 2001-10-12
CN1360692A (zh) 2002-07-24
FR2796477A1 (fr) 2001-01-19
EP1200889B1 (de) 2002-10-16
WO2001006350A1 (fr) 2001-01-25
US7146006B1 (en) 2006-12-05
EP1200889A1 (de) 2002-05-02

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