AT513650A3 - Method and apparatus for precise clock synchronization in a distributed computer system with two time signal lines - Google Patents

Method and apparatus for precise clock synchronization in a distributed computer system with two time signal lines Download PDF

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Publication number
AT513650A3
AT513650A3 ATA1222/2012A AT12222012A AT513650A3 AT 513650 A3 AT513650 A3 AT 513650A3 AT 12222012 A AT12222012 A AT 12222012A AT 513650 A3 AT513650 A3 AT 513650A3
Authority
AT
Austria
Prior art keywords
timer
distributed
computer system
signal lines
time signal
Prior art date
Application number
ATA1222/2012A
Other languages
German (de)
Other versions
AT513650A2 (en
Original Assignee
Fts Computertechnik Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fts Computertechnik Gmbh filed Critical Fts Computertechnik Gmbh
Priority to ATA1222/2012A priority Critical patent/AT513650A3/en
Publication of AT513650A2 publication Critical patent/AT513650A2/en
Publication of AT513650A3 publication Critical patent/AT513650A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0644—External master-clock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0647—Synchronisation among TDM nodes
    • H04J3/065—Synchronisation among TDM nodes using timestamps
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/08—Speed or phase control by synchronisation signals the synchronisation signals recurring cyclically

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Electric Clocks (AREA)

Abstract

Die vorliegende Erfindung legt ein innovatives Verfahren offen, wie in einem verteilten Computersystem von einem Zeitgeber eine genaue Zeitbasis in den verteilten Komponenten des Systems aufgebaut werden kann unter der Randbedingungen, dass das Kommunikationssystems ein nicht vorhersehbarem Zeitverhalten aufweist. Zu diesem Zweck werden neben den Nachrichtenkommunikationskanälen zwischen den Komponenten zusätzlich zwei Arten von Zeitsignalleitungen realisiert. Die erste Signalleitung vom Zeitgeber zu den verteilten Komponenten überträgt den Takt der globalen Uhr des Zeitgebers an die verteilten Komponenten. Die Signalleitung von jeder verteilten Komponente zum Zeitgeber ermöglicht es dem Zeitgeber, einem Referenzimpuls einer Komponente einen globalen Zeitstempel zuzuweisen und diesen Zeitstempel in einer Nachricht der sendenden Komponente mitzuteilen.The present invention discloses an innovative method of how, in a distributed computer system, a timer can establish an accurate time base in the distributed components of the system under the constraints that the communication system has unpredictable timing. In addition to the message communication channels between the components, two types of time signal lines are additionally realized for this purpose. The first signal line from the timer to the distributed components transmits the clock of the global clock of the timer to the distributed components. The signal line from each distributed component to the timer allows the timer to assign a global timestamp to a reference pulse of a component and to communicate that timestamp in a message to the transmitting component.

ATA1222/2012A 2012-11-16 2012-11-16 Method and apparatus for precise clock synchronization in a distributed computer system with two time signal lines AT513650A3 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
ATA1222/2012A AT513650A3 (en) 2012-11-16 2012-11-16 Method and apparatus for precise clock synchronization in a distributed computer system with two time signal lines

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ATA1222/2012A AT513650A3 (en) 2012-11-16 2012-11-16 Method and apparatus for precise clock synchronization in a distributed computer system with two time signal lines

Publications (2)

Publication Number Publication Date
AT513650A2 AT513650A2 (en) 2014-06-15
AT513650A3 true AT513650A3 (en) 2015-11-15

Family

ID=50885071

Family Applications (1)

Application Number Title Priority Date Filing Date
ATA1222/2012A AT513650A3 (en) 2012-11-16 2012-11-16 Method and apparatus for precise clock synchronization in a distributed computer system with two time signal lines

Country Status (1)

Country Link
AT (1) AT513650A3 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5689688A (en) * 1993-11-16 1997-11-18 International Business Machines Corporation Probabilistic anonymous clock synchronization method and apparatus for synchronizing a local time scale with a reference time scale
WO2010045961A1 (en) * 2008-10-24 2010-04-29 Telefonaktiebolaget Lm Ericsson (Publ) Method and device for packet network synchronization

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5689688A (en) * 1993-11-16 1997-11-18 International Business Machines Corporation Probabilistic anonymous clock synchronization method and apparatus for synchronizing a local time scale with a reference time scale
WO2010045961A1 (en) * 2008-10-24 2010-04-29 Telefonaktiebolaget Lm Ericsson (Publ) Method and device for packet network synchronization

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Kopetz, Hermann; Ochsenreiter, Wilhelm, "Clock Synchronization in Distributed Real-Time Systems," in Computers, IEEE Transactions on , vol.C-36, no.8, pp.933-940, Aug. 1987 doi: 10.1109/TC.1987.5009516, URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber= 5009516&isnumber=5009508 *

Also Published As

Publication number Publication date
AT513650A2 (en) 2014-06-15

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REJ Rejection

Effective date: 20160415