AT375512B - Datenuebertragungseinrichtung - Google Patents
DatenuebertragungseinrichtungInfo
- Publication number
- AT375512B AT375512B AT517181A AT517181A AT375512B AT 375512 B AT375512 B AT 375512B AT 517181 A AT517181 A AT 517181A AT 517181 A AT517181 A AT 517181A AT 375512 B AT375512 B AT 375512B
- Authority
- AT
- Austria
- Prior art keywords
- data transfer
- transfer device
- data
- transfer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
- H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AT517181A AT375512B (de) | 1981-12-01 | 1981-12-01 | Datenuebertragungseinrichtung |
DE19823244330 DE3244330A1 (de) | 1981-12-01 | 1982-11-30 | Datenuebertragungseinrichtung |
CH695482A CH658352A5 (de) | 1981-12-01 | 1982-11-30 | Datenuebertragungseinrichtung mit zwei getrennten uebertragungswegen. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AT517181A AT375512B (de) | 1981-12-01 | 1981-12-01 | Datenuebertragungseinrichtung |
Publications (2)
Publication Number | Publication Date |
---|---|
ATA517181A ATA517181A (de) | 1983-12-15 |
AT375512B true AT375512B (de) | 1984-08-10 |
Family
ID=3572745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT517181A AT375512B (de) | 1981-12-01 | 1981-12-01 | Datenuebertragungseinrichtung |
Country Status (3)
Country | Link |
---|---|
AT (1) | AT375512B (de) |
CH (1) | CH658352A5 (de) |
DE (1) | DE3244330A1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2565051B1 (fr) * | 1984-05-22 | 1990-08-03 | Servel Michel | Systeme de transmission de multiplex de grand debit |
US4615040A (en) * | 1984-06-14 | 1986-09-30 | Coenco Ltd. | High speed data communications system |
DE4339463C1 (de) * | 1993-11-19 | 1995-05-18 | Siemens Ag | Verfahren und Anordnung zur Datenübertragung |
SE512153C2 (sv) * | 1997-02-24 | 2000-02-07 | Telia Ab | Anordning för flexibel kanaltilldelning i ett telekommunikationssystem |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB988892A (en) * | 1961-09-06 | 1965-04-14 | Hitachi Ltd | Time division, multiplex pulse code modulation system |
-
1981
- 1981-12-01 AT AT517181A patent/AT375512B/de not_active IP Right Cessation
-
1982
- 1982-11-30 CH CH695482A patent/CH658352A5/de not_active IP Right Cessation
- 1982-11-30 DE DE19823244330 patent/DE3244330A1/de active Granted
Also Published As
Publication number | Publication date |
---|---|
DE3244330C2 (de) | 1990-08-09 |
DE3244330A1 (de) | 1983-06-09 |
CH658352A5 (de) | 1986-10-31 |
ATA517181A (de) | 1983-12-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ELJ | Ceased due to non-payment of the annual fee |