AT372531B - CIRCUIT ARRANGEMENT FOR PREVENTING DOUBLE ERRORS IN A DATA PROCESSING SYSTEM - Google Patents

CIRCUIT ARRANGEMENT FOR PREVENTING DOUBLE ERRORS IN A DATA PROCESSING SYSTEM

Info

Publication number
AT372531B
AT372531B AT0516778A AT516778A AT372531B AT 372531 B AT372531 B AT 372531B AT 0516778 A AT0516778 A AT 0516778A AT 516778 A AT516778 A AT 516778A AT 372531 B AT372531 B AT 372531B
Authority
AT
Austria
Prior art keywords
data processing
processing system
circuit arrangement
preventing double
double errors
Prior art date
Application number
AT0516778A
Other languages
German (de)
Other versions
ATA516778A (en
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of ATA516778A publication Critical patent/ATA516778A/en
Application granted granted Critical
Publication of AT372531B publication Critical patent/AT372531B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Retry When Errors Occur (AREA)
AT0516778A 1977-08-17 1978-07-17 CIRCUIT ARRANGEMENT FOR PREVENTING DOUBLE ERRORS IN A DATA PROCESSING SYSTEM AT372531B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2737133A DE2737133C2 (en) 1977-08-17 1977-08-17 Circuit arrangement for preventing double errors in a data processing system

Publications (2)

Publication Number Publication Date
ATA516778A ATA516778A (en) 1983-02-15
AT372531B true AT372531B (en) 1983-10-25

Family

ID=6016643

Family Applications (1)

Application Number Title Priority Date Filing Date
AT0516778A AT372531B (en) 1977-08-17 1978-07-17 CIRCUIT ARRANGEMENT FOR PREVENTING DOUBLE ERRORS IN A DATA PROCESSING SYSTEM

Country Status (8)

Country Link
AT (1) AT372531B (en)
BE (1) BE869812A (en)
CH (1) CH625066A5 (en)
DE (1) DE2737133C2 (en)
FR (1) FR2400730A1 (en)
GB (1) GB1597198A (en)
IT (1) IT1098095B (en)
NL (1) NL7806709A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3036926C2 (en) * 1980-09-30 1984-07-26 Siemens AG, 1000 Berlin und 8000 München Method and arrangement for controlling the workflow in data processing systems with microprogram control
EP0342261B1 (en) * 1988-05-20 1995-03-29 International Business Machines Corporation Arrangement for error recovery in a self-guarding data processing system

Also Published As

Publication number Publication date
NL7806709A (en) 1979-02-20
BE869812A (en) 1979-02-19
IT1098095B (en) 1985-08-31
CH625066A5 (en) 1981-08-31
FR2400730A1 (en) 1979-03-16
DE2737133B1 (en) 1978-11-30
DE2737133C2 (en) 1979-07-26
ATA516778A (en) 1983-02-15
GB1597198A (en) 1981-09-03
IT7826706A0 (en) 1978-08-11

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee