AT316662B - Circuit arrangement for telecommunications, in particular telephone exchange, which are centrally controlled by at least two computers - Google Patents

Circuit arrangement for telecommunications, in particular telephone exchange, which are centrally controlled by at least two computers

Info

Publication number
AT316662B
AT316662B AT918471A AT918471A AT316662B AT 316662 B AT316662 B AT 316662B AT 918471 A AT918471 A AT 918471A AT 918471 A AT918471 A AT 918471A AT 316662 B AT316662 B AT 316662B
Authority
AT
Austria
Prior art keywords
telecommunications
computers
circuit arrangement
telephone exchange
centrally controlled
Prior art date
Application number
AT918471A
Other languages
German (de)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19702056535 external-priority patent/DE2056535C/en
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of AT316662B publication Critical patent/AT316662B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558—Redundancy, stand-by

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Hardware Redundancy (AREA)
AT918471A 1970-11-17 1971-10-22 Circuit arrangement for telecommunications, in particular telephone exchange, which are centrally controlled by at least two computers AT316662B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702056535 DE2056535C (en) 1970-11-17 Circuit arrangement for telecommunications, in particular telephone switching systems, which are centrally controlled by at least two computers

Publications (1)

Publication Number Publication Date
AT316662B true AT316662B (en) 1974-07-25

Family

ID=5788371

Family Applications (1)

Application Number Title Priority Date Filing Date
AT918471A AT316662B (en) 1970-11-17 1971-10-22 Circuit arrangement for telecommunications, in particular telephone exchange, which are centrally controlled by at least two computers

Country Status (8)

Country Link
AT (1) AT316662B (en)
BE (1) BE775460A (en)
CH (1) CH535522A (en)
FR (1) FR2114590A5 (en)
GB (1) GB1338943A (en)
IT (1) IT941161B (en)
LU (1) LU64263A1 (en)
NL (1) NL158351B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1239227A (en) * 1984-10-17 1988-07-12 Randy D. Pfeifer Method of and arrangement for ordering of multiprocessor operations in a multiprocessor system

Also Published As

Publication number Publication date
BE775460A (en) 1972-05-17
DE2056535B2 (en) 1972-05-04
GB1338943A (en) 1973-11-28
DE2056535A1 (en) 1972-05-04
LU64263A1 (en) 1972-06-02
NL158351B (en) 1978-10-16
FR2114590A5 (en) 1972-06-30
NL7115845A (en) 1972-05-19
CH535522A (en) 1973-03-31
IT941161B (en) 1973-03-01

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee