AR243713A1 - Circuito integrado para conmutar de un pulso de reloj seleccionado de una secuencia de n pulsos de reloj de igual frecuencia desfasados con igual a un pulso de reloj atravesado con fase. - Google Patents
Circuito integrado para conmutar de un pulso de reloj seleccionado de una secuencia de n pulsos de reloj de igual frecuencia desfasados con igual a un pulso de reloj atravesado con fase.Info
- Publication number
- AR243713A1 AR243713A1 AR89314865A AR31486589A AR243713A1 AR 243713 A1 AR243713 A1 AR 243713A1 AR 89314865 A AR89314865 A AR 89314865A AR 31486589 A AR31486589 A AR 31486589A AR 243713 A1 AR243713 A1 AR 243713A1
- Authority
- AR
- Argentina
- Prior art keywords
- clock pulse
- clock
- switching
- sequence
- phase
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Manipulation Of Pulses (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP88119040A EP0369047A1 (de) | 1988-11-15 | 1988-11-15 | Anordnung zur Umschaltung eines Taktes auf einen Takt gleicher Frequenz aber nacheilender Taktphase |
Publications (1)
Publication Number | Publication Date |
---|---|
AR243713A1 true AR243713A1 (es) | 1993-08-31 |
Family
ID=8199567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AR89314865A AR243713A1 (es) | 1988-11-15 | 1989-09-07 | Circuito integrado para conmutar de un pulso de reloj seleccionado de una secuencia de n pulsos de reloj de igual frecuencia desfasados con igual a un pulso de reloj atravesado con fase. |
Country Status (8)
Country | Link |
---|---|
US (1) | US5099501A (es) |
EP (1) | EP0369047A1 (es) |
JP (1) | JPH02186823A (es) |
AR (1) | AR243713A1 (es) |
AU (1) | AU600417B2 (es) |
BR (1) | BR8905786A (es) |
CA (1) | CA2002733A1 (es) |
NO (1) | NO894559L (es) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5841812A (en) * | 1995-09-06 | 1998-11-24 | Analog Devices, Inc. | NMOS pass transistor digital signal processor for a PRML system |
FR2840074A1 (fr) * | 2002-05-22 | 2003-11-28 | Koninkl Philips Electronics Nv | Cellule de tension fixe pour circuit integre |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4604582A (en) * | 1985-01-04 | 1986-08-05 | Lockheed Electronics Company, Inc. | Digital phase correlator |
AR242878A1 (es) * | 1986-11-27 | 1993-05-31 | Siemens Ag | Disposicion de circuito para derivar una senal de reloj auxiliar de datos a partir de la frecuencia y/o de la fase de reloj de una senal digital sincronica o plesiocronica. |
US4841551A (en) * | 1987-01-05 | 1989-06-20 | Grumman Aerospace Corporation | High speed data-clock synchronization processor |
JPH0795731B2 (ja) * | 1987-10-30 | 1995-10-11 | 株式会社ケンウッド | データ受信装置の最適クロック形成装置 |
ATE76706T1 (de) * | 1988-03-22 | 1992-06-15 | Siemens Ag | Verfahren und anordnung zur fortlaufenden anpassung der phase eines binaeren datensignals an einen takt. |
DE58903075D1 (de) * | 1988-04-29 | 1993-02-04 | Siemens Ag | Verfahren und anordnung zur taktrueckgewinnung aus einem datensignal durch fortlaufende anpassung eines oertlich erzeugten taktes an ein datensignal. |
US4975929A (en) * | 1989-09-11 | 1990-12-04 | Raynet Corp. | Clock recovery apparatus |
-
1988
- 1988-11-15 EP EP88119040A patent/EP0369047A1/de not_active Ceased
-
1989
- 1989-09-07 AR AR89314865A patent/AR243713A1/es active
- 1989-11-10 CA CA002002733A patent/CA2002733A1/en not_active Abandoned
- 1989-11-14 BR BR898905786A patent/BR8905786A/pt not_active Application Discontinuation
- 1989-11-14 AU AU44692/89A patent/AU600417B2/en not_active Ceased
- 1989-11-14 JP JP1294081A patent/JPH02186823A/ja active Pending
- 1989-11-15 NO NO89894559A patent/NO894559L/no unknown
- 1989-11-27 US US07/441,882 patent/US5099501A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
AU4469289A (en) | 1990-05-24 |
EP0369047A1 (de) | 1990-05-23 |
AU600417B2 (en) | 1990-08-09 |
NO894559L (no) | 1990-05-16 |
BR8905786A (pt) | 1990-06-12 |
NO894559D0 (no) | 1989-11-15 |
JPH02186823A (ja) | 1990-07-23 |
US5099501A (en) | 1992-03-24 |
CA2002733A1 (en) | 1990-05-15 |
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