AR009136A1 - Descodificador vitepbi de m etapas - Google Patents

Descodificador vitepbi de m etapas

Info

Publication number
AR009136A1
AR009136A1 ARP970105029A ARP970105029A AR009136A1 AR 009136 A1 AR009136 A1 AR 009136A1 AR P970105029 A ARP970105029 A AR P970105029A AR P970105029 A ARP970105029 A AR P970105029A AR 009136 A1 AR009136 A1 AR 009136A1
Authority
AR
Argentina
Prior art keywords
rollback
stage
stages
decoder
multiplexer
Prior art date
Application number
ARP970105029A
Other languages
English (en)
Original Assignee
Discovision Ass
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Discovision Ass filed Critical Discovision Ass
Publication of AR009136A1 publication Critical patent/AR009136A1/es

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6502Reduction of hardware complexity or efficient processing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/395Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using a collapsed trellis, e.g. M-step algorithm, radix-n architectures with n>2
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4161Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
    • H03M13/4169Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using traceback

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

Un decodificador Viterbi de M etapas para una corriente de datos codificada convulcionalmente, cada una de las etapas de retrotrazado tiene un grupo kcables de entrada que representan k estados candidatos posibles. Un banco de k multiplexores selecciona uno de 2M de los cables de entrada de acuerdo con Mbitios de los datos de retrotrazado. Las k salidas de multiplexor alimentan una etapa de retrotrazado sucesiva. M grupos de k cables transportan los datos deretrotrazado, con cada uno de los alambres conectado a una línea de seleccion de cada multiplexor. En la salida de la unidad de retrotrazado un circuito deidentificacion identifica un subgrupo de k posibilidades la cual tiene un numero máximo de estados candidatos que permanecenen la mmisma, El arregloelimina la necesidad de resincronizacion entre cada etapa de retrotrazado.
ARP970105029A 1996-10-30 1997-10-29 Descodificador vitepbi de m etapas AR009136A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB9622540.4A GB9622540D0 (en) 1996-10-30 1996-10-30 Trackback for viterbi decoder

Publications (1)

Publication Number Publication Date
AR009136A1 true AR009136A1 (es) 2000-03-08

Family

ID=10802136

Family Applications (1)

Application Number Title Priority Date Filing Date
ARP970105029A AR009136A1 (es) 1996-10-30 1997-10-29 Descodificador vitepbi de m etapas

Country Status (13)

Country Link
US (1) US5987637A (es)
EP (1) EP0840460A3 (es)
JP (1) JPH10150369A (es)
KR (1) KR19980033276A (es)
CN (1) CN1186385A (es)
AR (1) AR009136A1 (es)
AU (1) AU3991797A (es)
CA (1) CA2198579A1 (es)
GB (1) GB9622540D0 (es)
ID (1) ID18985A (es)
IL (1) IL122019A0 (es)
SG (1) SG65027A1 (es)
TW (1) TW354445B (es)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6148431A (en) * 1998-03-26 2000-11-14 Lucent Technologies Inc. Add compare select circuit and method implementing a viterbi algorithm
JPH11355150A (ja) * 1998-06-09 1999-12-24 Sony Corp パンクチャドビタビ復号方法
KR100285067B1 (ko) * 1998-09-25 2001-03-15 윤종용 비터비 디코더의 가산 비교 선택 회로
US7225393B2 (en) * 1999-10-01 2007-05-29 Matsushita Electric Industrial Co., Ltd. Viterbi decoder and Viterbi decoding method
US6654929B1 (en) * 1999-10-01 2003-11-25 Matsushita Electric Industrial Co., Ltd. Viterbi decoder and Viterbi decoding method
KR100335146B1 (ko) * 2000-03-09 2002-05-04 서평원 비터비 디코더의 트레이스 백 장치
GB0018841D0 (en) * 2000-08-02 2000-09-20 Koninkl Philips Electronics Nv Data decoding
US20020144209A1 (en) * 2001-02-20 2002-10-03 Cute Ltd. System for enhanced error correction in trellis decoding
JP2005502936A (ja) 2001-04-30 2005-01-27 アクティブマップ エルエルシー 双方向性電子提示地図
US7167531B2 (en) * 2001-09-17 2007-01-23 Digeo, Inc. System and method for shared decoding using a data replay scheme
US7403981B2 (en) * 2002-01-04 2008-07-22 Quicksilver Technology, Inc. Apparatus and method for adaptive multimedia reception and transmission in communication environments
US7609297B2 (en) 2003-06-25 2009-10-27 Qst Holdings, Inc. Configurable hardware based digital imaging apparatus
US7522679B2 (en) * 2003-10-01 2009-04-21 Paradyne Corporation System and method for adapting to a change in constellation density while receiving a signal
US7331013B2 (en) * 2004-02-18 2008-02-12 Nvidia Corporation Viterbi decoder with survivor bits stored to support look-ahead addressing
US20070230606A1 (en) * 2006-03-31 2007-10-04 Anders Mark A Viterbi traceback
DE102006047396A1 (de) * 2006-10-06 2008-04-10 Robert Bosch Gmbh Schaltungsanordnung
US8185810B1 (en) * 2007-04-13 2012-05-22 Link—A—Media Devices Corporation Low power viterbi trace back architecture
KR101134064B1 (ko) * 2007-05-14 2012-04-13 삼성전자주식회사 오류 제어 코드의 펑쳐링 장치 및 방법
TW201233070A (en) * 2011-01-26 2012-08-01 Ind Tech Res Inst Pre-decoded tail-biting convolutional decoder and decoding method thereof
KR102039062B1 (ko) * 2013-02-14 2019-10-31 한국전자통신연구원 Map 디코딩 장치 및 방법

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4709377A (en) * 1985-03-13 1987-11-24 Paradyne Viterbi decoder for wireline modems
US4713829A (en) * 1985-06-19 1987-12-15 Codex Corporation Coded modulation system with a simplified decoder capable of reducing the effects of channel distortion
US4748626A (en) * 1987-01-28 1988-05-31 Racal Data Communications Inc. Viterbi decoder with reduced number of data move operations
JP2594683B2 (ja) * 1990-05-18 1997-03-26 三菱電機株式会社 ヴィタビ・デコーダ
US5233630A (en) * 1991-05-03 1993-08-03 Qualcomm Incorporated Method and apparatus for resolving phase ambiguities in trellis coded modulated data
US5416787A (en) * 1991-07-30 1995-05-16 Kabushiki Kaisha Toshiba Method and apparatus for encoding and decoding convolutional codes
US5187675A (en) * 1991-09-18 1993-02-16 Ericsson-Ge Mobile Communications Holding Inc. Maximum search circuit
US5408502A (en) * 1992-07-13 1995-04-18 General Instrument Corporation Apparatus and method for communicating digital data using trellis coded QAM with punctured convolutional codes
US5438590A (en) * 1993-05-24 1995-08-01 Comstream Corporation Transmitting and receiving apparatus and method including punctured convolutional encoding and decoding
US5465275A (en) * 1993-11-16 1995-11-07 At&T Ipm Corp. Efficient utilization of present state/next state registers
JPH07283740A (ja) * 1994-04-05 1995-10-27 Sony Corp 送信装置、受信装置、および伝送システム
US5511082A (en) * 1994-05-10 1996-04-23 General Instrument Corporation Of Delaware Punctured convolutional encoder
US5506636A (en) * 1994-06-28 1996-04-09 Samsung Electronics Co., Ltd. HDTV signal receiver with imaginary-sample-presence detector for QAM/VSB mode selection
KR0135796B1 (ko) * 1994-11-14 1998-04-27 김광호 비터비복호기에서 트레이스백 수행장치
US5497401A (en) * 1994-11-18 1996-03-05 Thomson Consumer Electronics, Inc. Branch metric computer for a Viterbi decoder of a punctured and pragmatic trellis code convolutional decoder suitable for use in a multi-channel receiver of satellite, terrestrial and cable transmitted FEC compressed-digital television data

Also Published As

Publication number Publication date
MX9708136A (es) 1998-07-31
EP0840460A2 (en) 1998-05-06
IL122019A0 (en) 1998-03-10
ID18985A (id) 1998-05-28
US5987637A (en) 1999-11-16
JPH10150369A (ja) 1998-06-02
AU3991797A (en) 1998-05-07
CA2198579A1 (en) 1998-04-30
KR19980033276A (ko) 1998-07-25
SG65027A1 (en) 1999-05-25
GB9622540D0 (en) 1997-01-08
CN1186385A (zh) 1998-07-01
TW354445B (en) 1999-03-11
EP0840460A3 (en) 1998-10-21

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