JPS62200600A - Life deciding device for storage element - Google Patents

Abstract

PURPOSE:To improve the stability and the reliability of operation by providing a storage element limiting the number of times of write with a means to automatically decide that the number of times of write is approaching to the limited value. CONSTITUTION:A piece of digit N is taken out from a random number generator 4 under the request by a CPU 1. If the digit N is not equal to a prescribed digit Np, a normal write operation is executed. If the digits N and Np are equal to each other, a read requesting signal is outputted to a read/write controller 3, and the controller 3 receives the counting data the number of times of write stored in a storage element 1A, adds them with each other, to generate a new data. When this data is equal to or above a prescribed number of times of write limit value Nw, the element 2A is switched into an unused area, and an alarm is generated. However, if the updated data is below the limit value, this data is stored in the element 2A. As a result, the operation of a system using a nonvolatile storage element can be improved in the stability and reliability.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an apparatus for determining the lifespan of a semiconductor non-volatile memory element such as an EPROM, which prevents the memory element from being used more than a limited number of times.

[Prior art and its problems]

Conventionally, various computer systems have been proposed that write and read data during task processing according to a certain program.

Diagram m1 is a block connection diagram of such a computer system, and 1 is a central processing unit (1) having memory and registers.
The CPU performs task processing according to the programs stored in its memory.

During this task processing, if it becomes necessary to access data in the storage element 2 such as E PROM, the CPU
I sends a write signal WR and a read request signal RD to the read/write control device. 3 is this read/write control device, which writes data to the set address when it receives the write request signal WR from the CPU 1, and
Read from PUl,! When receiving the A1 request signal RD, the data stored in the predetermined address of the memory search element 2 is read out and sent to the CPU 1. Note that the memory element 2 is E2 FROM +7]'! Or EAROM or NOV
RAM? In any semiconductor non-volatile memory, the limit value for the number of @inputs is, for example, up to 10,000 times per 17-code. In other words, this memory element is used for purposes where the data written therein is @IICL or does not require rewriting.

Next, the operation will be explained.

First, during task processing, when it becomes necessary to write data Di to the address At of the storage element 2 as shown in Figure @2, the CPU 1 sends a write request signal WR (Ai, Di) to the read/write control device 3. Send. The read/write control device 3 reads data D stored in advance at address A-A. 0 to 00 9 In other words, data Di is written into a part of 9 at address Ai of storage element 2 in response to this signal WRK. on the other hand.

When the CPU 1 sends a read request signal RD (Ai) to the read/write control device, the data Di at this address At is read and sent to the CPU 1.

However, in such a computer system, the data written to the memory element 2 is limited to data that only needs to be rewritten infrequently as described above, and if the data is written to the memory element 2 more than the limited number of times, This poses a problem in that it causes malfunctions and reduces the reliability of the entire system.

[Summary of the invention]

In view of such circumstances, the present invention fx'! - A count area for storing the number of writes Nw is provided for a predetermined number of data areas of the memory element.

When writing data to this memory element 1. In parallel with the normal writing process, a random number generator that generates a predetermined number NF with a certain probability each time the data is written is referred to, and only when the number thus generated is equal to NP, Number of writes above N
W is updated, and it is determined whether or not the number of writes Nw approaches a limit value. Determine the lifespan of the element and take necessary abnormalities.

Make it possible to automatically issue alarms, etc.

Therefore, the purpose is to prevent writing to the memory element in excess of the limit value.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a block connection diagram showing a device for determining the lifespan of a memory element, where 4 is the probability that the predetermined number NF is constant, 1, for example, '/100.
A random number generator 5 generates a random number with a probability of , and 5 is a gI@ device that notifies tS that the storage element 2 is nearing the end of its life. Further, as shown in FIG. 2, the two memory elements are provided with one count area DCNT at address C80 for storing the number of v writes Nw for, for example, 100 data areas. Note that here, data address A of @l. (1” A9
Data D-D and count data D-CNT are stored in 9" and C, respectively, and data addresses A-A and C of E2 are in an unused state too.
199 Zo.

It is expressed as .

Next, the operation will be explained according to the flowchart shown in FIG.

Here, a case will be described in which data Di is written to address Ai of storage element 2A during task processing by CPU 1.

First, when a random number generation request is received from the CPU 1, the random number generator 4 randomly picks out one number N from 100 numbers 00, 01, 02, . . . , 99 and sends it to the CPU 1 ( of steps). This method of extraction has equal probability for any number, and the probability of one number being extracted is always /
'ioo. Next, convert that number N to a predetermined number NF (
For example, in comparison with step 99), if it is NUNP, one normal write operation (operations following step ■) is performed and the process ends. If N=NP, output a read request signal RD (co.) to the read/write control device 3,
The count data D(1!IT) of the number of writes stored at address C80 of the memory element 2A is received (step ■).Here, this count data D(:!NT
'e Increment. That is, I) 1 for cN'r
, and use this as new count data D. Become a technical JT (step ■). Next, the incremented count data DONT is compared with a predetermined write count limit value Nw (for example, 9000) (step ■), and DONT≧
If it is determined to be NW, abnormality processing is performed, such as switching the storage element to an unused area or generating an alarm (step 2).

On the other hand, if DCNT<NW, a write request signal XvR (Cool DCN
T), and the updated count data I)cN'r is stored in the address C80 of the storage element 2A (step 2). Here, a write request signal WR (A i , D i ) is issued to the read/write control device to store the data Di at the address Ai of the storage element 2A (step ①), and the process ends. In this case.

The first data area of the memory element 2A (address AOO”
All data Do0-D99 of “A99)” are transferred to the second
Unused data area (addresses A100 to A199)
Transfer to. At this time, new data Di to be written is written to address Ai. Furthermore, address C10
The initial value NW=1 of write count data is written to 0, and when there is no unused data in the storage element 2A, a command is issued to the alarm device 5 to issue an alarm to the outside.

When these processes are completed in this way, the CPU 1 returns to the original task processing.

[Effects of the present invention]

As described above, according to the present invention, by having a configuration that automatically determines that the number of writes has approached the end of the life of the memory element, it is possible to the stability of the operation of the system using such non-volatile storage elements;
This improves reliability and is especially advantageous when used in IC memory cards for banks or medical applications, for example.

[Brief explanation of drawings]

Fig. 1 is a block connection diagram showing the device for determining the lifespan of a storage device according to the present invention; 2) Fig. 2 is a memory map diagram of the storage element; Fig. 3 is a flowchart of the lifespan judgment process; and Fig. 4 is a conventional computer system. FIG. 5 is a memory map diagram of a conventional memory element. 1... CPU, 2A... memory element, 3... read/write control device, 4... stroke number generator, 5... alarm device. Patent applicant Yamatake Honeywell Co., Ltd. (2 others) Figure 1 Figure 3 Figure 4 Figure 5 Procedural amendment (voluntary)

Claims (1)

[Claims] A memory element that has a limited number of writes, a read/write control device for writing data to and reading data from this memory element, a central processing unit that performs task processing, and a central processing unit that performs task processing. When it is necessary to write data to the above-mentioned memory element, the system is equipped with a random number generator that is referenced in parallel with writing the data, and when an event that occurs with a certain probability is encountered by referring to this random number generator. The memory is characterized in that only when the number of writes in the memory element is updated, the contents of a write count area in the memory element is updated, and based on this updated value can it be determined whether the number of writes in the memory element has reached a limit value. Device for determining the lifespan of elements.