WO2016152267A1

WO2016152267A1 - Amplifier and electronic circuit

Info

Publication number: WO2016152267A1
Application number: PCT/JP2016/053237
Authority: WO
Inventors: 秀行高野; 史隆近藤; 法男小路
Original assignee: ソニー株式会社
Priority date: 2015-03-24
Filing date: 2016-02-03
Publication date: 2016-09-29
Also published as: US20190158032A1; US10587227B2

Abstract

To reduce the lowest operation voltage in an amplifier wherein a transistor is used. An amplifier (300) is provided with a P-type transistor (320) and an N-type transistor (310), which are connected in series, and an operation amplifier (352). The output terminal of the operation amplifier (352) is connected to the gate of the P-type transistor (320) or the N-type transistor (310). One of the inverting input terminal and the non-inverting input terminal of the operation amplifier (352) is connected to both the drains of the P-type transistor (320) and the N-type transistor (310). Furthermore, a predetermined reference voltage (VREF) is applied to the other one of the inverting input terminal and the non-inverting input terminal.

Description

Amplifiers and electronic circuits

This technology relates to amplifiers and electronic circuits. Specifically, the present invention relates to an amplifier and an electronic circuit that amplify a signal using a transistor.

Conventionally, an amplifier is used to amplify a weak signal in a radio signal receiver or the like. This amplifier is generally arranged at the first stage of the receiver, and its gain and noise figure greatly affect the reception sensitivity of the radio signal. Here, the noise figure is the ratio between the S / N (Signal to Noise) ratio of the input signal to the amplifier and the S / N ratio of the output signal from the amplifier. Usually, the larger the gain of the amplifier, the higher the receiving sensitivity, and the smaller the noise figure, the higher the receiving sensitivity. In order to improve these characteristics such as gain, for example, an amplifier in which a P-type transistor and an N-type transistor for amplifying a signal are connected in series to a power supply has been proposed (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 2006-60606

In the above-described amplifier, since two transistors are provided, characteristics such as gain and noise figure can be improved as compared with an amplifier having only one transistor, but instead, the minimum operating voltage is increased, and accordingly, There is a problem that power consumption can increase. In this amplifier, when the saturation drain voltage of the transistor is V _sat and the threshold voltage is V _T , the minimum operating voltage is 2V _SAT + V _T , and under a low voltage such as 2V _sat , the minimum operation is V _T by that voltage. It becomes impossible to operate because the voltage is high.

This technology has been created in view of such a situation, and aims to reduce the minimum operating voltage in an amplifier using a transistor.

[Correction based on Rule 91 14.03.2016]
The present technology has been made to solve the above-mentioned problems, and a first aspect thereof includes a P-type transistor and an N-type transistor connected in series, and an operational amplifier, and the operational amplifier Is connected to one gate of the P-type transistor and the N-type transistor, and one of the inverting input terminal and the non-inverting input terminal of the operational amplifier is connected to the drains of both the P-type transistor and the N-type transistor. The amplifier is connected and a predetermined reference voltage is applied to the other of the inverting input terminal and the non-inverting input terminal. As a result, one of the inverting input terminal and the non-inverting input terminal of the operational amplifier and the output terminal are connected, and the inverting input terminal and the non-inverting input terminal are virtually short-circuited.

Further, in the first aspect, a bias voltage supply unit that supplies a predetermined bias voltage to one of the gates of the P-type transistor and the N-type transistor, the gate of the P-type transistor, and the N-type transistor A capacitor inserted between the gate and the gate may further be provided. This brings about the effect that an independent bias voltage is applied to one gate of the P-type transistor and the N-type transistor.

Further, in the first aspect, a current source connected to the drain may be further provided. This brings about the effect | action that an electric current is supplied from a current source.

In the first aspect, a cascode transistor element may be further inserted between the drain and the current source. As a result, the parasitic capacitance of the drain is reduced.

The first aspect further includes a comparator that compares the potential of the gate with a predetermined potential and supplies the comparison result, and the current source is configured to output the predetermined current based on the comparison result of the comparator. May be supplied. This brings about the effect | action that an electric current is supplied based on the comparison result of a comparator.

Further, in the first aspect, a low-pass filter may be further provided, the current source may include a transistor, and the low-pass filter may supply a DC bias voltage to the gate terminal of the transistor. As a result, only the DC bias voltage is supplied to the gate terminal of the transistor, and the transistor functions only as a DC current source.

Further, in the first aspect, an impedance matching circuit that matches impedances of circuits at both ends of the transmission line connected to the amplifier may be further provided. This brings about the effect that the impedances of the circuits at both ends of the transmission line are matched.

In this first aspect, the predetermined reference voltage is a value equal to or higher than one saturated drain voltage of the P-type transistor and the N-type transistor. This brings about the effect that the P-type transistor and the N-type transistor operate in a saturation region.

[Correction based on Rule 91 14.03.2016]
A second aspect of the present technology includes a P-type transistor and an N-type transistor connected in series, and an operational amplifier, and an output terminal of the operational amplifier is one of the P-type transistor and the N-type transistor. One of the inverting input terminal and the non-inverting input terminal of the operational amplifier is connected to the drains of both the P-type transistor and the N-type transistor, and the other of the inverting input terminal and the non-inverting input terminal. An electronic circuit comprising an amplifier to which a predetermined reference voltage is applied and a signal processing unit that processes a signal output from the drain. As a result, one of the inverting input terminal and the non-inverting input terminal of the operational amplifier and the output terminal are connected, and the inverting input terminal and the non-inverting input terminal are virtually short-circuited.

Further, in the second aspect, a bias voltage supply unit that supplies a bias voltage having a value indicated by a control signal to one of the gates of the P-type transistor and the N-type transistor, the gate of the P-type transistor, A capacitor inserted between the gate of the N-type transistor may be further included. This brings about an effect that an independent bias voltage is applied to one gate of the P-type transistor and the N-type transistor.

In the second aspect, the signal processing unit may process the signal output from the drain and generate the control signal based on the level of the signal. As a result, the control signal is generated based on the level of the signal.

According to the present technology, an excellent effect that the minimum operating voltage can be lowered in an amplifier using a transistor can be obtained. Note that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

It is a block diagram which shows the example of 1 structure of the radio | wireless receiver in 1st Embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in 1st Embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in the modification of 1st Embodiment. It is a block diagram which shows one structural example of the radio | wireless receiver in 2nd Embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in 2nd Embodiment. It is a graph which shows an example of the drain current for every control value in a 2nd embodiment. 7 is a flowchart illustrating an example of an operation of a wireless receiver according to the second embodiment. It is a block diagram which shows one structural example of the radio receiver in the modification of 2nd Embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in 3rd Embodiment. It is a graph which shows an example of the drain current for every control value in a 3rd embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in the modification of 3rd Embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in 4th Embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in the 1st modification of 4th Embodiment. It is a circuit diagram which shows one structural example of the bias voltage supply part in the 1st modification of 4th Embodiment. It is a circuit diagram which shows one structural example of the low noise amplifier in the 2nd modification of 4th Embodiment.

Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The description will be made in the following order.
1. First embodiment (example in which terminals of operational amplifier are virtually short-circuited)
2. Second Embodiment (Example of Controlling Bias Voltage by Virtual Shorting Between Operational Amplifier Terminals)
3. Third Embodiment (Example in which auxiliary current is supplied and terminals of operational amplifiers are virtually shorted)
4). Fourth embodiment (example in which a low-pass filter or the like is provided to virtually short-circuit between operational amplifier terminals)

<1. First Embodiment>
[Configuration example of wireless receiver]
FIG. 1 is a block diagram illustrating a configuration example of a wireless receiver 200 according to the first embodiment. The radio receiver 200 receives an RF (Radio Frequency) signal, and includes a low noise amplifier 300, a frequency down converter 210, and a low pass filter 220. The radio receiver 200 includes an AD (Analog to Digital) converter 230 and a digital signal processing unit 240. An antenna 100 is connected to the wireless receiver 200. The circuit in the wireless receiver 200 is an example of an electronic circuit described in the claims.

The antenna 100 converts radio waves into RF signals and supplies them to the low noise amplifier 300 via the signal line 109. The low noise amplifier 300 amplifies the RF signal and supplies it to the frequency down converter 210 via the signal line 309. The low noise amplifier 300 is an example of an amplifier described in the claims.

The frequency down converter 210 converts the RF signal into a signal (baseband signal or the like) having a frequency lower than that of the RF signal. The frequency down converter 210 supplies the converted baseband signal to the AD converter 230 via the signal line 219.

The AD converter 230 converts an analog baseband signal into a digital signal and supplies it to the digital signal processing unit 240 via a signal line 239.

The digital signal processing unit 240 performs predetermined signal processing such as demodulation processing on the digital signal. The digital signal processing unit 240 outputs the processed demodulated signal to an external device. The digital signal processing unit is an example of a signal processing unit described in the claims.

In addition, although the low noise amplifier 300 is provided in the wireless receiver 200, the low noise amplifier 300 may be provided in a device (such as a wireless transmitter or an acoustic device) other than the wireless receiver 200.

[Configuration example of low noise amplifier]
FIG. 2 is a circuit diagram illustrating a configuration example of the low noise amplifier 300 according to the first embodiment. The low noise amplifier 300 includes an input terminal 307, an output terminal 308, an in-phase feedback circuit 350, a capacitor 371, a capacitor 373, a bias voltage supply unit 380, a P-type transistor 320, and an N-type transistor 310. The common-mode feedback circuit 350 includes a resistor 351 and an operational amplifier 352. As the P-type transistor 320 and the N-type transistor 310, for example, MOS transistors are used.

The input terminal 307 is connected to the antenna 100. One end of the capacitor 371 is connected to the input terminal 307, and the other end is connected to the capacitor 373, the gate of the P-type transistor 320, and the resistor 351. Capacitor 373 is inserted between the gate of P-type transistor 320 and the gate of N-type transistor 310. P-type transistor 320 and N-type transistor 310 are connected in series to the power supply terminal.

The drains of both the P-type transistor 320 and the N-type transistor 310 are connected to the output terminal 308 and the non-inverting input terminal (+) of the operational amplifier 352. A predetermined reference voltage V _REF is applied to the inverting input terminal (−) of the operational amplifier 352, and the output terminal of the operational amplifier 352 is connected to the gate of the P-type transistor 320 via the resistor 351. The output terminal 308 is connected to the frequency down converter 210.

Here, the reference voltage V _REF is set to a value equal to or higher than the saturation drain voltage V _{SAT of} the P-type transistor 320 or the N-type transistor 310, for example. Note that the saturation drain voltages of the P-type transistor 320 and the N-type transistor 310 are the same.

The bias voltage supply unit 380 supplies a constant bias voltage V _BIAS to the gate of the N-type transistor 310. The bias voltage V _BIAS is set to a value that satisfies the following expression. Here, the unit of the bias voltage V _BIAS is, for example, volts (V). The same applies to voltage units other than the bias voltage V _BIAS .
V _T <V _BIAS <V _SAT + V _T Equation 1
In the above equation, V _T is the threshold voltage of the N-type transistor 310. Note that the threshold voltages of the P-type transistor 320 and the N-type transistor 310 are the same.

In the above-described configuration, the DC component of the RF signal is cut by the capacitor 371, and the AC signal component is input to the P-type transistor 320 and the like. It is assumed that this signal component is weak and the gate potential of the P-type transistor 320 is at a low level. In this case, the P-type transistor 320 is turned on and operates in the saturation region. On the other hand, the N-type transistor 310 is also turned on by applying the bias voltage V _BIAS . These P-type transistor 320 and N-type transistor 310 amplify the signal component.

Here, in order to operate the N-type transistor 310 and the P-type transistor 320 in the ON state, the power supply voltage V _{DD at} the power supply terminal needs to satisfy the following expression.
V _DD -V _OUT ≥V _SAT ... Formula 2
In the above equation, V _OUT is an output voltage from the drains of the P-type transistor 320 and the N-type transistor 310.

When the P-type transistor 320 is on, the output terminal of the operational amplifier 352 is connected to the non-inverting input terminal (+) via the P-type transistor 320, and the non-inverting input terminal (+) and the inverting input terminal ( -) Is virtually shorted. As a result, the voltage at the non-inverting input terminal (+) and the voltage at the inverting input terminal (−) become the same, and the following equation is established.
V _OUT = V _REF・・・ Equation 3

When the saturation drain voltage V _SAT is set to the reference voltage V _REF in the above equation, the above equation can be replaced with the following equation.
V _OUT = V _SAT・・・ Formula 4

Substituting Equation 4 into Equation 2 yields:
V _DD ≧ 2V _SAT・・・ Formula 5
From the above equation, the minimum operating voltage of the low noise amplifier 300 is 2V _SAT .

Here, if a configuration in which the common-mode feedback circuit 350 is not provided as described in Patent Document 1, the power supply voltage V _DD needs to satisfy the following equation.
V _DD ≧ 2V _SAT + V _T Equation 6

From the above equation, the minimum operating voltage when the common-mode feedback circuit 350 is not provided is 2V _SAT + V _T. For example, the saturation drain voltage V _SAT of 0.2 volts (V), when the threshold voltage _{V T} is 0.4V, the minimum operating voltage of 0.8 volts (V). On the other hand, in the low-noise amplifier 300 provided with the common-mode feedback circuit 350, the minimum operating voltage is 2V _SAT (= 0.4V) from Equation 5, and 0.8 when the common-mode feedback circuit 350 is not provided. It is very low compared to the bolt (V). In an actual circuit, a value obtained by adding a margin to the theoretical minimum operating voltage (2V _SAT ) is used as the power supply voltage V _DD , but 0.6 volt (V) or 0.7 volt is considered even if the margin is taken into consideration. The low noise amplifier 300 can be operated with a margin under a very low voltage such as (V).

Although the capacitor 371 for cutting the DC component is provided inside the low noise amplifier 300, the capacitor 371 may be provided outside the low noise amplifier 300. In this case, for example, a capacitor 371 is inserted between the low noise amplifier 300 and the antenna 100.

Further, although the bias voltage supply unit 380 is provided inside the low noise amplifier 300, the bias voltage supply unit 380 may be provided outside the low noise amplifier 300. Further, although the bias voltage V _BIAS is applied to the gate of the N-type transistor 310, it may be configured not to apply it. In this case, the capacitor 373 and the bias voltage supply unit 380 for applying the bias voltage V _BIAS only to the N-type transistor 310 become unnecessary. However, in this configuration, the P-type transistor 320 and the N-type transistor 310 operate as inverters and function only as amplifiers near the voltage to be inverted. Therefore, it is desirable to provide the capacitor 373 and the bias voltage supply unit 380.

Thus, according to the first embodiment of the present technology, the reference voltage is applied to the non-inverting input terminal of the operational amplifier 352, and the inverting input terminal and the output terminal are connected via the P-type transistor 320. A virtual short circuit can be made between the non-inverting input terminal and the inverting input terminal. Thereby, the output voltage V _OUT of the drains of the P-type transistor 320 and the N-type transistor 310 becomes the same as the reference voltage V _REF (= V _SAT ), and as a result, the minimum operating voltage can be lowered to 2V _SAT .

[Modification]
In the first embodiment described above, the bias voltage supply unit 380 applies the bias voltage V _BIAS to the N-type transistor 310 and inputs a low level weak AC signal to the P-type transistor 320 for amplification. In this configuration, the high-level AC signal cannot be amplified because the P-type transistor 320 is turned off. However, if the bias voltage supply unit 380 is configured to apply a bias voltage to the P-type transistor 320 and input an AC signal to the N-type transistor 310, the high-level AC that is higher than the threshold voltage V _T of the N-type transistor 310. The signal can be amplified. The low noise amplifier 300 according to the modification of the first embodiment is different from the first embodiment in that a bias voltage is applied to the P-type transistor 320 and an AC signal is input to the N-type transistor 310.

FIG. 3 is a circuit diagram showing a configuration example of the low noise amplifier 300 according to a modification of the first embodiment. The bias voltage supply unit 380 of this modification applies a bias voltage V _BIAS ′ to the gate of the P-type transistor 320 instead of the N-type transistor 310. The bias voltage V _BIAS ′ is set to a low level such as around 0 volts (V). In addition, one end of the resistor 351 of the modification is connected to the gate of the N-type transistor 310, and one end of the capacitor 371 is connected to the capacitor 373, the gate of the N-type transistor 310, and the resistor 351. In addition, a high-level AC signal higher than the threshold voltage V _T is input to the gate of the N-type transistor 310 of the modified example.

As described above, according to the modification of the first embodiment of the present technology, the bias voltage is supplied to the gate of the P-type transistor 320 and the AC signal is input to the N-type transistor 310. A high level AC signal can be amplified instead of. Thus, since the low noise amplifier 300 can amplify a high level AC signal, the low noise amplifier 300 can be applied to the wireless receiver 200 in which the AC signal is assumed to be at a high level.

<2. Second Embodiment>
In the first embodiment described above, the bias voltage V _BIAS is constant, but the radio receiver 200 may control the value of the bias voltage V _BIAS according to the reception level. The radio receiver 200 according to the second embodiment is different from the first embodiment in that the value of the bias voltage V _BIAS is controlled according to the reception level.

FIG. 4 is a block diagram illustrating a configuration example of the wireless receiver 200 according to the second embodiment. The radio receiver 200 according to the second embodiment is different from the first embodiment in that a low noise amplifier 301 and a digital signal processing unit 241 are provided instead of the low noise amplifier 300 and the digital signal processing unit 240.

The digital signal processing unit 241 processes the digital signal and detects the level of the digital signal as a reception level. Then, the digital signal processing unit 241 controls the bias voltage V _BIAS in the low noise amplifier 301 by the control signal according to the detected reception level. For example, when the reception level is higher than a predetermined threshold Tr, the bias voltage V _BIAS is lowered. As a result, although the characteristics such as the gain and noise figure of the low noise amplifier 301 are lowered, the current consumption of the low noise amplifier 301 can be reduced. On the other hand, when the reception level is equal to or lower than the threshold value Tr, the digital signal processing unit 241 increases the bias voltage V _BIAS . Thereby, although the current consumption of the low noise amplifier 301 is increased, characteristics such as gain are improved.

FIG. 5 is a circuit diagram showing a configuration example of the low-noise amplifier 301 in the second embodiment. The low noise amplifier 301 is different from that of the first embodiment in that a bias voltage supply unit 381 is provided instead of the bias voltage supply unit 380.

The bias voltage supply unit 381 is different from the bias voltage supply unit 380 of the first embodiment in that a bias voltage V _BIAS having a value indicated by the control signal from the digital signal processing unit 241 is supplied.

FIG. 6 is a graph illustrating an example of the drain current for each control value in the second embodiment. In the figure, the vertical axis represents the drain current _ID of the N-type transistor 310, and the horizontal axis represents the control value indicated by the control signal. As illustrated in the figure, the control value, the drain current I _D can be controlled from 0 to a range of I _D _Max1.

Thus, the drain current I _D can not be larger than I _D _Max1 is generally in the gate width and gate length under the same conditions, the current discharge capability of the P-type transistor 320, from the N-type transistor 310 This is because it is small.

Although the maximum drain current can be increased by increasing the gate width of the P-type transistor 320, it is not preferable to increase the gate width because gain and noise characteristics at high frequencies deteriorate. In addition, it is difficult to reduce the gate length of the P-type transistor 320 because the gate length of the P-type transistor 320 is generally set to the minimum value allowed by the manufacturing process for high-frequency operation.

FIG. 7 is a flowchart showing an example of the operation of the wireless receiver 200 in the second embodiment. This operation is started, for example, when the radio receiver 200 is turned on.

The wireless receiver 200 amplifies the RF signal (step S901) and demodulates the RF signal (step S902). Radio receiver 200 detects the reception level and determines whether or not the value is higher than threshold value Tr (step S906). When the reception level is higher than the threshold value Tr (step S906: Yes), the wireless receiver 200 reduces the bias voltage V _BIAS to V1 to reduce the current consumption (step S907). On the other hand, when the reception level is equal to or lower than the threshold value Tr (step S906: No), the wireless receiver 200 increases the current consumption by increasing the bias voltage V _BIAS to V2 higher than V1 (step S908). After step S907 or S908, the wireless receiver 200 repeats step S901 and subsequent steps.

The radio receiver 200 controls the bias voltage in two stages of V1 or V2 depending on whether the reception level is higher than the threshold value Tr, but is not limited to this configuration. For example, the wireless receiver 200 may be configured to control the bias voltage in multiple steps to a lower value as the reception level increases by setting a plurality of threshold values.

As described above, according to the second embodiment of the present technology, the radio receiver 200 controls the bias voltage according to the reception level, and thus receives a balance between the gain and noise figure characteristics and the power consumption. Can be adjusted according to the level.

[Modification]
In the second embodiment described above, the digital signal processing unit 241 of the radio receiver 200 has controlled the bias voltage V _BIAS, the external device of the radio receiver 200 controls the bias voltage V _BIAS Also good. The radio receiver 200 according to the modification of the second embodiment is different from the second embodiment in that the bias voltage V _BIAS is changed according to control of an external device.

FIG. 8 is a block diagram illustrating a configuration example of the wireless receiver 200 according to the modification of the second embodiment. The radio receiver 200 of this modification is different from the second embodiment in that a digital signal processing unit 240 is provided instead of the digital signal processing unit 241.

The digital signal processing unit 240 according to the second embodiment supplies the demodulated signal to the electronic device 400 outside the wireless receiver 200.

The electronic device 400 detects the level of the demodulated signal as a reception level, and controls the bias voltage V _BIAS by a control signal based on the reception level.

Thus, according to the modification of the second embodiment of the present technology, since the electronic device 400 controls the bias voltage V _BIAS instead of the digital signal processing unit 240, the bias voltage V _BIAS is used as the electronic device 400. Can be set to a value corresponding to the detected reception level.

<3. Third Embodiment>
In the second embodiment described above, the radio receiver 200 controls the drain current _ID of the N-type transistor 310. However, unless the gate width or gate length of the P-type transistor 320 is changed, the drain current I _D cannot be larger than the constant value I _{D —} max1. However, if an auxiliary current source that supplies a predetermined current as an auxiliary current is provided at the drain of the N-type transistor 310, the maximum value of the drain current _ID is increased without degrading the characteristics (in other words, the control range is widened). )can do. The low noise amplifier 301 of the third embodiment is different from the second embodiment in that the control range of the drain current _ID is widened by the auxiliary current source.

FIG. 9 is a circuit diagram showing a configuration example of the low-noise amplifier 301 in the third embodiment. The low noise amplifier 301 of the third embodiment is different from that of the second embodiment in that an auxiliary current source 330 is further provided.

The auxiliary current source 330 supplies a predetermined auxiliary current from the power supply terminal to the drain of the N-type transistor 310. The auxiliary current source 330 is realized by, for example, a P-type transistor. The auxiliary current source 330 is an example of a current source described in the claims.

Even if the auxiliary current source 330 is provided, the gain is not lowered and the noise figure is improved. Details thereof will be described later in the fourth embodiment.

FIG. 10 is a graph illustrating an example of the drain current for each control value in the third embodiment. In the figure, the vertical axis represents the drain current _ID of the N-type transistor 310, and the horizontal axis represents the control value indicated by the control signal. Also, _{I D} _Max1 is the maximum value of the drain current _{I D} of the case without the auxiliary current source 330. As illustrated in the figure, by providing the auxiliary current source 330, the drain current I _D can be controlled to a value larger than I _D _Max1.

As described above, according to the third embodiment of the present technology, since the auxiliary current source 330 supplies the auxiliary current to the drains of the P-type transistor 320 and the N-type transistor 310, the drain current control range is widened. be able to.

[Modification]
In the third embodiment described above, the bias voltage supply unit 381 applies the bias voltage V _BIAS to the N-type transistor 310 and inputs a low-level weak AC signal to the P-type transistor 320 for amplification. In this configuration, the high-level AC signal cannot be amplified because the P-type transistor 320 is turned off. However, if the bias voltage supply unit 381 is configured to apply a bias voltage to the P-type transistor 320 and input an AC signal to the N-type transistor 310, a high-level AC higher than the threshold voltage V _T of the N-type transistor 310. The signal can be amplified. A bias voltage may be applied to the P-type transistor 320. The low noise amplifier 300 according to the modification of the third embodiment is different from the third embodiment in that a bias voltage V is applied to the P-type transistor 320 and an AC signal is input to the N-type transistor 310.

FIG. 11 is a circuit diagram showing a configuration example of the low noise amplifier 301 in a modification of the third embodiment. The bias voltage supply unit 380 of this modification applies a bias voltage V _BIAS ′ to the gate of the P-type transistor 320 instead of the N-type transistor 310. In addition, one end of the resistor 351 of the modification is connected to the gate of the N-type transistor 310, and one end of the capacitor 371 is connected to the capacitor 373, the gate of the N-type transistor 310, and the resistor 351. Further, the auxiliary current source 330 according to the modification supplies an auxiliary current from the ground terminal to the source of the P-type transistor 320.

As described above, according to the modification of the third embodiment of the present technology, the bias voltage is supplied to the gate of the P-type transistor 320 and the AC signal is input to the N-type transistor 310. A high level AC signal can be amplified instead of. Thus, since the low noise amplifier 300 can amplify a high level AC signal, the low noise amplifier 300 can be applied to the wireless receiver 200 in which the AC signal is assumed to be at a high level.

<4. Fourth Embodiment>
In the third embodiment described above, characteristics such as noise figure are improved by the auxiliary current source 330, but the characteristics can be further improved by providing a low-pass filter. Also, from the viewpoint of improving transmission efficiency, it is desirable to match the impedance between the transmission side and the reception side. The low noise amplifier 301 of the fourth embodiment is different from that of the third embodiment in that a low pass filter and an impedance matching circuit are further provided.

FIG. 12 is a circuit diagram showing a configuration example of the low-noise amplifier 301 in the fourth embodiment. The low noise amplifier 301 of the fourth embodiment is different from the third embodiment in that it further includes an impedance matching circuit 372 and a low pass filter 360. The low pass filter 360 includes a capacitor 361 and a resistor 362. The auxiliary current source 330 according to the fourth embodiment includes a P-type transistor 331. For example, a MOS transistor is used as the P-type transistor 331.

The impedance matching circuit 372 is inserted between the capacitor 371 and the gate of the P-type transistor 320. One end of the capacitor 361 is connected to the power supply terminal, and the other end is connected to the resistor 362 and the gate of the P-type transistor 331. One end of the resistor 362 is connected to the capacitor 361 and the gate of the P-type transistor 331, and the other end is connected to the resistor 351 and the output terminal of the operational amplifier 352. The source of the P-type transistor 331 is connected to the power supply terminal, and the drain is connected to the drains of the P-type transistor 320 and the N-type transistor 310 and the non-inverting input terminal (+) of the operational amplifier 352. The gate of the P-type transistor 331 is connected to the capacitor 361 and the resistor 362.

The impedance matching circuit 372 matches the impedance of each circuit on the transmission side and the reception side of the transmission path for transmitting the RF signal. Thereby, reflection loss can be minimized and transmission efficiency can be improved.

The low pass filter 360 supplies only a DC bias voltage to the gate terminal of the P-type transistor 331. The cut-off frequency of the low-pass filter 360 is set to a sufficiently low value with respect to the signal component band. Further, by connecting the low-pass filter 360 to the gate of the P-type transistor 331, the P-type transistor 331 does not contribute to signal amplification and functions only as a direct current source. Thereby, oscillation etc. can be suppressed and the low noise amplifier 301 can be operated stably.

Here, the effect of improving the characteristics by the auxiliary current source 330 will be described. A channel width ratio between the P-type transistor 320 and the P-type transistor 331 is, for example, 1: a. Here, a is a value that satisfies the following expression.
0 <a <1 Equation 7

When the channel width ratio is 1: a, the drain current I _D2 (that is, the auxiliary current) of the P-type transistor 320 is expressed by the following equation, for example. The unit of the drain current _ID2 is, for example, ampere (A).
I _D2 = I _D × {1 / (1 + a)} Expression 8
In the above formula, _ID is the drain current of the N-type transistor 310, and the unit is, for example, ampere (A).

Further, the transconductance g _m2 and the output resistance r _o2 of the P-type transistor 320 are expressed by the following equations, for example. The unit of transconductance g _m2 is, for example, Siemens (S). The unit of the output resistance r _o2 is, for example, ohm (Ω).
g _m2 = {(K _p · _ID ) / (1 + a)} ^1/2 Equation 9
K _p = μ _p · C _ox · (W / L) Equation 10

In Expression 10, μ _p is the carrier mobility in the P-type transistor 320, and the unit is, for example, square meter per volt per second (m ² / V · s). C _ox is a gate capacitance according to the gate oxide film thickness, and its unit is, for example, farad (F). W is the gate width and L is the gate length. The unit of W and L is, for example, meters (m). In Equation 11, gamma is a channel length modulation coefficient.

As illustrated in Equation 8, it seems that the current of the P-type transistor 320 is shunted to the auxiliary current source 330, but the gain of the P-type transistor 320 seems to decrease, but this is not the case. As illustrated in Equation 9, the transconductance g _m2 of the P-type transistor 320 is inversely proportional to the square root of the shunt ratio (1 + a), and as illustrated in Equation 11, the output resistance r _o2 is proportional to the shunt ratio (1 + a). . Therefore, the gain, which is the product of these, increases in proportion to the square root of the diversion ratio (1 + a) as shown in the following equation. Therefore, even if the auxiliary current source 330 is connected, the gain of the low noise amplifier 300 is not reduced.

Also consider the noise figure. In general, the noise figure NF is expressed by the following equation.
NF = SNR _in / SNR _out ··· formula 13
In the above equation, SNR _in is the S / N ratio of the input signal, and SNR _out is the S / N ratio of the output signal. These S / N ratios are obtained by the following formula.

In Equation 15, G is a voltage gain. Further, Vn ² with an overline indicates noise generated by the low noise amplifier 300. Equation 13 can be transformed into the following equation using Equation 14 and Equation 15.

When the input matching is achieved by the impedance matching circuit 372, the voltage gain G of the low noise amplifier 301 is expressed by the following equation.
G = R _in (g _m1 + g _m2 ) r _o1 · r _o2 / {(R _s + R _in ) · (r _o1 + r _o2 )}
= (G _m1 + g _m2 ) r _o1 · r _o2 / {2 (r _o1 + r _o2 )}
In the above equation, R _in is a resistance on the input side of the impedance matching circuit 372. g _m1 is the transconductance of the N-type transistor 310, and the unit is, for example, Siemens (S). R _s is the resistance of the signal source of the input signal, and its unit is, for example, ohm (Ω). These resistance values are assumed to be the same, for example.

Next, assuming that R _s is converted to n times the resistance by the impedance matching circuit 372 (n is a real number), the input noise is expressed by the following equation.

In the above equation, k is a Boltzmann constant. T is an absolute temperature, and the unit is, for example, Kelvin (K).

The channel thermal noise current generated by each of the N-type transistor 310, the P-type transistor 320, and the P-type transistor 331 is represented by the following equation.

In Equations 19 to 21, gamma is a channel thermal noise coefficient. Further, the left side of Expression 19 indicates the channel thermal noise current of the N-type transistor 310, and the left side of Expression 20 indicates the channel thermal noise current of the P-type transistor 320. The left side of Equation 21 represents the channel thermal noise current of the P-type transistor 331. In Equation 21, g _m3 is the transconductance of the P-type transistor 331, and the unit is, for example, Siemens (S).

Assuming that only the channel thermal noise exemplified in Expressions 19 to 21 is generated as noise, the noise generated by the low noise amplifier 301 is expressed by the following expression obtained by multiplying the sum of Expressions 19 to 21 by the output resistance. .

Substituting Equation 17, Equation 18, and Equation 22 into Equation 16 gives the following equation.

Here, the transconductance of these elements is determined from the element sizes and current values of the P-type transistor 320, the N-type transistor 310, and the P-type transistor 331 according to the square law of the MOS transistors. For example, the transconductances g _m1 , g _m2, and g _m3 of the P-type transistor 320, the N-type transistor 310, and the P-type transistor 331 are obtained by the following equations.
_{_{g m1 = (u n · C}} ox (W / L) · I D) 1/2
= (K _n · _ID ) ^1/2 ··· Formula 24
_{_{_{g m2 = {(u p ·}}} C ox (W / L) · I D / (1 + a)} 1/2
= { _Kp · _ID / (1 + a)) ^1/2 ... Equation 25
_{_{_{g m3 = {(u p ·}}} C ox (aW / L) · I D · a / (1 + a)} 1/2
= { _Kp · _ID · a ² / (1 + a)} ^1/2 Equation 26

Substituting Equation 24, Equation 25, and Equation 26 into Equation 23 and rearranging results in the following equation.

In the above equation, the third term of the numerator represents the noise increment due to the auxiliary current source 330. However, since a <1 from Equation 7, the degree of contribution to noise is lower than that of the first and second terms of the numerator. . Further, as illustrated in the above equation, since the noise figure NF decreases in inverse proportion to the square root of the operating current (I _D ), the effect of improving the noise figure due to the fact that I _D can be increased by the auxiliary current source 330 is better. Usually larger.

Although the bias voltage supply unit 380 applies the bias voltage V _BIAS to the N-type transistor 310 in the fourth embodiment, a bias voltage may be applied to the P-type transistor 320.

In addition, although both the impedance matching circuit 372 and the low-pass filter 360 are provided, a configuration in which only one of them is provided may be employed.

Thus, according to the fourth embodiment of the present technology, since the low-pass filter 360 supplies only the DC bias voltage to the gate terminal of the P-type transistor 331, the P-type transistor 331 functions only as a DC current source. be able to. Further, since the impedance matching circuit 372 performs impedance matching, transmission efficiency can be improved.

[First Modification]
In the above-described fourth embodiment, the drain current _ID is increased by the auxiliary current source 330. However, the capacity between the output terminal 308 and the power supply terminal is increased by the capacity of the auxiliary current source 330. End up. When this capacitance increases, the cut-off frequency of the low-pass filter composed of the capacitance and resistance decreases, and the frequency band that passes through the filter becomes narrow. As a result, it becomes difficult to amplify high frequency components. Therefore, it is desirable to insert a cascode transistor element such as an N-type transistor and adjust the capacitance so that the characteristics do not deteriorate. The low noise amplifier 301 in the first modification of the fourth embodiment is different from the fourth embodiment in that a cascode transistor element is further provided.

FIG. 13 is a circuit diagram showing a configuration example of the low noise amplifier 301 in the first modification example of the fourth embodiment. The low noise amplifier 301 of the first modification is different from the fourth embodiment in that it further includes an N-type transistor 340. As the N-type transistor 340, for example, a MOS transistor is used.

The gate of the N-type transistor 340 is connected to the bias voltage supply unit 381, and the drain is connected to the drain of the P-type transistor 320 and the non-inverting input terminal (+) of the operational amplifier 352. The source of the N-type transistor 340 is connected to the drain of the N-type transistor 310 and the drain of the P-type transistor 331. The N-type transistor 340 is an example of a cascode transistor element recited in the claims.

As described above, the N-type transistor 340 is inserted between the auxiliary current source 330 connected to the power supply terminal and the drain of the P-type transistor 320. Since this drain is connected to the output terminal 308, the capacitance between the power supply terminal and the output terminal 308 is reduced as compared with the case where only the auxiliary current source 330 is used.

FIG. 14 is a circuit diagram showing a configuration example of the bias voltage supply unit 381 in the first modification example of the fourth embodiment. The bias voltage supply unit 381 includes reference

current sources

382 and 383, N-

type transistors

384, 385 and 386,

capacitors

387 and 388, and a resistor 389. As these N-

type transistors

384, 385 and 386, for example, MOS transistors are used.

The gate and drain of the N-type transistor 384 are connected to the reference current source 382, the gates of the N-

type transistors

385 and 340, and the capacitor 387, and the source is connected to the ground terminal.

The gate of N-type transistor 385 is connected to reference current source 382, N-

type transistors

384 and 340, and capacitor 387, the source is connected to the ground terminal, and the drain is connected to reference current source 383, capacitor 388, and resistor 389. The

The gate of the N-type transistor 386 is connected to the capacitor 388, the resistor 389, and the reference current source 383, the source is connected to the ground terminal, and the drain is connected to the source of the N-type transistor 385.

One end of the capacitor 387 is connected to the N-

type transistors

384, 385 and 340 and the reference current source 382, and the other end is connected to the ground terminal. One end of the capacitor 388 is connected to the N-

type transistors

385 and 386, the reference current source 383, and the resistor 389, and the other end is connected to the ground terminal.

One end of the resistor 389 is connected to the N-

type transistors

385 and 386, the reference current source 383, and the capacitor 388, and the other end is connected to the N-type transistor 310.

The reference current source 382 supplies the reference current I _REF1 to the N-type transistor 385 and the like in accordance with a control signal from the digital signal processing unit 241. The reference current source 383 supplies the reference current I _REF2 to the N-type transistor 386 and the like in accordance with a control signal from the digital signal processing unit 241.

With the above-described configuration, the circuit including the N-

type transistors

384 and 385 functions as a current mirror circuit. In addition, the digital signal processing unit 241 can set the operating current (I _D ) corresponding to the reception level by controlling the reference currents (I _REF1 , I _REF2 ) with the control signal.

As described above, according to the first modification of the fourth embodiment of the present technology, since the N-type transistor 340 is inserted between the auxiliary current source 330 and the drain of the P-type transistor 320, the power supply terminal and the output terminal Increase in capacity between the two can be suppressed. As a result, the frequency band passing through the filter composed of the capacitance and the resistance is widened, and the low noise amplifier 301 can easily amplify the high frequency component.

[Second Modification]
In the above-described fourth embodiment, the auxiliary current source 330 always supplies an auxiliary current after the power is turned on. However, when the P-type transistor 320 is in the off state, amplification by the P-type transistor 320 is performed. Therefore, it is not necessary to supply an auxiliary current. For this reason, from the viewpoint of saving current consumption, it is desirable to supply the auxiliary current only when the gate of the P-type transistor 320 is at the low level (that is, the P-type transistor 320 is in the ON state). The low noise amplifier 301 in the second modification of the fourth embodiment is different from the fourth embodiment in that an auxiliary current is supplied when the gate of the P-type transistor 320 is at a low level.

FIG. 15 is a circuit diagram showing a configuration example of the low noise amplifier 301 in the second modification example of the fourth embodiment. The low noise amplifier 301 of the second modified example is different from the fourth embodiment in that it further includes a comparator 390.

The inverting input terminal (−) of the comparator 390 is connected to the output terminal of the operational amplifier 352 and the resistor 351, a predetermined reference voltage V _REF2 is applied to the non-inverting input terminal (+), and the output terminal is connected to the resistor 362. Connected. The reference voltage V _REF2 is set to a low level, for example, near 0 volts (V). In addition, one end of the resistor 362 of the second modified example is not connected to either the resistor 351 or the operational amplifier 352 but is connected only to the comparator 390.

In the operational amplifier 352, the characteristics (threshold voltage, etc.) of the transistor in the operational amplifier 352 may change due to variations in process, voltage, temperature, and the like, and the output terminal may become high level. In this case, the potential of the gate of the P-type transistor 320 connected to the output terminal becomes a high level, and the P-type transistor 320 is turned off.

Therefore, the comparator 390 compares the voltage at the output terminal of the operational amplifier 352 (that is, the gate of the P-type transistor 320) with the reference voltage V _REF2 and supplies the comparison result to the auxiliary current source 330. Then, the auxiliary current source 330 supplies an auxiliary current based on the comparison result. For example, when the gate of the P-type transistor 320 is at a high level higher than the reference voltage V _REF2 , the comparator 390 outputs a high level to the auxiliary current source 330, and the auxiliary current source 330 stops supplying the auxiliary current. On the other hand, when the gate of the P-type transistor 320 is at the low level equal to or lower than the reference voltage V _REF2 , the comparator 390 outputs the low level to the auxiliary current source 330, and the auxiliary current source 330 supplies the auxiliary current.

In the first modification example, only the N-type transistor 340 is added to the low noise amplifier 301 of the fourth embodiment, and in the second modification example, only the comparator 390 is added. You may add to the low noise amplifier 301 of 4th Embodiment.

As described above, according to the second modification of the fourth embodiment of the present technology, the auxiliary current source 330 supplies the auxiliary current when the gate of the P-type transistor 320 is at the low level. The auxiliary current can be supplied only when the transistor 320 is on. As a result, no auxiliary current is supplied when the P-type transistor 320 is in the OFF state, so that current consumption can be reduced.

The above-described embodiment shows an example for embodying the present technology, and the matters in the embodiment and the invention-specific matters in the claims have a corresponding relationship. Similarly, the invention specific matter in the claims and the matter in the embodiment of the present technology having the same name as this have a corresponding relationship. However, the present technology is not limited to the embodiment, and can be embodied by making various modifications to the embodiment without departing from the gist thereof.

Further, the processing procedure described in the above embodiment may be regarded as a method having a series of these procedures, and a program for causing a computer to execute these series of procedures or a recording medium storing the program. You may catch it. As this recording medium, for example, a CD (Compact Disc), an MD (MiniDisc), a DVD (Digital Versatile Disc), a memory card, a Blu-ray disc (Blu-ray (registered trademark) Disc), or the like can be used.

It should be noted that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

[Correction based on Rule 91 14.03.2016]
In addition, this technique can also take the following structures.
(1) a P-type transistor and an N-type transistor connected in series;
An operational amplifier,
An output terminal of the operational amplifier is connected to one gate of the P-type transistor and the N-type transistor, and one of the inverting input terminal and the non-inverting input terminal of the operational amplifier is both the P-type transistor and the N-type transistor. And a predetermined reference voltage is applied to the other of the inverting input terminal and the non-inverting input terminal.
(2) a bias voltage supply unit that supplies a predetermined bias voltage to one of the gates of the P-type transistor and the N-type transistor;
The amplifier according to (1), further comprising a capacitor inserted between the gate of the P-type transistor and the gate of the N-type transistor.
(3) The amplifier according to (1) or (2), further including a current source connected to the drain.
(4) The amplifier according to (3), further including a cascode transistor element inserted between the drain and the current source.
(5) further comprising a comparator for comparing the potential of the gate with a predetermined potential and supplying the comparison result;
The amplifier according to (3) or (4), wherein the current source supplies the predetermined current based on a comparison result of the comparator.
(6) further comprising a low-pass filter;
The current source comprises a transistor;
The amplifier according to any one of (3) to (5), wherein the low-pass filter supplies a DC bias voltage to a gate terminal of the transistor.
(7) The amplifier according to any one of (1) to (6), further including an impedance matching circuit that matches impedances of circuits at both ends of the transmission line connected to the amplifier.
(8) The amplifier according to any one of (1) to (7), wherein the predetermined reference voltage is a value equal to or higher than a saturation drain voltage of one of the P-type transistor and the N-type transistor.
(9) A P-type transistor and an N-type transistor connected in series, and an operational amplifier, and an output terminal of the operational amplifier is connected to one gate of the P-type transistor and the N-type transistor, One of the inverting input terminal and the non-inverting input terminal of the amplifier is connected to the drains of both the P-type transistor and the N-type transistor, and a predetermined reference voltage is applied to the other of the inverting input terminal and the non-inverting input terminal. An amplifier,
An electronic circuit comprising: a signal processing unit that processes a signal output from the drain.
(10) a bias voltage supply unit that supplies a bias voltage having a value indicated by a control signal to one of the gates of the P-type transistor and the N-type transistor;
The electronic circuit according to (9), further comprising a capacitor inserted between the gate of the P-type transistor and the gate of the N-type transistor.
(11) The electronic circuit according to (10), wherein the signal processing unit processes the signal output from the drain and generates the control signal based on the level of the signal.

DESCRIPTION OF SYMBOLS 100 Antenna 200 Radio | wireless receiver 210 Frequency down converter 220 Low-pass filter 230 AD converter 240,241 Digital signal processing part 300,301 Low noise amplifier 310,340,384,385,386 N-type transistor 320,331 P-type transistor 330 Auxiliary current source 350 In-

phase feedback circuit

351, 362, 389 Resistor 352 Operational amplifier 360 Low-

pass filter

361, 371, 373, 387, 388 Capacitor 372

Impedance matching circuit

380, 381 Bias

voltage supply unit

382, 383 Reference current source 390 Comparator 400 Electron apparatus

Claims

[Correction based on Rule 91 14.03.2016]
A P-type transistor and an N-type transistor connected in series;
An operational amplifier,
An output terminal of the operational amplifier is connected to one gate of the P-type transistor and the N-type transistor, and one of the inverting input terminal and the non-inverting input terminal of the operational amplifier is both the P-type transistor and the N-type transistor. And a predetermined reference voltage is applied to the other of the inverting input terminal and the non-inverting input terminal.
A bias voltage supply unit for supplying a predetermined bias voltage to one of the gates of the P-type transistor and the N-type transistor;
The amplifier according to claim 1, further comprising a capacitor inserted between the gate of the P-type transistor and the gate of the N-type transistor.
The amplifier of claim 1, further comprising a current source connected to the drain.
4. The amplifier according to claim 3, further comprising a cascode transistor element inserted between the drain and the current source.
A comparator that compares the potential of the gate with a predetermined potential and supplies the comparison result;
The amplifier according to claim 3, wherein the current source supplies the predetermined current based on a comparison result of the comparator.
A low-pass filter,
The current source comprises a transistor;
The amplifier according to claim 3, wherein the low-pass filter supplies a DC bias voltage to a gate terminal of the transistor.
The amplifier according to claim 1, further comprising an impedance matching circuit that matches impedances of circuits at both ends of a transmission line connected to the amplifier.
2. The amplifier according to claim 1, wherein the predetermined reference voltage is a value equal to or higher than a saturation drain voltage of one of the P-type transistor and the N-type transistor.
[Correction based on Rule 91 14.03.2016]
A P-type transistor and an N-type transistor connected in series; and an operational amplifier; an output terminal of the operational amplifier is connected to one gate of the P-type transistor and the N-type transistor; An amplifier in which one of an input terminal and a non-inverting input terminal is connected to drains of both the P-type transistor and the N-type transistor, and a predetermined reference voltage is applied to the other of the inverting input terminal and the non-inverting input terminal; ,
An electronic circuit comprising: a signal processing unit that processes a signal output from the drain.
A bias voltage supply unit that supplies a bias voltage having a value indicated by a control signal to one of the gates of the P-type transistor and the N-type transistor;
The electronic circuit according to claim 9, further comprising a capacitor inserted between the gate of the P-type transistor and the gate of the N-type transistor.
The electronic circuit according to claim 10, wherein the signal processing unit processes a signal output from the drain and generates the control signal based on a level of the signal.