WO2013044096A2

WO2013044096A2 - Vertical switching formations for esd protection

Info

Publication number: WO2013044096A2
Application number: PCT/US2012/056663
Authority: WO
Inventors: Robert Fleming; Michael Glickman; Bhret Graydon; Junjun Wu; Daniel Vasquez
Original assignee: Shocking Technologies, Inc.
Priority date: 2011-09-21
Filing date: 2012-09-21
Publication date: 2013-03-28
Also published as: WO2013044096A3; EP2758992A4; JP2020080419A; CN103999217B; EP2758992A2; JP6860718B2; TW201330710A; KR20140110838A; KR101923760B1; TWI473542B; JP2017152711A; JP2014535157A; CN103999217A

Abstract

Embodiments disclosed herein generally relate to structures, methods and devices employing a voltage switchable dielectric material to achieve vertical and/or dual switching protection against ESD and other overvoltage events.

Description

VERTICAL SWITCHING FORMATIONS FOR ESD PROTECTION

TECHNICAL FIELD

[0001] Embodiments disclosed herein generally relate to structures, methods and devices employing a voltage switchable dielectric material to achieve vertical switching protection against ESD and other overvoltage events.

BACKGROUND

[0002] Electronic devices are often fabricated by assembling and connecting various components (e.g., integrated circuits, passive components, chips, and the like, hereinafter "chips"). Many

components, particularly semiconductors, are sensitive to spurious electrical events that apply excessive voltage to the devices in what is termed an overvoltage condition. Examples of sources of overvoltage conditions include electrostatic discharge (ESD), back electromotive force (EMF), lightning, solar wind, switched electromagnetic induction loads such as electric motors and electromagnets, switched heavy resistive loads, large current changes, electromagnetic pulses, and the like. Overvoltage conditions may result in a high voltage at a device containing active and/or passive electronic components or circuit elements, such as a semiconductor IC chip, which may cause large current flow through or within the components. The large current flow may effectively destroy or otherwise negatively impact the functionality of such active or passive components or circuit elements.

[0003] Some chips include "on-chip" protection against some overvoltage events (e.g., a mild ESD event) that may be expected during packaging of the chip or operation of the respective electronic device (e.g., protection against Human Body Model events).

[0004] A chip may be packaged (e.g., attached to a substrate). A packaged chip may be connected to

additional (e.g., ex-chip) overvoltage protection devices, that protect the packaged chip against more severe (e.g., higher voltage) overvoltage events. Inasmuch as the on-chip and off-chip overvoltage protection devices are in electrical communication, the off-chip overvoltage protection device may be required to "protect" the on-chip overvoltage protection device. Off-chip overvoltage protection devices using discrete components are difficult to add during manufacture of the substrate. Moreover, on-chip protection is difficult to optimize across a complete system or subsystem. Examples of specifications for ESD testing include IEC 61000-4-2 and JESD22- A1 14E. [0005] A printed circuit board, printed wiring board, or similar substrate (hereinafter also referred to as PCB) may be used to assemble, support, and connect electronic components. A PCB typically includes a substrate of dielectric material and one or more conductive leads to provide electrical conductivity among various attached components, chips, and the like. Typically, a pattern of metallic leads is plated (e.g., using printing technology such as silk-screening) onto the dielectric substrate to provide electrical connectivity. Alternatively a metallic layer (e.g., a layer of Cu, Ag, Au) is applied to the substrate and subsequently portions of the metallic layer are removed (e.g., etched) resulting in the desired pattern. Multiple layers of conductive patterns and/or dielectric materials may be disposed on a PCB. The layers may be connected using vias. Printed circuit boards including 14 or more layers are not uncommon.

[0006] A PCB is typically used for supporting and connecting various integrated electronic components, such as chips, packages, and other integrated devices. The PCB may also support and connect discrete components, such as resistors, capacitors, inductors, and the like, and provide connections between integrated and discrete components. The conductive patterns and/or layers in the PCB and other components or areas within electronic devices sometimes provide paths for conducting overvoltage events that could damage or otherwise negatively impact components.

[0007] Various structures, methods and devices exist in the prior art for providing overvoltage protection to electronic devices (e.g., discrete surge suppression components surface mounted to PCBs), but they generally exhibit a variety of limitations in manufacturability, performance, operational characteristics and cost. There is a need for improved overvoltage protection structures, methods and devices.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying figures, which together with the detailed description below are incorporated in and form part of the specification, serve to further illustrate various embodiments and to explain various principles and advantages all in accordance with example embodiments disclosed herein.

[0009] FIG. 1 shows a horizontal switching VSDM formation comprising VSD material that may be used for ESD protection of electronic components.

[0010] FIG. 2 shows a horizontal switching cylindrical formation comprising VSD material that may be used for ESD protection of electronic components.

[0011] FIG. 3 illustrates a PCB and associated directional references used in connection with various

embodiments.

[0012] FIG. 4A shows a VSDM formation that is adapted to achieve vertical switching using VSD material and that may be integrated in a substrate device, in accordance with an embodiment. [0013] FIG. 4B shows a VSDM formation comprising a VSD material layer that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.

[0014] FIG. 5 shows a VSDM formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0015] FIG. 6 shows a VSDM formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0016] FIG. 7 shows a method for producing one or more conductive structures, such as a layered

interconnect, within a vertical switching VSDM formation, in accordance with an embodiment.

[0017] FIG. 8 shows a graph with sample response voltage envelopes for a vertical switching VSDM

formation, in accordance with an embodiment.

[0018] FIG. 9 shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0019] FIG. 10 shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0020] FIG. 1 1 shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0021] FIG. 12A shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0022] FIG. 12B shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0023] FIG. 13 shows a VSDM formation comprising a VSD material layer that may be integrated in a

PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.

[0024] FIG. 14 shows a VSDM formation comprising a VSD material formation that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.

[0025] FIG. 15A shows a VSD material formation that is adapted to achieve vertical switching using VSD material in connection with one or more circuit elements, in accordance with an embodiment.

[0026] FIG. 15B shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.

[0027] FIG. 16 shows a VSD material formation that is adapted to achieve vertical switching using

multiple VSD material structures, in accordance with an embodiment.

[0028] FIG. 17 shows a bidirectional switching VSD material formation that is adapted to achieve both vertical and horizontal switching using VSD material, in accordance with an embodiment. DETAILED DESCRIPTION

[0029] While the specification concludes with claims defining the features of various embodiments, the invention will be better understood from a consideration of the following description in conjunction with the drawing figures, in which like reference numerals are carried forward.

[0030] Protection against ESD and other overvoltage events of a substrate device, electronic component and/or electronic device in accordance with various embodiments disclosed herein may include incorporating a voltage switchable dielectric material ("VSD material" or "VSDM") in the respective substrate and/or device. While those skilled in the art will recognize that overvoltage events encompass multiple events, ESD (electrostatic discharge) may be used herein to generally describe an overvoltage event.

[0031] In one embodiment, the VSD material is embedded in the device as a layer or other structure that is adapted to conduct at least a portion of an ESD signal through the device to a ground or to another predefined point.

[0032] In one embodiment, a circuit element such as a filter is disposed between a vertical switching

VSDM formation and an electronic component to reduce or prevent high frequency voltage components generated by an ESD event from reaching the electronic component. The circuit element may be embedded in a substrate device as a layer, a structure, or a via, or may be attached to a substrate as a surface mounted component.

[0033] A VSD material in accordance with various embodiments disclosed herein is a material that exhibits nonlinear resistance as a function of voltage. While a VSD material exhibits nonlinear resistance, not all materials that exhibit nonlinear resistance are VSD materials. For example, a material for which resistance changes as a function of temperature but does not substantially change as a function of voltage would not be construed as a VSD material for purposes of embodiments disclosed herein. In various embodiments, VSD materials exhibit nonlinear resistance variation as a function of voltage and additional operating parameters such as current, energy field density, light or other electromagnetic radiation input, and/or other similar parameters.

[0034] The variation of the resistance as a function of voltage exhibited by a VSD material includes a transition from a state of high resistance to a state of low resistance. This transition occurs at about a specific voltage value, which may be variously referred to as a "characteristic voltage,"

"characteristic voltage level," "switching voltage," or "switching voltage level." The characteristic voltage may differ for various formulations of VSD material, but is relatively stable for a given formulation. The characteristic voltage for a particular formulation may be a function of voltage coupled with additional parameters such as temperature and/or incident electromagnetic energy at various wavelengths including optical, infrared, UV, or microwave. [0035] For a given VSD material composition, the characteristic voltage may be defined in terms of a corresponding "characteristic electric field" or "characteristic field" expressed in terms of voltage per unit of length (e.g., Volts per mil (V/mil), Volts per micrometer (V/um), etc.).

[0036] Unless otherwise expressly indicated, the term "structure of VSD material," "VSD material

structure" or "VSDM structure" is intended to refer to any volume of VSD material with specific physical dimensions that can perform an electrical switching function. Examples of a structure of VSD material include a layer of VSD material (whether disposed on a substrate or cured as a standalone layer), a volume of VSD material bounded between two or more electrodes, a volume of VSD material bounded by two or more insulative or semiconductor structures, or any other element or configuration of VSD material that can switch between substantially nonconductive and substantially conductive states in response to a sufficiently large voltage variation.

[0037] In one implementation, a VSD material structure may be produced by bounding a volume of a first VSD material with a first characteristic voltage between two other volumes of VSD materials with characteristic voltages that differ from the first characteristic voltages (the characteristic voltages of the two other volumes of VSD material may or may not be equal to each other).

[0038] In one implementation, a VSD material structure may be produced by bounding a volume of a VSD material with a first characteristic voltage between (a) a volume of VSD material with a different characteristic voltage, and (b) one or more electrodes, insulative structures, and/or semiconductor structures.

[0039] An example of a VSD material structure is a layer of VSD material disposed on a copper foil (but excluding the copper foil). A compound formation that comprises both the layer of VSD material and the copper foil may be denoted a "formation of VSDM." More complex formations of VSDM are discussed below.

[0040] Another example of a VSD material structure is a coating, sheet or other layout of VSD material disposed as a horizontal layer in a PCB and bounded between two adjacent horizontal layers of the PCB (i.e., a horizontal layer above the VSD material structure, and a horizontal layer below the VSD material structure). A compound formation that comprises both this VSD material structure and the bounding two adjacent horizontal layers would be an example of a formation of VSDM.

[0041] Another example of a VSD material structure is a volume of VSD material disposed in a horizontal layer within a PCB and bounded between four structures disposed within the same horizontal layer of the PCB (e.g., four etched channels that delineate a rectangular VSD material structure) and between two electrodes disposed in the two adjacent horizontal layers (e.g., a conductive layer above and an insulative layer below). A compound formation that comprises both this VSD material structure and the bounding four structures and two electrodes would be an example of a formation of VSDM.

[0042] For a structure of VSD material with a known distance between two points where a voltage is applied (e.g., when a voltage is applied across the thickness of a layer of VSD material or across another gap of a VSD material structure), the characteristic voltage may be defined as specific voltage value (e.g., the characteristic voltage for this VSD material structure may be specified as a particular value in Volts).

[0043] Consequently, the characteristic voltage of a VSD material structure may be defined in terms of a characteristic electric field expressed as a voltage value per unit length, or as a characteristic voltage expressed as a specific voltage value when the VSD material is considered as a specific volume with certain known dimensional characteristics (e.g., a VSD material structure with a specific thickness across which voltage switching may occur). In various contexts, the descriptions in this patent may refer to characteristic fields or characteristic voltages of VSD materials in connection with various embodiments, and in each case the corresponding characteristic fields (in terms of Volts per unit length) or characteristic voltages (in terms of Volts) may be obtained through an appropriate conversion by taking into account the dimensional characteristics of the respective structures of VSD material. For example, for a uniform characteristic electric field produced within a VSD material structure, the characteristic voltage of that VSD material structure may be obtained by multiplying the characteristic field of that VSD material (in V/mil) by the corresponding gap across which switching will take place (in mils)). In a more general sense, for a non-uniform characteristic electric field produced within a VSD material structure, the characteristic voltage of that VSD material structure may be obtained by integrating the characteristic field of that VSD material throughout the gap across which switching will take place. In some embodiments, for some formulations of VSD materials and physical characteristics of the gaps across which switching may take place, the characteristic voltage of the VSD material across such gaps may not be directly or linearly correlated with the size of the respective gaps (e.g., in such embodiments, the respective characteristic voltages may be evaluated through direct measurements or through more complex simulations or approximations).

[0044] In general, the characteristic voltage of a VSD material structure may be a function of the amount, cross-sectional area, volume, depth, thickness, width and/or length of the VSD material structure that is disposed between the two points where the voltage is applied, and possibly also a function of the relative shape, geometry, density variation, and other analogous variables relating to the VSD material structure.

[0045] A VSD material is substantially non-conductive (i.e., substantially insulative) at voltages below the respective characteristic voltage level, in which case it behaves substantially as an insulator or dielectric. This state may be referred to as a substantially nonconductive or insulative state.

Voltages below the characteristic voltage level of a VSD material may be referred to as low voltages (at least relative to voltages above the characteristic voltage level). In such operating regimes below the characteristic voltage level, a VSD material provided in one or more

embodiments may also be construed as having attributes of a semiconductor, similar to

semiconductor materials that are suitable to serve as substrates in semiconductor manufacturing processes. A VSD material in accordance with various embodiments may behave substantially as an insulator for both positive and negative voltages when the magnitude of the voltage is below the characteristic voltage level.

[0046] At voltages higher than its characteristic voltage level, a VSD material in accordance with various embodiments disclosed herein behaves substantially as a conductor by having substantially no electric resistance, or relatively low resistance. This may be referred to as a substantially conductive state. Voltage above the characteristic voltage level may be referred to as high voltage. The VSD material is conductive or substantially conductive for both positive and negative voltages when the magnitude of the voltage is above the characteristic voltage level. The characteristic voltage may be either positive or negative, depending on the polarity of the voltage being applied. When a VSD material becomes substantially conductive in response to a voltage that exceeds its characteristic voltage, the VSD material could be said to "switch on." When a VSD material becomes substantially non-conductive after removing a voltage that exceeds its characteristic voltage, the VSD material could be said to "switch off." When a VSD material switches on or off, the VSD material could be simply said to "switch."

[0047] In an ideal model, the operation of a VSD material provided in various embodiments disclosed herein is approximated as having infinite resistance at voltages below the characteristic voltage, and zero resistance at voltages above the characteristic voltage. In normal operating conditions, however, such VSD materials typically have high, but finite resistance at voltages below the characteristic voltage, and low, but nonzero resistance at voltages above the characteristic voltage. As an example, for a particular VSD material, the ratio of the resistance at low voltage to the resistance at high voltage may be expected to approach a large value (e.g., in the range of 10³, 10⁶, 10⁹, 10¹², or higher). In an ideal model, this ratio may be approximated as infinite, or otherwise very high.

[0048] The VSD material provided in various embodiments disclosed herein exhibits high repeatability

(i.e., reversibility) in its operation in both the low voltage regimes and the high voltage regimes. In some embodiments, the VSD material behaves substantially as an insulator or dielectric (i.e., is substantially nonconductive and exhibits a very high or substantially infinite electric resistance) at voltages below the characteristic voltage level. The VSD material then switches to become substantially conductive when operated at voltages above the characteristic voltage level, then becomes again substantially an insulator or dielectric at voltages below the characteristic voltage. The VSD material can continue to alternate between these two operational states an indefinite number of times if the input voltage levels transition between voltages below the characteristic voltage and above the characteristic voltage. While transitioning between these two operational states, a VSD material may experience a certain level of hysteresis, which may alter to a certain extent the characteristic voltage level, the switching response time, or other operational characteristics of the VSD material. [0049] The transition between the first (lower) voltage regime when the VSD material is substantially insulative and the second (higher) voltage regime when the VSD material is substantially conductive in accordance with embodiments disclosed herein is substantially predictable and is expected to be generally confined to a limited envelope of signal amplitudes and a limited range of switching times. In an ideal model, the time that it takes a VSD material to transition from a state of substantial insulation to a state of substantial conductance in response to an input step function signal that rises above the characteristic voltage may be approximated as zero. That is, the transition may be approximated as substantially instantaneous. Similarly, in an ideal model, the time that it takes a VSD material to transition from a state of substantial conductance to a state of substantial non-conductance in response to an input step function signal that drops below the characteristic voltage may be approximated as zero. This reverse transition may also be

approximated to be substantially instantaneous. Under normal operating conditions, however, both of these transition times for VSD materials are non-zero. In general, such transition times are small, and are preferably as small as possible (e.g., in the range of about 10^~6 seconds, 10^~9 seconds, 10^~12 seconds, or smaller). Further details of the formulations and characteristics of VSD materials are disclosed in U.S. patent number 7,872,251, issued on January 18, 2011 to Kosowsky, et al, and titled "Formulations for Voltage Switchable Dielectric Material Having a Stepped Voltage

Response and Methods for Making the Same," which is hereby incorporated by reference in its entirety.

[0050] When in a substantially conductive state, a VSD material in accordance with various embodiments may direct an electrical signal to ground or to another predetermined point within the respective circuit, substrate or electronic device to protect an electronic component. In various embodiments, the predetermined point is a ground, virtual ground, shield, safety ground, and the like. Examples of electronic components that may be operated with and/or protected by VSD materials in accordance with various embodiments disclosed herein include (a) circuit element, circuit structure, surface mounted electric component (e.g., resistors, capacitors, inductors), PCB or other circuit board, electronic device, electronic subsystem, electronic system, (b) any other electric, magnetic, microelectromechanical structure (MEMS) or similar element, structure, component, system and/or device, (c) any other unit that processes or transmits data and operates using electric signals or may be damaged by electric signals, and (d) any combination of the foregoing identified in (a), (b) and/or (c) above.

[0051] In general, a VSD material may have a limited ability to conduct current or otherwise operate in the presence of high signal voltages, current intensities, and energy or power levels before being damaged, possibly irreversibly damaged. Additionally, a VSD material may also be damaged if an electric signal that is normally within operating specifications persists for too long (e.g., the VSD material may heat up while conducting such signals and eventually break down). For example, a VSD material may be able to function normally when exposed to an input signal with a voltage level of 10 KV that lasts less than 100 nanoseconds, but may be damaged if that signal continues to be applied for more than a few milliseconds. The ability of a VSD material to tolerate high levels of voltage, current, power or energy before becoming damaged may depend on various factors, such as the particular composition of the VSD material, the specific characteristics of a corresponding VSD material structure (e.g., a VSD material structure with larger physical dimensions may be able to conduct higher current densities), the corresponding circuit architecture, the presence of other ESD protective components, and the characteristics of the device in which the VSD material is incorporated.

[0052] VSD materials in accordance with various embodiments are polymer composites, and may include particulate materials such as metals, semiconductors, ceramics, and the like. Examples of various compositions of VSD materials that may be used in accordance with various embodiments are described in, for example, US Patent Application Numberl2/953,309 filed on November 23, 2010 and titled "Formulations for Voltage Switchable Dielectric Materials Having a Stepped Voltage Response and Methods for Making the Same," , US Patent Application Number 12/832,040 filed on July 7, 2010 and titled "Light-Emitting Diode Device For Voltage Switchable Dielectric Material Having High Aspect Ratio Particles," and US Patent Application Number 12/717, 102 filed on March 3, 2010 and titled "Voltage Switchable Dielectric Material Having High Aspect Ratio Particles," and United States Patent 7,981,325 issued on July 19,201 1 and titled "Electronic Device For Voltage Switchable Dielectric Material Having High Aspect Ratio Particles."

[0053] VSD materials in accordance with various embodiments may include a matrix material and one or more types of organic and/or inorganic particles dispersed within the matrix material.

[0054] Examples of matrix materials incorporated in VSD materials in accordance with various

embodiments may include organic polymers, such as silicone polymer, phenolic resin, epoxy (e.g., EPON Resin 828, a difunctional bisphenol A/epichlorohydrin derived liquid epoxy resin), polyurethane, poly(meth) acrylate, polyamide, polyester, polycarbonate, polyacrylamides, polyimide, polyethylene, polypropylene, polyphenylene oxide, polysulphone, ceramer (a solgel/polymer composite), and polyphenylene sulfone. Other examples of such matrix materials include inorganic polymers, such as siloxane, and polyphosphazines.

[0055] Examples of particles incorporated in VSD materials in accordance with various embodiments may include conductive and/or semiconductive materials, including copper, aluminum, nickel, silver, gold, titanium, stainless steel, chrome, other metal alloys, T, Si, NiO, SiC, ZnO, BN, C (including in the form of diamond, nanotubes, and/or fullerenes), ZnS, Bi203, Fe203, Ce02, Ti02, A1N, and compounds of indium diselenide. In some embodiments, Ti02 can be undoped or doped, for example with W03, where doping may include a surface coating. Such particles may have a shape ranging from spherical to highly elongated, including high aspect ratio particles, including carbon nanotubes (single walled and/or multi-walled), fullerenes, metal nanorods, or metal nanowires. Examples of materials that form nanorods and/or nano wires include boron nitride, antimony tin oxide, titanium dioxide, silver, copper, tin, and gold.

[0056] The aspect ratio of some particles incorporated in VSD materials in accordance with various

embodiments may have aspect ratios in excess of 3 : 1, 10: 1, 100: 1, and 1000: 1. Materials with higher aspect ratios are sometimes called "High Aspect Ratio" particles or "HAR" particles.

Carbon nanotubes are examples of super HAR particles, with aspect ratios of an order of 1000: 1 and more. Materials with lesser aspect ratios that may be incorporated in VSD materials in various embodiments include carbon black (L/D of any order of 10: 1) particles, and carbon fiber (L/D of an order of 100: 1) particles.

[0057] The particles incorporated in VSD materials in accordance with various embodiments may have various sizes, including some nanoscale particles characterized by a smallest dimension equal to 500 nm or smaller, or even smaller (e.g., particles for which a smallest dimension is less than 100 nm or 50 nm).

[0058] The particles incorporated in VSD materials in accordance with various embodiments may include an organic material. Incorporating organic materials within a VSD material may provide to the VSD material improved coefficients of thermal expansion and thermal conductivity, better dielectric constant, enhanced fracture toughness, better compression strength, and improved ability to adhere to metals. Examples of organic semiconductors that may be incorporated in VSD materials in various embodiments include forms of carbon such as electrically semiconducting carbon nanotubes and fullerenes (e.g., C60 and C70). Fullerenes and nanotubes can be modified, in some

embodiments, to be functionalized to include a covalently bonded chemical group or moiety. Other examples of organic semiconductors that may be incorporated in VSD materials in various embodiments include poly-3-hexylthiophene, polythiophene, polyacteylene, poly (3, 4- ethylenedioxythiophene), poly (styrenesulfonate), pentacene, (8-hydroxyquinolinolato) aluminum (III), and ,N'-di-[(naphthalenyl)-N,N'diphenyl]-l, 1 '-biphenyl-4,4'-diamine [NPD]. Additionally, organic semiconductors can be derived from the monomers, oligomers, and polymers of thiophene, analine, phenylene, vinylene, fluorene, naphthalene, pyrrole, acetylene, carbazole, pyrrolidone, cyano materials, anthracene, pentacene, rubrene, perylene, and oxadizole. Some of these organic materials may be photo-active organic materials, such as polythiophene.

[0059] In reference to distribution of particles within a VSD material polymeric composition, distributing particles "substantially uniformly" means that on the average the respective particles are distributed uniformly and/or randomly within the material, but it is certainly possible that in limited subportions of the polymeric composition nonuniform and/or non-random agglomerations of such particles may occur. Indeed, even after extensive mixing, there will normally be a nonzero statistical probability with which such agglomerations of particles may occur within limited volumes within the VSD material, and this could happen though all phases of the VSD material, including when the VSD material is in a liquid or semi-liquid form before application to a substrate, after it is disposed on a substrate (for example through coating), and/or after it is cured (whether on a substrate or otherwise). Overall, however, when considering the whole quantity of VSD material (or a sufficiently large subportion of such VSD material) the respective particles may be deemed to be distributed uniformly and/or randomly within the mixture, and in modeling the behavior of the respective VSD material, the particles may be modeled as being distributed uniformly and/or randomly.

[0060] In various embodiments, the characteristic voltage of a VSD material structure disposed between two electrodes contacting the VSD material decreases as the distance between the electrodes decreases. The distance between the electrodes across which the VSD material may switch between substantially conductive and substantially nonconductive states in response to voltage variations that are sufficiently large could be denoted a "thickness," "effective thickness," "gap," "switching gap," or "effective gap." The effective gap for a VSD material structure could be considered to be horizontal if the two electrodes are disposed in a substantially horizontal plane, or could be considered to be vertical if the two electrodes are disposed in different vertical planes and/or if the voltage switching takes place predominantly in a vertical direction.

[0061] FIG. 1 shows a horizontal switching structure 100 comprising VSD material that may be used for

ESD protection of electronic components. In the embodiment of FIG. 1, electrodes 120 and 122 are in electrical contact with vias 130 and respectively 132.

[0062] In general, the term "electrode" may be or may include any conductive structure. Examples of such electrodes or conductive structures include a pad, lead, trace, via (e.g., a through hole, a blind via, or a buried via), wire, conductive film, signal layer, conductive layer, conductive PCB layer (e.g., a conductive pre-preg or filler layer), or any other connector that is designed to be conductive and to provide electrical interconnection functionality in any substrate (e.g., such substrates could include any PCB or semiconductor packaging).

[0063] In various implementations, one or both electrodes 120 and 122 may be omitted as long as an

electrical connection can be established to via 130 and/or via 132. Electrode 120 and/or 122 may be manufactured out of copper or any other suitable conductive material. Electrode 120 and/or 122 may be manufactured through deposition, screen printing, adhesion, or any other bonding approach, whether mechanical, chemical, or otherwise.

[0064] In various embodiments, the electrodes 120 and 122 may be covered by an encapsulating material or formation, such as an insulating layer. In FIG. 2, the electrodes 120 and 122 are illustrated as being embedded in an insulating layer 170.

[0065] Via 130 and 132 are conductive structures that may penetrate fully or partially, or may completely cross the layer of VSD material 140. Via 130 and/or 132 could be a through hole, a blind via, a buried via, a trace, or any other conductive structure that is designed to be conductive and facilitate signal propagation in an electronic device. Via 130 and/or 132 may be manufactured out of copper or any other suitable conductive material. Via 130 and/or 132 may be manufactured through deposition, screen printing, adhesion, or any other bonding approach, whether mechanical, chemical or otherwise. Via 130 and/or 132 may be solid (e.g., a solid metallic structure), hollow (e.g., a conductive cylindrical formation), or may be hollow and partially or fully filled with a suitable conductive material (e.g., a hollow conductive cylindrical formation that is filled partially with a conductive material).

[0066] In one embodiment, instead of being strictly conductive, via 130 and/or 132 are filled partially or completely with VSD material. In such an embodiment, via 130 and/or via 132 may serve as either a vertical or a horizontal switching formation, in the sense that the respective via would normally act as a substantially insulative structure, but may become substantially conductive in response to a voltage that exceeds the characteristic voltage of the respective VSD material. In such an embodiment, the switching could take place either vertically along the respective via, or horizontally across the respective via.

[0067] In the embodiment of FIG. 1, the layer of VSD material 140 is disposed on a substrate 160. The substrate 160 may be a conductive substrate (e.g., a layer, sheet or foil of copper or other conductive material), or an insulative substrate (e.g., a PCB pre-preg layer). In one embodiment, the substrate 160 may be a substrate with variable conductivity, such as a layer of VSD material.

[0068] In the embodiment of FIG. 1, a voltage source may be connected so that it produces a voltage

differential between electrodes 120 and 122. The voltage source 110 is shown in FIG. 1 as a standalone voltage source, which could also be a current source, or any other source of electrical energy. Such an arrangement may be encountered in a testing setup, or in a specific architectural layout where the VSD material is intended to be activated intentionally by increasing the voltage generated by the voltage source 1 10. The voltage source 1 10 is illustrated in FIG. 1 as connected to via 130, which is in electrical contact with electrode 120, and a ground is illustrated as connected to via 132, which is in electrical contact with electrode 122. In various alternative applications and

embodiments, the voltage source 110 may be applied to via 132 and the ground may be applied to via 130.

[0069] In a more general sense, however, the voltage that is applied between the electrodes 120 and 122 may be any voltage signal or other electrical signal, including a voltage that is generated by an ESD event, as illustrated by the ESD pulse 1 12 shown in the embodiment of FIG. 1. In normal operating circumstances that are usually experienced by end user devices, such as mobile phones, the ESD pulse 112 may be expected to have a high voltage magnitude (e.g., in excess of a few hundred Volts, and possibly a few thousand Volts) and a short time duration (e.g., anywhere between nanoseconds and microseconds). Despite the short time duration, the electrical current generated by the ESD pulse 1 12 may be expected to reach large amplitudes, possibly in excess of 10 Amperes. If the structure of the embodiment of FIG. 1 is used for ESD protection, either electrode 120 or electrode 122 may be connected directly or indirectly to a ground plane (or another predetermined point within the circuit or device being protected), and if the ESD pulse 1 12 reaches the other electrode, the ESD pulse 112 may be guided to ground or to that predetermined point through the electrode connected to the ground or predetermined point.

[0070] If the voltage applied by the voltage source 1 10 (or alternatively by the ESD pulse 1 12) does not exceed the characteristic voltage of the VSD material 140, the VSD material 140 remains substantially nonconductive, and no significant current is conducted between the electrodes 120 and 122 through the VSD material 140 (except, possibly, for a certain amount of leakage current, which the VSD material 140 is normally designed to minimize so as not to impact the performance of the electronic device in which the structure of 100 may be deployed).

[0071] To graphically illustrate that the voltage source 110 and the ESD pulse 112 may be present in the alternative and are used for purposes of general description, the connecting lines between each of them and the electrodes 120 and 122 are shown with a dashed line. In general, any voltage source, ESD signal, or other electrical source, overvoltage signal, or voltage potential may be applied between the two electrodes 120 and 122. Either of the two electrodes may also be connected to ground, or to a point with another reference voltage level. The polarity of the voltage source 110 may be in either direction between the electrodes 120 and 122. Analogously,

[0072] If the voltage applied by the voltage source 1 10 (or alternatively by the ESD pulse 112) exceeds the characteristic voltage of the VSD material 140, the VSD material 140 switches and becomes substantially conductive, and a significant amount of current is conducted between the electrodes 120 and 122 through the VSD material 140.

[0073] In the embodiment of FIG. 1, the VSD material 140 can be said to switch in a "horizontal" direction or "lateral" direction. This horizontal or lateral direction is defined relative to the substrate 160, because the flow of electric current through the VSD material 140 takes place between via 130 and via 132, predominantly in a direction substantially parallel with the main plane of the substrate 160. In one embodiment, the substrate 160 is a layer in a PCB, in which case horizontal switching means that the flow of electric current through the VSD material 140 takes place predominantly in a direction substantially parallel with the main surface of the PCB to which most of the components and electrical elements are mounted (or surfaces, in the case of a PCB for which components are attached on both sides).

[0074] In various embodiments, the VSD material 140 is designed to accommodate flow of electrical current in both directions between the electrodes 120 and 122, depending on the polarity of the voltage applied between the electrodes 120 and 122. In the embodiment of FIG. 1, the horizontal switching direction of the VSD material 140 is indicated by arrows 142. Because the substrate 160 (e.g., a PCB or a PCB core) is actually a three dimensional structure, with a larger 2D plane (i.e., the plane defined by the surface or surfaces of a PCB to which components are attached) and a smaller height dimension, the horizontal flow of current between electrodes 120 and 122 could be taking place in any direction that is substantially parallel with the larger 2D plane. Alternatively stated, while the embodiment of FIG. 1 appears to indicate that horizontal switching implies a left-to-right or right-to-left flow of current, in reality, considering the 3D dimensions of an actual substrate, such as a device packaging or PCB, the flow of current could take place in any direction that is substantially parallel with a 2D plane formed by the main surfaces of the substrate 160.

[0075] With reference to the embodiment of FIG. 3, horizontal switching means that current would flow in any direction that is substantially parallel with the X-Y plane shown in FIG. 3. Realizing that flow of current through a medium generally involves a 3D flow of charges, horizontal switching does not imply that all charges must flow only in a strict horizontal and planar direction. Instead, references to horizontal switching or to switching that occurs in a horizontal direction imply that the movement of charges is predominantly taking place along a plane that is substantially parallel with the main 2D plane of the substrate, but it is certainly possible and expected that at least a portion of the current flow would exhibit a certain amount of vertical movement. The vertical movement of charges may be easier to detect if a simulation or analysis were performed at a micro-level.

Nevertheless, in general, horizontal switching means that at least two conductive structures, such as vias 130 and 132, are disposed in a substantially vertical dimension relative to the substrate, and that current flow occurs between the two vias predominantly in a direction substantially parallel with the main 2D plane of the substrate.

[0076] In the embodiment of FIG. 1, the distance between electrodes 120 and 122 defines a gap of VSD material 140. This gap is denoted as gap 150 in FIG. 1. In general, the horizontal gap for a horizontal switching VSDM formation is determined by the shortest electrical path across a structure of VSD material, and in FIG. 1, this shortest electrical path is determined by the edges of the electrodes 120 and 122 at the interface with the VSD material 140. If in an embodiment the electrodes 120 and 122 do not extend towards each other such the gap 150 shown in FIG. 1 is smaller than the distance between the vias 130 and 132, the VSD material 140 could instead switch in the horizontal gap between the vias 130 and 132.

[0077] In one embodiment, the characteristic field of VSD material 140 is defined in Volts/mil. In that embodiment, by defining a specific gap size for gap 150, the characteristic voltage for the structure of VSD material 140 disposed between via 130 and via 132 can then be determined in actual Volts.

[0078] In one embodiment, the structure shown in the embodiment of FIG. 1 includes a rectangular

structure (e.g., the layer of VSD material 140 may be built as a rectangular structure). In one embodiment, the structure shown in the embodiment of FIG. 1 includes a curved structure (e.g., the layer of VSD material 140 may be built as a substantially cylindrical formation).

[0079] FIG. 2 shows a horizontal switching cylindrical structure 200 comprising VSD material 240

disposed between two conductive planes (e.g., copper planes), denoted conductive plane 230 and conductive plane 232, which may be used for ESD protection of electronic components. The structure 200 is generally equivalent with a structure from the embodiment of FIG. 1 , but illustrates how various aspects show in FIG. 1 could be implemented in a curved architecture. The conductive plane 230 and conductive plane 232 are substantially concentric conductive structures separated by a volume of VSD material, in accordance with one embodiment. For simplicity, the substrate and electrodes are not shown in the embodiment of FIG. 2.

[0080] In one embodiment, the structure 200 shown in FIG. 2 represents a cross sectional view of a

structure implemented in a PCB. With reference to the embodiment of FIG. 3, the annulus shown in FIG. 2 between the conductive planes 230 and 232 would be disposed substantially parallel with the X-Y plane shown in FIG. 3. In a 3D perspective, the conductive planes 230 and 232 extend in a vertical direction, which for a PCB would be substantially parallel with the Z-axis shown in the embodiment of FIG. 3.

[0081] In the embodiment of FIG 2, a voltage source 210 or an ESD signal 212 could produce a voltage between the conductive planes 230 and 232. If this voltage exceeds the characteristic voltage of the VSD material 240, the VSD material would switch on, and the VSD material would change from being substantially nonconductive to becoming substantially conductive. In that case, significant current would flow between the conductive planes 230 and 232. For a concentric structure as shown in FIG. 2, the current flow would take place predominantly in a radial direction illustrated by the lines 242. With reference to the embodiment of FIG. 3, horizontal switching for the structure shown in FIG. 2 means that current would flow between the conductive planes 230 and 232 predominantly along a plane that is substantially parallel with the X-Y plane shown in FIG. 3. Again, as discussed in connection with the embodiment of FIG. 1, horizontal switching does not mean that current would be strictly limited to flows along planes substantially parallel with the main 2D dimension of a substrate. Instead, it is expected that given the 3D aspects of the vias, VSD material structures, and micro-level effects, a certain amount of current flow would occur in a vertical dimension. Nevertheless, horizontal switching means that current flow would indeed take place predominantly in a direction parallel with the main 2D plane of a substrate, such that useful electrical functionality may be achieved using current flowing in a horizontal direction through the VSD material 240.

[0082] In one embodiment, the characteristic field of VSD material 240 is defined in Volts/mil. In that embodiment, by defining a specific gap size for gap 250, the characteristic voltage for the structure of VSD material 240 disposed between conductive planes 230 and 232 can then be determined in actual Volts. The curved architecture of the structure 200 from the embodiment of FIG. 2 is more complex than the rectangular architecture of the structure 100 from the embodiment of FIG. 1, and consequently, to determine the actual characteristic voltage in Volts is more difficult for the structure 200. Nevertheless, in one embodiment, the characteristic voltage of the VSD material 240 is correlated with the size of the gap 250, and can be determined with a degree of certainty as a value in Volts.

[0083] FIG. 3 illustrates a PCB and associated directional references used in connection with various

embodiments. The PCB 300 shown in FIG. 3 has a main horizontal plane defined by the X and Y axes, and a vertical dimension defined by the Z-axis. This reference coordinate system is defined independently of the actual orientation of the PCB in the physical space, such that rotation of the PCB in space does not change the horizontal plane and vertical dimension conventions defined here. This reference system may be discussed in more detail in this patent with respect to a PCB, such as the PCB 300 shown in FIG. 3, but applies analogously to any other substrate.

[0084] In general, a "substrate device" that may be protected by a VSDM formation against ESD or other overvoltage events, or into which a VSDM formation may be incorporated, means any PCB, any single layer or set of multiple layers of a PCB, the package of a semiconductor device, an LED substrate, an integrated circuit (IC) substrate, an interposer or any other platform that connects two or more electronic components, devices or substrates (where such connection may be vertical and/or horizontal), any other stacked packaging format (e.g., an interposer, a wafer-level package, a package-in-package, a system-in-package, or any other stacked combination of at least two packages or substrates), or any other substrate to which a VSD material formation can be attached or within which a VSD material formation may be incorporated. For simplicity, a substrate device may sometimes be denoted a "substrate."

[0085] Using this reference coordinate system, the horizontal switching direction defined by the lines 142 in the embodiment FIG. 2 and by the lines 242 in the embodiment of FIG. 3 would be

preponderantly along a plane that is substantially parallel with the main 2D plane of the PCB 300, which is defined by the X-Y plane shown in FIG. 3.

[0086] FIG. 4A shows a VSDM formation 400 that is adapted to achieve vertical switching using VSD material and that may be integrated in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip, in accordance with an embodiment. A VSDM formation comprising multiple layers, of which at least one layer is a layer of VSD material, may sometimes be referred to as a VSDM formation, or simply a VSDM formation. The formation 400 may be a cross sectional view showing various layers within a PCB, of a semiconductor package, or of another substrate device. In general, a VSDM formation adapted to achieve vertical switching may also be referred to as a "vertical switching VSDM formation."

[0087] Certain vertical switching VSDM formations were disclosed in United States patent application

12/417,589, filed on April 2, 2009 by Shocking Technologies, Inc., which is incorporated herein in its entirety by reference.

[0088] The formation 400 shown in FIG. 4A comprises two substrate layers 460 and 462, which are

insulating layers incorporated in the PCB, a layer of VSD material 440, a conductive structure 430, and a conductive layer 432.

[0089] The conductive structure 430 may be a via (e.g., a laser drilled via), a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals.

[0090] The conductive layer 432 may be a signal layer or a ground layer integrated in a PCB. In one

embodiment, the conductive layer 432 is a conductive substrate on which the VSD material 440 was initially disposed (e.g., a copper foil on which the VSD material 440 was coated and cured). [0091] The VSDM formation 400 shown in FIG. 4A is disposed along the vertical dimension of a PCB, as indicated by the Z axis. With reference to the embodiment of FIG. 3, the Z axis shown in FIG. 4A is the same as the Z-axis shown in FIG. 3.

[0092] By analogy to the discussion of horizontal switching in connection with the embodiments of FIG. 1 and FIG. 2, vertical switching means that flow of current takes place in a direction substantially parallel with the vertical direction of a substrate.

[0093] With reference to the embodiment of FIG. 3, vertical switching for the structure shown in the

embodiment of FIG. 4A means that if the VSD material 440 is switched on to become substantially conductive in response to a voltage that exceeds its characteristic voltage, current would flow between conductive structure 430 and the conductive layer 432 predominantly in a direction that is substantially parallel with the Z-axis shown in FIG. 3. Again, as discussed in connection with the embodiments of FIG. 1 and FIG 2 with respect to horizontal switching, vertical switching does not mean that current would be strictly limited to flows in a direction substantially parallel with the Z- axis (or vertical axis) of a substrate. Instead, it is expected that given the 3D physical aspects of conductors, 3D structure of PCB layouts, 3D physical characteristics and shape of the VSD material structure, and micro-level effects within the VSD material itself (e.g., current propagation within and/or between particles dispersed within the VSD material), a certain amount of current flow could occur in a horizontal dimension, at least in localized volumes within the VSD material.

Nevertheless, vertical switching means that current flow would take place predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of a PCB board or other substrate, such that useful electrical functionality may be achieved using current flowing in a vertical direction through the VSD material 440.

[0094] In one implementation, the VSDM formation 400 further comprises a layered interconnect 434, which is disposed in contact with the conductive structure 430 and the VSD material 440. The layered interconnect 434 is a conductive feature that may be added in various embodiments to increase the cross-sectional conduction area at a boundary between conductive structures and VSD material formations, such as the boundary between the conductive structure 430 and the VSD material 440 shown in FIG. 4A. Addition of a layered interconnect at such a boundary may enhance the capacity of the respective conductive structures to carry higher currents, especially if the boundary has small physical features that may otherwise result in concentration of currents or electrical fields. This may be more desirable, for example, if the conductive structure 430has a smaller cross-sectional area at the point where it contacts the VSD material 440.

[0095] In general, a layered interconnect disposed between a conductive feature and a structure of VSD material, such as the layered interconnect 434 shown in FIG. 4A, may provide enhanced current flow between the conductive structure and the VSD material, improved mechanical properties for the interface between the conductive structure and the VSD material (e.g., increased adhesion or bonding, better thermal coefficient matching, etc.), improved electrical connection between the conductive structure and the VSD material, and other similar advantages.

[0096] In various embodiments, the layered interconnect 434 may be disposed to fully or partially separate the conductive structure 430 from the VSD material 440, or may be disposed at another boundary of the conductive structure 430 to provide an additional electrical path between the conductive structure 430 and the VSD material 440 (e.g., vertically).

[0097] In one embodiment, the layered interconnect 434 physically separates the conductive structure 430 and the VSD material 440. To manufacture such an embodiment, the layered interconnect 434 could be formed on top of the VSD material 440, and the conductive structure 430 could then be formed above the layered interconnect 434, avoiding the complete penetration of the layered interconnect 434 by the conductive structure 430.

[0098] In one embodiment, the layered interconnect 434 is in physical contact with the VSD material 440, and the layered interconnect 434 encapsulates a portion of the conductive structure 430 at the interface with the VSD material 440. To manufacture such an embodiment, the layered

interconnect 434 could be formed on top of the VSD material 440, and the conductive structure 430 could then be formed above the layered interconnect 434, penetrating the layered interconnect 434 to establish direct physical contact between the conductive structure 430 and the VSD material 440 (e.g., by laser drilling a hole through the layered interconnect 434 all the way to the VSD material 440 and then filling that hole up with conductive material to produce a conductive via).

[0099] FIG. 4B shows a VSDM formation 490 comprising a VSD material layer 498 that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment. In one embodiment, the VSDM formation VSDM formation 490 shown in FIG. 4B includes the structural components of structure 430 shown in FIG. 4A and a number of additional features and layers.

[00100] The VSDM formation 490 shown in FIG. 4B comprises a number of substrate layers that are

generally insulative (or dielectric), illustrated as pre-preg filler 480, core 482, pre-preg filler 484, core 486, and pre-preg filler 488.

[00101] The VSDM formation 490 shown in FIG. 4B also comprises a number of conductive signal layers, denoted as conductive layers LI through L6, and numbered as conductive layers 470, 472, 474, 476, 478, and 479. These signal layers may conduct electrical signals within the PCB board, or to or from components and circuit elements attached to the PCB, or may act as ground or other voltage reference points.

[00102] The VSDM formation 490 shown in FIG. 4B also comprises two conductive structures, denoted as conductive structures 450 and 452. Either or both of the conductive structures 450 and 452 may be a via, a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals. The VSDM formation 490 shown in FIG. 4B is disposed along the vertical dimension of a PCB, as indicated by the Z axis. With reference to the embodiment of FIG. 3, the Z axis shown in FIG. 4A is the same as the Z-axis shown in FIG. 3.

[00103] In the embodiment of FIG. 4B, a layered interconnect 499 is disposed at the interface between the conductive structure 452 and the VSD material 498. In various implementations, the layered interconnect 499 may be similar to the layered interconnect 434 from the embodiment of FIG. 4A. The layered interconnect 499 may provide various advantages for the interface between the conductive structure 452 and the VSD material 498, including those discussed in connection with the layered interconnect 434 from the embodiment of FIG. 4A.

[00104] If the VSD material layer 498 is exposed to a voltage between the conductive structure 452 and conductive layer 474 that exceeds its characteristic voltage, the VSD material comprised in the VSD material layer 498 will switch on, and will become substantially conductive. In that case, current would flow predominantly in a vertical direction, between the conductive structure 452 and conductive layer 474. If this happens, the VSD material layer 498 has switched vertically.

[00105] In one embodiment, analogously with the discussion provided in connection with the embodiments of FIG. 1 and FIG. 2, the characteristic voltage of the VSD material layer 498 when measured in Volts is correlated with the gap size of the VSD material. For the embodiment of FIG. 4B, this gap size would be substantially equal to the distance between the conductive structure 452 and the conductive layer 474, which also happens to be substantially the thickness of the VSD material layer 498. While the exact formula that relates gap size to characteristic voltage for a VSD material may vary depending on a number of variables (e.g., the exact VSD material formulation, the complete volume of the VSD material structure or layer, the actual shape of the VSD material structure through which switching is achieved, the impedance of any circuit elements that are connected to the VSD material, etc.), for VSD material formulations used in various embodiments a smaller gap of VSD material generally results in a smaller characteristic voltage. Smaller characteristic voltages may be preferable for certain applications (e.g., for applications where the VSD material would be expected to switch in response to lower voltages).

[00106] As a general design consideration, however, reducing the size of the gap of a VSD material must balance the risk that the VSD material structure becomes too small, and consequently loses some or all of its desirable operating characteristics (e.g., a VSD material structure that is too thin may exhibit decreased repeatability consistency when exposed to similar trigger voltages in rapid succession, may experience decreased capacity to dissipate heat, or may be subject to a higher risk of shorting or burnout).

[00107] An advantage of vertical switching as compared to horizontal switching is that in certain

manufacturing environments, it may be easier to control gap sizes for vertical switching formations compared to horizontal switching formations. For example, the tolerances that can be achieved with current technology while containing manufacturing costs to produce horizontal VSD material gaps, such as gap 150 from the embodiment of FIG. 1 and gap 250 from the embodiment of FIG. 2, may not be sufficiently small, or may be difficult to maintain accurately across PCBs running through a large volume commercial manufacturing line. As a result, horizontal switching VSDM formations on different PCB boards, or even on the same PCB board, may exhibit undesirably high statistical variations in their respective characteristic voltages and/or operational robustness, and such variations may be more difficult to address using standard manufacturing technology and processes deployed in current production lines.

[00108] In contrast, in some embodiments, vertical tolerances associated with VSDM formations, such as the VSD material formation 400 shown in FIG. 4A, may be easier to maintain accurately. For example, if the process through which the VSD material 440 is disposed on the conductive layer 432 could ensure a consistent and accurate thickness for the VSD material 440, the gap 442 would have a correspondingly consistent and accurate gap size. In practice, this could be achieved by employing advanced coating technology coupled with adequate inspection, metrology and monitoring processes.

[00109] Another advantage of vertical switching as compared to horizontal switching is that VSD material structures used to perform vertical switching may be produced with a larger cross-sectional area across which current flows when the VSD material becomes substantially conductive. A larger cross-sectional area will normally be able to carry higher currents, therefore resulting in better performance characteristics and endurance for the respective VSD material structure. For example, the cross-sectional switching area of the VSD material 140 from the embodiment of FIG. 1 is proportional with the thickness of the VSD material layer measured in the vertical direction, which is usually small and will tend to produce a smaller cross-sectional area. In contrast, the cross- sectional switching area of the VSD material 940 from the embodiment of FIG. 9 is proportional with the surface area of the electrode 920 as determined in the X-Y plane, which will tend to produce a larger cross-sectional area.

[00110] To dispose a layer of VSD material on a substrate, such as the VSD material 140 on the substrate 160 in the embodiment of FIG 1 or the VSD material 440 on the conductive layer 432 in the embodiment of FIG 4A, the VSD material may be coated and cured on the substrate. As an example, with reference to the embodiment of FIG. 4A, to dispose a layer of the VSD material 440 on the conductive layer 432, the VSD material may be coated and cured on a conductive sheet of material (e.g., copper), and then the resulting cured VSDM formation could in introduced as a compound layer within a PCB, with the conductive sheet of material becoming conductive layer 432 and the layer of VSD material becoming the VSD material 440. The rest of the features shown in FIG. 4A may be formed through various manufacturing steps during the manufacturing process.

[00111] Unless otherwise expressly indicated, the terms "VSD material formation," "VSDM formation," "formation of VSD material," "formation of VSDM," "VSD material stackup," or "VSDM stackup" are intended to refer to any combination, arrangement or other structure that includes (a) at least one VSD material structure, and (b) one or more of the following: (i) an insulative element (e.g., a pre- preg or other insulative layer or structure in a PCB, an insulative layer or structure in a semiconductor package, etc.), (ii) an electrode (e.g., a conductive via in a PCB or a conductive connector in a semiconductor package), (iii) a semiconductor element (e.g., a structure build out of a semiconductor material, and/or (iv) a different VSD material structure. An example of a VSD material formation in a simpler configuration is the combination of a VSDM structure (e.g., a layer of VSD material) disposed on a copper foil, and the foil itself.

[00112] Other examples of VSDM formations in more complex configurations are the vertical switching

VSDM formations disclosed and/or claimed in this patent in connection with various embodiments, including the VSDM formation 400 of the embodiment of FIG. 4A, the VSDM formation 490 of the embodiment of FIG. 4B, the VSDM formation 500 of the embodiment of FIG. 5, the VSD material formation 600 of the embodiment of FIG. 6, the VSD material formation 900 of the embodiment of FIG. 9, the VSD material formation 1000 of the embodiment of FIG. 10, the VSD material formation 1 100 of the embodiment of FIG. 11, the VSD material formation 1200 of the embodiment of FIG. 12A, the VSD material formation 1300 of the embodiment of FIG. 13, the VSD material formation 1400 of the embodiment of FIG. 14, the VSD material formation 1500 of the embodiment of FIG. 15 A, the VSD material formation 1600 of the embodiment of FIG. 16, and the bidirectional switching structure 1700 of the embodiment of FIG. 17.

[00113] Coating and curing a VSD material structure on a substrate, such as a layer of VSD material, may be achieved through a sequence of steps. For example, with reference to the embodiment of FIG. 4A, to dispose a layer of VSD material, such as the VSD material 440, on a substrate that eventually becomes the conductive layer 432, a sequence of steps such as the following steps may be used:

[00114] (1) dispense the VSD material onto the substrate while the VSD material is in a liquid or semi-liquid state (e.g., because of the particles and other materials dispersed within the VSD material, the viscosity of the VSD material would tend to be higher than the viscosity of a purer liquid such as water, and would therefore tend to flow slower);

[00115] (2) spread the VSD material in a layer on the substrate while maintaining the thickness of the VSD material within desired ranges and tolerances across the surface of the substrate;

[00116] (3) monitor, inspect and/or test the thickness of the layer of the VSD material across larger surfaces of the coated substrate to ensure that the thickness of the VSD material is indeed maintained within desired ranges and tolerances;

[00117] (4) cure the VSD material by exposing it to heat (e.g., by running the VSD material coated on the substrate through an oven where the temperature is controlled and/or varied within appropriate ranges);

[00118] (5) remove solvent or other materials to the extent such solvent or other materials may have been used in earlier manufacturing steps and are designed to be removed at this time to facilitate subsequent processing; and [00119] (6) monitor, inspect and/or test the resulting VSD material formation comprising the cured layer of VSD material disposed on the substrate to ensure that the cured layer of VSD material exhibits expected characteristics and tolerances in terms of thickness, consistency, defect density, switching voltage, physical resiliency, adhesion, flexibility or other physical attributes, thermal endurance or other thermal attributes, and/or other relevant parameters.

[00120] In addition to coating, other methods could be used to dispose on a substrate a VSD material structure, such as a layer of VSD material. Such other methods include deposition, screen printing, die coating, comma coating, lamination, mechanical adhesion (e.g., by pre-curing the VSD material in a layer and then attaching it to the substrate), or through any other bonding approach, whether mechanical, chemical, or otherwise. Regardless of the approach used, the resulting VSD material formation would comprise a layer of VSD material disposed on top of a substrate (whether conductive or not), with the VSD material in a cured state and capable of performing its voltage switching function.

[00121] In one embodiment, instead of producing a VSD material formation comprising a layer of VSD material cured on a substrate ahead of time and then integrating the VSD material formation into a PCB, the VSD material may be coated onto a layer of the PCB during the actual manufacturing process of a PCB. With reference to FIG. 4B, for example, the conductive layer L3 474 may be attached to the pre-preg filler 484 during the manufacturing of the VSDM formation 490, and then a layer of VSD material 498 may be disposed and cured on the conductive layer L3 474. The layered interconnect 434 may then be formed (e.g., screen printed) on top of the VSD material 498. The core 482 may then be attached to the layer of VSD material 498, with the conductive structure 452 being subsequently formed within the core 482 or having been already produced within the core 482 before attachment.

[00122] FIG. 5 shows a VSDM formation 500 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment. The VSDM formation of FIG. 5 may be integrated in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip.

[00123] The VSDM formation 500 of FIG. 5 comprises a set of conductive layers 520 and 522, which may be conductive signal layers in a PCB or other electrodes. The VSDM formation 500 of FIG. 5 further comprises a layer of VSD material 540.

[00124] A layered interconnect 530 is disposed between the conductive layer 520 and the VSD material 540. A layered interconnect 532 is disposed between the VSD material 540 and the conductive layer 522. In an alternative implementation, either one or both of the layered interconnects 530 and 532 are absent, in which case the VSD material 540 is in direct physical contact with one or both conductive layers.

[00125] In various embodiments, a "layered interconnect" is any conductive structure that may be used as part of, or in connection with a vertical switching VSDM formation to transmit voltage and/or current along an electrical path that includes one or more VSDM structures. In some embodiments, a layered interconnect is disposed to provide conduction in a horizontal direction (e.g., within a horizontal layer). In some embodiments, a layered interconnect is disposed to provide conduction in a vertical direction (e.g., across one or more horizontal layers, and/or between two or more horizontal layers). In some embodiments, a layered interconnect is disposed to provide conduction both horizontally and vertically, and/or obliquely.

[00126] In various implementations, layered interconnects, such as layered interconnects 530 or 532 from FIG. 5, may be produced using any suitable process, including through screen printing, stencil printing, deposition, adhesion, lamination using heat and/or pressure, through any other physical attachment (e.g., gluing or bonding), or by pre-building the layered interconnect into a substrate (e.g., disposing the layered interconnect as a layer, structure, conductive core or pre-preg within a PCB or as a layer or conductive structure within a semiconductor package). In one embodiment, the substrate attached to a layer of VSD material (e.g. the copper foil used as a substrate for a layer of VSD material) may act as a layered interconnect to provide horizontal conductivity within a PCB or other substrate. In general, a layered interconnect suitable for use in connection with various vertical switching VSDM formation embodiments may be produced through any mechanical, chemical, or other suitable deposition processes.

[00127] In various embodiments, layered interconnects may have a range of impedances. For example, in some implementations, it may be desirable to have a layered interconnect with negligible impedance (e.g., a highly conductive film that has very low resistance and does not introduce any significant voltage drop). As another example a layered interconnect may be intentionally constructed to have a higher impedance and introduce a specific voltage drop when current flows through it (e.g., a layer interconnect may be designed to be an embedded circuit element, or may include an embedded circuit element). An example of a layered interconnect with a resistance that would normally not be considered negligible would be a conductive film with a resistance between 25 and 1000 Ohms. In one embodiment, a layered interconnect may be constructed to be the element 1592 from the embodiment of FIG. 15 A, or may be modeled to operate as the element 1592 from the embodiment of FIG. 15 A.

[00128] A layered interconnect that has a non-negligible electrical resistivity may be manufactured in

connection with various embodiments using a carbon filled epoxy, or as a nickel-chromium alloy deposited on copper (e.g., a thin film resistive layer thermally deposited on copper foil).

[00129] In various embodiments, a layered interconnect may be manufactured out of a material or

combination of materials with a high dielectric constant, which would provide the layered interconnect with a higher capacitance.

[00130] In various embodiments, a layered interconnect may be made out of any material or combination of materials that can conduct current and that is fit for use in connection with a substrate application.

[00131] An example of a material that may be used to make a layered interconnect in connection with

present embodiments, such as layered interconnects 530 or 532, is a Z-axis conductive tape manufactured by 3M Corporation and marketed under the trade name "3M™ Z-Axis Electrically Conductive Tape 9703." When disposed as a substantially horizontal layer, a Z-axis conductive tape exhibits anisotropic vertical conductivity along the Z-axis such that it is substantially conductive when propagating current along the Z-axis, but substantially insulative horizontally.

[00132] Other examples of materials that may be used to make a layered interconnect in connection with present embodiments, such as layered interconnects 530 or 532, are silver paste, copper paste, other metallic types of paste, a silver coated copper layer, a carbon layer, a ferroic material or a compound that includes ferrites, a conductive epoxy or polymer, or any other material layer, structure or connector capable of conducting current. In general, unless a layered interconnect has anisotropic conductivity, the layered interconnect may be used in connection with vertical switching VSDM formations in various embodiments to conduct current in horizontal, vertical and/or oblique directions, depending on the particular architecture of the respective embodiment.

[00133] In the embodiment of FIG. 5, a voltage source may be connected between conductive layers 520 and 522. The voltage source 510 is shown in FIG. 5 as a stand-alone voltage source, which could also be a current source, or any other source of electrical energy. Such an arrangement may be encountered in a testing setup or in a specific architectural layout where the VSD material is intended to be activated intentionally by increasing the voltage generated by the voltage source 510.

[00134] In a more general sense, however, the voltage that is applied between conductive layers 520 and 522 may be any voltage signal or other electrical signal, including a voltage that is generated by an ESD discharge, as illustrated by the ESD pulse 512 shown in the embodiment of FIG. 5. In normal operating circumstances that are usually experienced by end user devices, such as mobile phones, the ESD pulse 512 may be expected to have a high voltage magnitude (e.g., in excess of a few hundred Volts, and possibly a few thousand Volts) and a short time duration (e.g., anywhere between nanoseconds and microseconds). Despite the short time duration, the electrical current generated by the ESD pulse 512 may be expected to reach large amplitudes, possibly in excess of 10 Amperes. If the structure of the embodiment of FIG. 5 is used for ESD protection, one of the conductive layers 520 and 522 may be connected to a ground plane (or another predetermined point within the circuit or device being protected), and the ESD pulse 512 may be guided to reach ground or that predetermined point.

[00135] If the voltage applied by the voltage source 510 (or alternatively by the ESD pulse 512) does not exceed the characteristic voltage of the VSD material 540, the VSD material 540 remains substantially nonconductive, and no significant current is conducted between the conductive layers 520 and 522, through the layered interconnects 530 and 532, and through the VSD material 540 (except, possibly, for a certain amount of leakage current, which the VSD material 540 is normally designed to minimize so as not to impact the performance of the electronic device in which the structure of 500 may be deployed). [00136] To graphically illustrate that the voltage source 510 and the ESD pulse 512 may be present in the alternative and are used for purposes of general description, the connecting lines between each of them and the conductive layers 520 and 522 are shown with a dashed line. In general, any voltage source, ESD signal, or other electrical source, overvoltage signal, or voltage potential may be applied between the conductive layers 520 and 522. Either of the two conductive layers may also be connected to ground, or to a point with another reference voltage level.

[00137] If the voltage applied by the voltage source 510 (or alternatively by the ESD pulse 512) exceeds the characteristic voltage of the VSD material 540, the VSD material 540 switches and becomes substantially conductive, and a nontrivial amount of current is conducted between the conductive layers 520 and 522 through the VSD material 540.

[00138] If for a given VSD material composition, the characteristic field of the VSD material is defined in terms of Volts per mil (V/mil) (or otherwise in terms of Volts per unit length), the characteristic voltage for a layer of VSD material with a given thickness may be determined as a specific voltage value. For example, if the thickness of the layer of VSD material 540 across the gap 542 in the embodiment of FIG. 5 is denoted T and the characteristic field of the VSD material expressed in Volts per mil is denoted ECH, the corresponding characteristic voltage value expressed in Volts is denoted VCH and may be expressed as follows:

[00139] VCH (V) = ECH (V/mil) * T (mil) (Eq. 1)

[00140] The formula in Eq. 1 generally holds true if the value of the characteristic field ECH is assumed to be constant, or may be approximated as constant across the respective thickness T.

[00141] In general, however, the characteristic field ECH may not be constant across the respective gap of the VSD material, and may have a value that varies across the thickness of the VSD material structure. To the extent that the characteristic field ECH is not constant over the switching gap of a VSD formation, the characteristic voltage VCH could be obtained by integrating the characteristic field ECH across the corresponding thickness T.

[00142] From Eq. 1, it can be seen that by reducing the thickness of the layer of VSD material 540, the characteristic voltage of the VSD material structure 540 is correspondingly reduced. Exemplary values that could be used for the thickness of the VSD material 540 in industrial application for mobile phones include values below 2 mils. To decrease the characteristic voltage further, the thickness of the layer of VSD material 540 may be reduced below 1 mil.

[00143] If the impedances of the layered interconnects 530 and 532 and of the conductive layers 520 and 522 are negligible, there is no significant voltage drop across those conductive layers and layered interconnects, and therefore the VSD material 540 switches on and becomes substantially conductive after the voltage produced by the voltage source 510 or ESD pulse 512 reaches the characteristic voltage of the layer of VSD material 540.

[00144] FIG. 6 shows a VSDM formation 600 that is adapted to achieve vertical switching using VSD

material, in accordance with an embodiment. The VSDM formation of FIG. 6 may be integrated in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip.

[00145] The VSDM formation 600 of FIG. 6 comprises a set of conductive layers 620 and 622, which may be conductive signal layers in a PCB or other electrodes. The VSDM formation 600 of FIG. 6 further comprises a VSD material structure 640, which is disposed as a layer with a thickness substantially equal to the gap 642, denoted T.

[00146] A layered interconnect 630 is disposed between the conductive layer 620 and the VSD material structure 540. The conductive layer 622 is in physical and electrical contact with the VSD material

640.

[00147] According to various embodiments, in addition to conventional rigid substrates such as rigid PCBs and rigid semiconductor packaging, vertical switching VSDM formations may also be implemented in flexible circuits, flexible substrates, flexible semiconductor packaging, and other flexible devices. To achieve that, the formulation of VSD material used is adjusted accordingly to exhibit enhanced elastic properties. For example, as a general guidelines, reducing the metal particle content in a VSD material (e.g., by reducing or removing metal particles dispersed within the VSD material) reduces the brittleness of the VSD material once cured, and therefore makes the VSD material more suitable for flexible applications.

[00148] Vertical switching VSD material formations can be further adapted for implementation in flexible applications by the addition of one or more layers with appropriate mechanical and/or

environmental endurance attributes. For the VSD material formation 600 shown the embodiment of FIG. 6, for example, two additional layers are added as polyimide substrates 680 and 682.

[00149] Polyimide materials are generally lightweight and flexible, have higher mechanical elongation and tensile strength, and tend to have improved resilience against heat and chemical reactions.

Polyimide materials are used in the electronics industry to manufacture flexible electrical cables, as an insulating or passivation layer in the manufacture of digital semiconductor and MEMS chips, as insulating films, as high-temperature adhesives, for medical tubing applications, and for other applications where flexibility, lower weight and improved environmental resilience are desired.

[00150] Another application for a vertical switching VSD material formation that incorporates heat- resistant materials, such as the as polyimide substrates 680 and 682 included in the VSD material formation 600 shown the embodiment of FIG. 6, is high-heat applications, such as LED panels or electronic applications operating in areas with higher environmental temperatures (e.g., hot climates) or in devices with limited ventilation (e.g., enclosed or embedded electronic devices or systems with limited or no cooling). [00151] The operation and electrical behavior of the VSDM formation 600 shown in FIG. 6 are generally analogous with the operation and electrical behavior of the VSDM formation 500 shown in FIG. 5. In particular, when a voltage is applied between the conductive layers 620 and 622, no significant voltage drops are expected to occur within the conductive layers 620 and 622 or within the layered interconnect 630 as long as their respective impedances are negligible, and therefore the VSD material 640 would switch on and become substantially conductive when the voltage applied by the voltage source 610 (or alternatively by the ESD pulse 612) exceeds the characteristic voltage of the VSD material 640. The characteristic voltage of the VSD material 640 will be proportional with the thickness T of the VSD material 640.

[00152] FIG. 7 illustrates a method for forming a vertically switching VSDM formation that includes a layered interconnect or other electrode in accordance with an embodiment. As shown in FIG. 7, the method 700 comprises various steps that may be used to produce one or more conductive structures, such as one or more layered interconnects or other electrodes, within a vertically switching VSDM formation. Additional optional steps may be applied to further refine the resulting VSDM formation.

[00153] A method for producing various devices, such as an LED device, by electroplating with VSD

materials was described in US Patent 7,825,491 titled "Light-emitting device using voltage switchable dielectric material," which is incorporated hereby by reference in its entirety.

[00154] In the embodiment of FIG. 7, at step 710 a VSD material is applied to a substrate or surface (e.g., to a copper foil). At step 720, a layer of non-conductive material is disposed over the VSD material (e.g., a layer of photoresist material).

[00155] At step 730, the non-conductive layer is patterned with a specific pattern that will define one or more conductive structures, such as a layered interconnect or other electrode. For example, the patterning in step 730 may define the position and shape of the layered interconnect 434 from the embodiment of FIG. 4A, which is to be disposed on top of the layer of VSD material 440. In one embodiment, the nonconductive layer is a photoresist layer, and the pattern is produced by exposing the photoresist to a laser through a photomask, followed by an etching process. Either positive or negative photoresist processes may be used, as known in the art. As a result of step 730, one or more areas of the VSD material will become exposed through the non-conductive layer

corresponding with one or more portions of the pattern.

[00156] At step 740, a voltage that exceeds the characteristic voltage of the VSD material is applied,

therefore turning the VSD material substantially conductive. This voltage may be applied either directly to the VSD material or to the conductive substrate on which the VSD material is disposed (e.g., to a copper foil). The applied voltage may be a constant voltage or a variable voltage, (e.g., pulsed).

[00157] While the VSD material is conductive, an ion deposition process takes place at step 750 to form conductive structures (e.g., a layered interconnect such as the layered interconnect 434 from the embodiment of FIG. 4A) within the exposed areas of the VSD material pattern. Various known deposition processes may be performed to deposit ionic media into at least some of the exposed areas defined by the pattern of the exposed VSD material. In one implementation, an electroplating process is performed, where the exposed areas of VSD material are submerged into an electrolytic solution.

[00158] As alternative implementation, ionic deposition is performed using a powder coating process. In this process, power particles are charged and applied to the exposed areas of the VSD material that is in a substantially conductive state. The application of the powder may be accomplished by depositing the powder on the exposed areas, or by submerging the substrate in a powder bath.

[00159] Still further, another implementation may use an electro-spray process. Ionic media may be

contained in the form of charged particles in a solution. The solution may be applied to the substrate while the VSD material is conductive. The application of the spray may include the use of ink or paint.

[00160] Other deposition techniques may be used in various embodiments to perform ion deposition on the exposed areas of the VSD material while in a substantially conductive state, such as vacuum deposition (e.g., physical vapor deposition (PVD) or chemical vapor deposition (CVD) processes). For example, in PVD, metal ions are introduced into a chamber to combine with gas ions. The exposed areas of the VSD material may be made conductive to have an opposite charge, so as to attract and bond with the ions of the chamber. In CVD, a film of ionic material may be applied to the VSD material on the surface of the substrate.

[00161] At step 760, the non-conductive material is optionally removed from the substrate, so as to leave the formed conductive structures (e.g., a layered interconnect or another electrode used within a vertically switching VSDM formation). In one implementation, when a photoresist material is used as the non-conductive material, a base solution (e.g. KOH), or water is applied to the substrate to remove the photoresist material.

[00162] In one embodiment, subsequent to removing the photoresist layer, a polishing step may be applied to the resulting VSDM formation. In one embodiment, a chemical mechanical polish is used to polish a substrate of a resulting VSDM formation.

[00163] FIG. 8 shows a graph 800 with sample response voltage envelopes for a vertical switching VSDM formation, such as the VSDM formation 500 sown in FIG. 5 or the VSDM formation 600 shown in FIG. 6, in accordance with an embodiment. The voltage response curves 820 shown in FIG. 8 were obtained by measuring the voltage across a layer of VSD material having a vertical gap of 2 mils while repeatedly applying an input voltage in the form of a transmission line pulse ("TLP"). For example, in the embodiment of FIG. 5, this measurement could be achieved by measuring the voltage at the conductive layer 520 relative to the conductive layer 522, with the voltage source 510 applying the TLP. [00164] In one embodiment, the measurement of the response voltage of a VSDM formation in response to a TLP may be processed using a TLP generator and an oscilloscope as follows:

[00165] (1) a TLP generator sends a pulse down a coaxial cable transmission line towards an

electrode of the VSDM formation, which has a gap with a corresponding characteristic voltage;

[00166] (2) an oscilloscope captures the TLP as it travels towards the target electrode of the VSDM formation;

[00167] (3) the TLP arrives at the target electrode of the VSDM formation. A portion of the energy from the TLP is reflected back as an echo;

[00168] (4) the oscilloscope captures the reflection echo; and

[00169] (5) a computer may be used to process the TLP and the reflection signal to evaluate the characteristic voltage of the VSDM formation across the respective gap.

[00170] The response curves 820 shown in the portion 802 of the graph are displayed over a longer time scale. The response curves 822 shown in the portion 804 of the graph are the response curves 820 displayed over a shorter time scale of 16 nanoseconds. The TLP voltage input is shown as signal 810, and respectively signal 812.

[00171] As shown from the graph 800, as the input signal 810 increases, the voltage across the VSD

material layer tracks the input voltage initially, but starts to diverge as the VSD material starts to conduct increasingly more current. At some point, the VSD material switches to become substantially conductive, and the response signal stabilizes at a value below 200 V despite the fact that the input signal 810 continues to increase. The characteristic voltage of the VSD material layer can be estimated from the graph 800 to be between 150 V and 220 V.

[00172] FIG. 9 shows a VSD material formation 900 that is adapted to achieve vertical switching using

VSD material, in accordance with an embodiment. The vertical switching VSD material formation 900 of FIG. 9 may be integrated in any electronic device that includes a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip, to provide protection against ESD and other overvoltage events. FIG. 9 shows a cross section of the VSD material formation in a vertical direction of a substrate, such as a PCB.

[00173] The VSD material formation 900 of FIG. 9 comprises a set of electrodes 920 and 922. The

electrodes 920 and 922 are disposed in contact with a VSD material structure 940, which is shown as a layer in the embodiment of FIG. 9. The layer of VSD material 940 has a thickness substantially equal to the gap 942, denoted T. For commercial implementations, T may take a range of values, depending on the formulation of the VSD material 940 and of the characteristic voltage and other physical or operational properties desired for the VSD material 940. Specific exemplary values for T include 2 mils, 1.5 mils, 1 mil, and 0.5 mils. In general, smaller values of T are expected to provide lower characteristic voltages for the VSD material structure 940.

[00174] A via 930 crosses though the layer of VSD material 940 and is in contact with electrode 922. The via 930 is substantially conductive. A layered interconnect 970 is disposed in contact with the layer of VSD material 940 along a horizontal plane opposite to the electrodes 920 and 922. Various layered interconnects that could be used to implement layered interconnect 970 were discussed in connection with the embodiment of FIG. 5, except that a Z-axis layered interconnect that prevents efficient current flow in a horizontal direction would not be appropriate for this particular implementation.

[00175] The layered interconnect 970 is disposed within a pre-preg layer 980. The pre-preg 980 is part of a substrate device, such as a PCB, and is in physical contact with another layer of that substrate, core 982. Pre-preg 980 is substantially insulative.

[00176] The via 930 and the layered interconnect 970 are substantially conductive and could generally be assumed to have negligible impedance. Consequently, voltage propagates without significant loss between the electrode 922 and the layered interconnect 970.

[00177] If a voltage that exceeds the characteristic voltage of the VSD material structure 940 is applied by a voltage source 910 or by an ESD pulse 912 between the electrodes 920 and 922, the VSD material 940 becomes substantially conductive. Because the electrode 922 and the layered interconnect 970 will be at substantially the same voltage level, current flow across the VSD material 940 will take place predominantly in a vertical direction between the electrode 920 and the layered interconnect 970. One reason for this is that electrical current tends to choose the path with minimal impedance for propagation, and crossing the layer of VSD material 940 vertically between the layered interconnect 970 and the electrode 920 will generally provide that minimum-impedance path.

[00178] The fact that the VSD material structure 940 is switching vertically in the embodiment of FIG. 9 does not necessarily mean that current will flow strictly and solely along the Z-axis across the gap 942. Instead, due to various effects as discussed in more detail in connection with the embodiment of FIG. 3, a certain level of current flow may occur in a horizontal direction within the VSD material structure 940. But in general, when the VSD material 940 switches to become substantially conductive in the embodiment of FIG. 9, the current flow will place predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of the respective substrate.

[00179] Because current flow within the VSD material structure 940 of the embodiment of FIG. 9 will take place substantially in the vertical direction across the gap 942, the characteristic voltage of the VSD material structure 940 will be determined by the thickness T of the gap 942. For some formulations of VSD material, this characteristic voltage may be determined in accordance with equation Eq. 1.

[00180] An advantage of the vertical switching VSDM formation 900 shown in the embodiment of FIG. 9 is that the electrodes 920 and 922 may be disposed with limited accuracy in a horizontal direction. This is because their specific placement horizontally is not critical as long as sufficient overlap exists between the electrode 920 and the layered interconnect 970, and as long as the electrode 922 is in good electrical contact with the via 930.

[00181] Another advantage of the vertical switching VSDM formation 900 shown in the embodiment of

FIG. 9 is that metallic electrodes (e.g. made out of copper), such as the electrodes 920 and 922, may be disposed in an outer layer, therefore facilitating heat dissipation and/or conduction of power for LED devices or for other devices that could benefit from improved thermal cooling.

[00182] In various embodiments, the vertical switching VSDM formation shown in FIG. 9 may be

implemented with the addition of various other layers and features, both conductive, insulative and semiconductive, while observing the general operational principle that current is conducted with substantially no losses across the VSD material structure once (e.g., through a set of conductive features that are in electrical contact with each other), and is conducted across the vertical thickness of the VSD material structure once when the VSD material becomes substantially conductive. In this general design approach, the characteristic voltage of the VSD material is determined by the vertical thickness of the formation VSD material.

[00183] FIG. 10 shows a VSD material formation 1000 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment. The vertical switching VSD material formation 1000 of FIG. 10 may be integrated in any electronic device that includes a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip, to provide protection against ESD and other overvoltage events. FIG. 10 shows a cross section of the VSD material formation in a vertical direction of a substrate, such as a PCB.

[00184] The vertical switching VSD material formation 1000 of FIG. 10 is generally similar to the VSD material formation 900 of FIG. 9, except that instead of the single VSD material structure 940 in the embodiment of FIG. 9, there are two VSD material structures in the embodiment of FIG. 10: a layer of VSD material 1040 with a vertical thickness Tl across gap 1042, and a layer of VSD material 1044 with a vertical thickness T2 across a gap 1046. For commercial implementations, Tl and T2 may take a range of values, depending on the formulations of the VSD materials 1040 and 1044, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material structures 1040 and 1044. In various embodiments, the formulations of the VSD materials 1040 and 1044 may or may not be the same. Analogously, in various embodiments, the vertical thicknesses Tl and T2 of the VSD materials 1040 and respectively 1044 may or may not be the same. Specific exemplary values for the sum of Tl and T2 include 2 mils, 1.5 mils, 1 mil, and 0.5 mils. In general, smaller values for Tl and/or T2 are expected to provide lower characteristic voltages for the VSD material structures 1040 and/or 1042.

[00185] In general, two or more VSD material structures that are used to produce a compound set of VSD material structures as part of a vertical switching VSDM formation, such as the VSD materials 1040 and 1044 that are used to make the VSDM formation 1000, may have the same, substantially the same, or different properties relative to each other, including dielectric constants, adhesion characteristics, stiffness, flexibility, composition and thickness.

[00186] The VSD material formation 1000 of FIG. 10 comprises a set of electrodes 1020 and 1022. The electrodes 1020 and 1022 are disposed in contact with the first VSD material structure, which is shown in FIG. 10 as the layer of VSD material 1040. A via 1030 crosses though the layers of VSD material 1040 and 1044, and is in contact with electrode 1022. The via 1030 is substantially conductive. A conductive layer 1070 is disposed in contact with the layer of VSD material 1044 along a horizontal plane opposite to the electrodes 1020 and 1022. The conductive layer could be made out of a conductive material (e.g., copper), or could be a layered interconnect. Various layered interconnects that could be used to implement conductive layer 1070 were discussed in connection with the embodiment of FIG. 5, except that a Z-axis layered interconnect that prevents efficient current flow in a horizontal direction would not be appropriate for this particular implementation.

[00187] The conductive layer 1070 is disposed adjacent to a pre-preg layer 1080. The pre-preg 1080 is part of a substrate device, such as a PCB or a flexible circuit, and is in physical contact with another layer of that substrate, core 1082. Pre-preg 1080 is substantially insulative.

[00188] The via 1030 and the conductive layer 1070 are substantially conductive and could generally be assumed to have negligible impedance. Consequently, voltage propagates without significant loss between the electrode 1022 and the conductive layer 1070.

[00189] If a voltage that exceeds the sum of the characteristic voltages of the VSD material structures 1040 and 1044 is applied by a voltage source 1010 or by an ESD pulse 1012 between the electrodes 1020 and 1022, the VSD materials 1040 and 1044 become substantially conductive. Because the electrode 1022 and the conductive layer 1070 will be at substantially the same voltage level, current flow across the VSD materials 1040 and 1044 will take place predominantly in a vertical direction between the electrode 1020 and the conductive layer 1070. One reason for this is that electrical current tends to choose the path with minimal impedance for propagation, and crossing the layers of VSD material 1040 and 1044 vertically between the conductive layer 1070 and the electrode 1020 will generally provide that minimum-impedance path.

[00190] As a result, the VSDM formation 1000 shown in the embodiment of FIG. 10 will switch vertically, with current flow taking place through the VSD material structures 1040 and 1044 predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of the respective substrate.

[00191] Because current flow within the VSD material structures 1040 and 1044 of the embodiment of FIG. 10 will take place substantially in the vertical direction across the gaps 1042 and 1046, the characteristic voltage of the compound VSD material structure formed by the two different VSD material structures 1040 and 1044 will be determined by the formulations of the two VSD materials and by the thickness Tl of the gap 1042 and respectively the thickness T2 of the gap 1046. For some formulations of VSD material, this compound characteristic voltage may be determined by adding the individual characteristic voltages of the VSD material structures 1040 and 1044 across the gap 1042, and respectively gap 1046.

[00192] In general, in a compound formation of two or more structures of VSD material through which vertical switching is taking place, whether or not in direct physical contact with each other, the effective characteristic voltage of the compound set of VSDM structures is correlated with the sum of the individual thicknesses of the VSD material structures, such that as the total compound thickness increases, the resulting compound characteristic voltage also tends to increase.

[00193] In various embodiments, the vertical switching VSDM formation shown in FIG. 10 may be

implemented with the addition of various other layers and features, both conductive, insulative and semiconductive, while observing the general operational principle that current is conducted with substantially no loss across two or more VSD material structures in one vertical sense (e.g., through a set of conductive features that are in electrical contact with each other), and is conducted across the thicknesses of two or more VSD material structures in the opposite vertical sense when the individual VSD material structures become substantially conductive. In this general design approach, the characteristic voltage of the compound set of VSD material structures is determined by the total vertical thickness of the individual VSD material structures and by the characteristic voltage of each VSD material.

[00194] FIG. 1 1 shows a VSD material formation 1100 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment. The vertical switching VSD material formation 1100 of FIG. 1 1 may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events. Examples of substrate devices in which the VSD material formation 1 100 may be integrated in various embodiments include a PCB and the packaging of a semiconductor chip. FIG. 1 1 shows a cross section of the VSD material formation in a vertical direction of a substrate device.

[00195] The vertical switching VSD material formation 1 100 of FIG. 1 1 is generally similar to the VSD material formation 1000 of FIG. 10, except that instead of the two VSD material structures from the embodiment of FIG. 10, the embodiment of FIG. 1 1 incorporates a single layer of VSD material 1 140, with a vertical thickness T across gap 1 142. Nevertheless, in various embodiments, multiple layers of VSD material may be utilized, as generally described in connection with the embodiment of FIG. 10. For commercial implementations, T may take a range of values, depending on the formulations of the VSD material 1140, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material 1 140. Specific exemplary values for the thickness T that could be considered for implementation in manufacturing processes include 2 mils, 1.5 mils, 1 mil, 0.5 mils, 0.2 mils, and smaller. In general, smaller values for T are expected to provide lower characteristic voltages for the VSD material structure 1 140.

[00196] The VSD material formation 1 100 of FIG. 11 comprises a set of electrodes 1120 and 1122. The electrodes 1 120 and 1 122 are disposed in contact with the VSD material structure 1 140. A conductive pre-preg layer 1 170 is disposed in contact with the layer of VSD material 1 140, along a horizontal plane opposite to the electrodes 1 120 and 1122. The conductive pre-preg layer could be a layer in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor device. The conductive pre-preg layer 1 170 is or includes a layer and/or set of conductive structures adapted to conduct electric current with minimal or no losses. The conductive pre-preg layer 1170 is in physical contact with another layer of that substrate, core 1182. Core 1 180 is substantially insulative.

[00197] If a voltage that exceeds the characteristic voltage of the VSD material structure 1 140 is applied by a voltage source 11 10 or by an ESD pulse 11 12 between the electrodes 1120 and 1 122, the VSD material 1140 becomes substantially conductive. Current flow across the VSD material 1140 will take place predominantly in a vertical direction between the electrode 1120 and the conductive pre- preg layer 1070, and between the electrode 1 122 and the conductive pre-preg layer 1170. Once current flows across the VSD material structure 1140 in a particular vertical sense, from either electrode 1120 or 1 122, the current then propagates along the conductive pre-preg layer 1 170 with minimal or no loss, and then the current flows across the VSD material structure 1 140 in the opposite vertical sense, towards the other one of the two electrodes 1 122 or 1 120. The reason why current propagates predominantly in a vertical direction across the layer of VSD material 1140 is that electrical current tends to choose the path with minimal impedance for propagation, and crossing the layer of VSD material 1 140 vertically between either of the electrodes 1 120 or 1 122 and the conductive pre-preg 1170 will generally provide that minimum- impedance path. If the distance between the two electrodes 1 120 and 1122 decreases such that it becomes comparable with the gap 1142, the VSD material 1140 may conduct more current in a horizontal direction. This may be reduced in some embodiments by producing a composition for the VSD material 1 140 that exhibits anisotropic horizontal conductivity such that it is substantially conductive when propagating current along the Z-axis, but substantially insulative horizontally.

[00198] As a result, the VSDM formation 1 100 shown in the embodiment of FIG. 1 1 will switch vertically, with current flow taking place through the VSD material structure 1140 predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of the respective substrate.

[00199] In various embodiments, the vertical switching VSDM formation shown in FIG. 11 may be

implemented with the addition of various other layers and features, both conductive, insulative and semiconductive, while observing the general operational principle that current is first conducted across one or more VSD material structures in one vertical sense when the individual VSD material structures become substantially conductive, then is conducted in a horizontal direction with minimal or no loss, and then is conducted across the thickness of the one or more VSD material structures in the opposite vertical sense while the individual VSD material structures remain substantially conductive. In this general design approach, the characteristic voltage of the one or more layers of VSD material is determined by the total vertical thickness of the individual VSD material structures and by the characteristic voltage of each VSD material.

[00200] FIG. 12A shows a VSD material formation 1200 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment. The vertical switching VSD material formation 1200 from the embodiment of FIG. 12A may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events. Examples of substrate devices in which the VSD material formation 1200 may be integrated in various embodiments include a PCB and the packaging of a semiconductor chip. FIG. 12A shows a cross section of the VSD material formation in a vertical direction of a substrate device.

[00201] The vertical switching VSD material formation 1200 of FIG. 12A comprises a layer of VSD

material 1240, with a vertical thickness T across gap 1242. In various embodiments, multiple layers of VSD material may be utilized, as generally described in connection with the embodiment of FIG. 10. For commercial implementations, T may take a range of values, depending on the formulation of the VSD material 1240, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material 1240. Specific exemplary values for the thickness T that could be considered for implementation in manufacturing processes include 2 mils, 1.5 mils, 1 mil, 0.5 mils, 0.2 mils, and smaller. In general, smaller values for T are expected to provide lower characteristic voltages for the VSD material structure 1240.

[00202] The VSD material formation 1200 of FIG. 12A comprises a set of electrodes 1120, 1 122 and 1 124, which are disposed in contact with the VSD material structure 1240. A conductive layer 1270 is disposed adjacent to a pre-preg layer 1230. The pre-preg layer 1230 is disposed between the conductive layer 1270 and the layer of VSD material 1240. A layered interconnect 1280 is disposed in contact with the layer of VSD material 1240. In one embodiment, the layered interconnect 1280 is formed within the pre-preg layer 1230, as shown in FIG. 12A. In one embodiment, the layered interconnect 1280 may be disposed as a distinct layer (i.e., not formed within the pre-preg layer 1230) that separates the pre-preg layer 1230 from the VSD material 1240. The pre-preg layer 1230 could be a layer in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor device.

[00203] A via 1250 crosses the pre-preg layer 1230 and is in electrical contact with the layered interconnect 1280, and establishes electric contact between the conductive layer 1270 and the layered interconnect 1280.

[00204] In the embodiment of FIG. 12 A, electrode 1220 and electrode 1224 are connected to a ground. In some embodiments, one or both electrodes could be connected to a different point in an electric circuit, including possibly to a voltage source, to a circuit element or component, or to another reference voltage potential towards which an ESD pulse or other voltage may be directed.

[00205] If a voltage that exceeds the characteristic voltage of the VSD material structure 1240 is applied by an ESD pulse 1212 (or by a voltage source) at the conductive layer 1270, the VSD material 1240 becomes substantially conductive. Current flow across the VSD material 1240 will take place predominantly in a vertical direction between the layered interconnect 1280 and the electrode 1220 and/or the electrode 1224.

[00206] As a result, the VSDM formation 1200 shown in the embodiment of FIG. 12A will switch

vertically, with current flow taking place through the VSD material structure 1240 predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of the respective substrate. The general electrical path followed by current flowing through the VSDM formation 1200 in response to the ESD signal 1212 is shown in FIG. 12A as ESD discharge path 1290.

[00207] The embodiment of FIG. 12A further shows a circuit element denoted as embedded impedance 1296. In various embodiments, this circuit element may be incorporated partially or completely within the VSDM formation 1200, or may be in communication with the VSDM formation 1200 (e.g., it may be embedded in the same PCB as the VSDM formation 1200, or may be surface- attached to a PCB in which the VSDM formation 1200 is incorporated).

[00208] In the embodiment of FIG. 12A, the embedded impedance 1296 is shown as a circuit element that is embedded at least partially within the VSDM formation 1200. In particular, FIG. 12A shows the embedded impedance 1296 as being embedded at least partially within the pre-preg layer 1230. In alternative or complementary embodiments, the embedded impedance 1296 may be disposed in other locations within a substrate or within the VSDM formation 1200. For example, the embedded impedance 1296 may be disposed within the VSD material structure 1240, within another PCB layer, or within another substrate such as a semiconductor package.

[00209] In various embodiments, the embedded impedance 1296 consists of one or more circuit elements, or comprises one or more circuit elements. In various embodiments, the embedded circuit element impedance 1296 may include one or more resistors, one or more inductors, one or more capacitors, one or more ferroic circuit elements (e.g., an embedded ferroic circuit element that may or may not comprise VSD material), one or more diodes, one or more transistors, one or more filters (e.g., various combinations of one or more low-pass, band-pass and high-pass filters or filter stages), any other passive or active circuit elements or electronic components, any layered interconnect with a negligible impedance, any layered interconnect with a non-negligible impedance (e.g., a layer of high dielectric material), any electrode or other conductive structure with a non-negligible impedance, and/or any combination of the foregoing.

[00210] The embedded impedance 1296 may be used in connection with the VSD material structure 1240 to provide partial or full ESD protection for an electronic component, such as the electronic component 1298 shown in FIG. 12A. In FIG. 12A, the electronic component 1298 is shown as connected to the embedded impedance through an electrode 1228. The embedded impedance 1296 is also in electrical contact with the conductive layer 1270. In the absence of the VSD material 1240, an ESD pulse or other large voltage that is applied at the conductive layer 1270 would result in propagation of a large voltage and/or current through the embedded impedance 1296 to the electronic component 1298. In the presence of the VSD material 1240, however, the vertically- switching VSDM formation 1200 switches on in response to a large voltage that exceeds the characteristic voltage of the VSD material structure 1240, and then diverts to ground through the electrode 1220 at least part of the ESD pulse that would have otherwise reached the electronic component 1298. Consequently, the vertically switching structure 1200 employs the embedded impedance 1296 to protect the electronic component 1298 from a potentially damaging ESD pulse or other overvoltage event present at the conductive layer 1270.

[00211] The architecture and operation of an electric circuit that may be used in connection with the VSD material structure 1240 as part of the vertically switching structure 1200 to provide partial or full ESD protection for an electronic component, such as the electronic component 1298 shown in FIG. 12A, is disclosed in detail in US. Application Serial No. 13/096,860, filed April 28, 2011, and titled "Embedded Protection Against Spurious Electrical Events," which is hereby incorporated by reference in its entirety. Vertical switching VSDM structures as disclosed and/or claimed in this patent may be used in connection with the embodiments disclosed and/or claimed in the US.

Application Serial No. 13/096,860 to provide enhanced protection against ESD and other overvoltage events for electronic components.

[00212] In one embodiment, the electronic component 1298 may be embedded within the VSDM formation 1200. In one embodiment, the electronic component 1298 may be embedded in the same substrate (e.g., same PCB) in which the VSDM formation 1200 is incorporated. In one embodiment, the electronic component 1298 may be surface-attached to the same substrate in which the VSDM formation 1200 is incorporated. In one embodiment, the electronic component 1298 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1200 is incorporated (e.g., the VSDM formation 1200 may be incorporated in a connector that is attached to an electronic device that comprises the electronic component 1298). In one embodiment, the VSDM formation 1200 is comprised in the packaging of the electronic component 1298, or is otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1298.

[00213] In various embodiments, the electronic component 1298 may be any one or more of the following: a semiconductor chip or another integrated circuit (IC) (e.g., a microprocessor, controller, memory chip, RF circuit, baseband processor, etc.), a light emitting diode (LED), a MEMS chip or structure, or any other component or circuit element that is disposed inside an electronic device.

[00214] In one embodiment, the embedded impedance 1296 may be implemented using a ferroic circuit element that includes a conductive structure embedded at least partially within a ferroic material. A ferroic circuit element comprising ferroic VSD material and suitable for such embedded implementations was disclosed in United States patent application 13/1 15,068, filed on May 24, 201 1, which is incorporated herein in its entirety by reference. In various embodiments, the embedded impedance 1296 may be implemented as an embedded ferroic inductor, embedded ferroic VSD material inductor, embedded ferroic capacitor, embedded ferroic VSD material capacitor, or as any other embedded ferroic circuit element or embedded ferroic VSD material circuit element.

[00215] FIG. 12B shows a VSD material formation 1202 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment. The embodiments shown in FIG. 12A and FIG. 12B are generally the same, except that in the embodiment of FIG. 12B the embedded impedance 1296 is replaced by an embedded impedance 1297, the electrode 1228 is replaced by an electrode 1229, and the electronic component 1298 is replaced by an electronic component 1299. As shown in FIG. 12B, the embedded impedance 1297 is no longer embedded in the pre-preg layer 1230, but is instead separated from the pre-preg layer 1230 by the conductive layer 1270. An optional electrode 1229 connects the embedded impedance 1297 with the electronic component 1299.

[00216] In various embodiments, the architecture, implementation and functionality of the embedded

impedance 1297 and the electronic component 1299 may be substantially the same as described in connection with the embodiment of FIG. 12A for the embedded impedance 1296 and respectively for the electronic component 1298, except that the embedded impedance 1297 and the electronic component 1299 are disposed as discussed in connection with FIG. 12B.

[00217] In one embodiment, the embedded impedance 1297 shown in FIG. 12B is not embedded within the VSDM formation 1200, but is embedded in the same substrate (e.g., same PCB) in which the VSDM formation 1200 is incorporated. In one embodiment, the embedded impedance 1297 and/or the electronic component 1299 may be surface-attached to the same substrate in which the VSDM formation 1200 is incorporated. In one embodiment, the embedded impedance 1297 and/or the electronic component 1299 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1200 is incorporated (e.g., the VSDM formation 1200 may be incorporated in a connector that is attached to an electronic device that comprises the embedded impedance 1297 and/or the electronic component 1299). In one embodiment, the VSDM formation 1200 and the embedded impedance 1297 are comprised in the packaging of the electronic component 1298, or are otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1298.

[00218] FIG. 13 shows a VSDM formation 1300 comprising a VSD material layer 1340 that may be

integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.

[00219] The VSDM formation 1300 shown in FIG. 13 comprises a number of conductive signal layers, denoted as conductive layers LI through L6, and numbered as conductive layers 1370, 1372, 1374, 1376, 1378, and 1379. These signal layers may conduct electrical signals within the PCB board, or to or from components and circuit elements attached to the PCB, or may act as ground or other voltage reference points. These signal layers are separated by a number of substantially insulative or dielectric layers built into the respective substrate device (not specifically identified in FIG. 13). For a PCB, such insulative layers may include a pre-preg filler, a core, a laminated layer, or any other similar film or structure. The VSDM formation 1300 shown in FIG. 13 is disposed along the vertical dimension of a PCB or other substrate.

[00220] The VSDM formation 1300 shown in FIG. 13 also comprises a via 1350. In various

implementations, via 1350 may be a via, a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals. The via 1350 is in electrical conduct with the layer LI 1370 and the layer L2 1372.

[00221] The VSDM formation 1300 from the embodiment of FIG. 13 further comprises a VSD material structure, shown as the VSD material structure 1340. The VSD material structure 1340 is disposed in a vertical direction and crosses multiple conductive layers of the VSDM formation 1300. As shown in FIG. 13, the VSD material structure 1340 crosses conductive layers conductive layers L2 1374 and L3 1376. In various implementations, the VSD material structure 1340 may cross two or more conductive layers or other conductive structures within a substrate, such as a PCB, a flexible circuit, or semiconductor package. In one embodiment, the VSD material structure 1340 may be produced by filling with VSD material a via (e.g., a buried via) or any other volume available within a substrate, such as a PCB, a flexible circuit, or a semiconductor package. In one embodiment, the VSD material structure 1340 is produced by making a hole (e.g., mechanically or with a laser) in a substrate and then filling that hole with VSD material. In one embodiment, the VSD material structure 1340 may be produced by depositing VSD material within an empty space created within a substrate during the manufacturing of the substrate (e.g., by creating a vertical cavity in a PCB through the alignment of preexisting gaps or holes previously produced in different adjacent layers of that PCB, and then injecting VSD material and curing the VSD material inside that cavity).

[00222] If an ESD pulse 1312 reaches layer LI 1370 (or another voltage source is applied to layer LI

1370), the respective voltage will propagate to layer L2 1372 with minimal or no losses. At layer L2 1372, the voltage produced in response to the ESD pulse 1312 reaches the VSD material structure 1340. If the voltage that reaches the VSD material structure 1340 exceeds the

characteristic voltage of the VSD material structure 1340 across a particular vertical gap, the VSD material will switch on and will become substantially conductive within that gap.

[00223] In the embodiment of FIG. 13, the conductive layer L3 1374 is connected to a ground. In other implementations, the conductive layer L3 1374 (or another conductive structure or layer that is in electrical contact with the respective VSD material structure) may be connected to another point towards which an ESD signal may be conducted, such as an arbitrary voltage reference point or a circuit element or component.

[00224] Because in the embodiment of FIG. 13 the conductive layer L3 1374 is connected to a ground and the ESD pulse 1312 propagates to conductive layer L2 1372, the effective gap that will trigger vertical switching within the VSD material structure 1340 is substantially gap 1342, with an effective thickness of substantially T, determined approximately by the vertical spacing between the conductive layer L2 1372 and the grounded layer L3 1374. The thickness T will determine at least in part the characteristic voltage of the VSD material structure 1340 (e.g., in accordance with equation Eq. 1). In some implementations, more than one VSD material structures may be stacked vertically (whether in adjacent or in physically separated layers) or may be connected horizontally (e.g., through layered interconnects), as described in this patent in connection with other embodiments.

[00225] Once the VSD material structure 1340 shown in the embodiment of FIG. 13 switches on and

becomes substantially conductive across the gap 1342, current would flow predominantly in a vertical direction across the gap 1342, between the conductive layer L2 1372 and the grounded layer L3 1374. If this happens, the VSDM formation 1300 has switched vertically.

[00226] FIG. 14 shows a VSDM formation 1400 comprising a VSD material formation 1440 that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment. In one embodiment, the representation shown in FIG. 14 is an expanded view of the VSDM formation 1300 from FIG. 13.

[00227] The VSDM formation 1400 shown in FIG. 14 comprises three conductive signal layers, denoted as conductive layers LI through L3, and numbered as conductive layers 1470, 1472, and 1474.

Conductive layer 1474 is connected to a ground. Alternatively, the conductive layer 1474 may be connected to a circuit element or component, or to another voltage reference point. These three signal layers are separated by a number of substantially insulative or dielectric layers built into the respective substrate device (not specifically identified in FIG. 14). For a PCB, such insulative layers may include a pre-preg filler, a core, a laminated layer, or any other similar film or structure. The VSDM formation 1400 shown in FIG. 14 is disposed along the vertical dimension of a PCB or other substrate.

[00228] The VSDM formation 1400 shown in FIG. 14 also comprises a via 1450. In various

implementations, via 1450 may be a via, a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals. The via 1450 is in electrical conduct with the layer LI 1470 and the layer L2 1472.

[00229] The VSDM formation 1400 from the embodiment of FIG. 14 further comprises a VSD material structure, shown as the VSD material structure 1440. The VSD material structure 1440 is disposed in a vertical direction and is in electrical contact with the conductive layers L2 1474 and L3 1476. In various implementations, the VSD material structure 1440 may cross two or more conductive layers or other conductive structures within a substrate, such as a PCB, a flexible circuit, or a semiconductor package. In one embodiment, the VSD material structure 1440 may be produced by filling with VSD material a via (e.g., a buried via) or any other volume available within a substrate, such as a PCB, a flexible circuit, or a semiconductor package.

[00230] If an ESD pulse 1412 reaches layer LI 1470 (or another voltage source is applied to layer LI

1470), the respective voltage will propagate through via 1450 to layer L2 1472 with minimal or no losses. At layer L2 1472, the voltage produced in response to the ESD pulse 1412 reaches the VSD material structure 1440. If the voltage that reaches the VSD material structure 1440 exceeds the characteristic voltage of the VSD material structure 1440 across a particular vertical gap, the VSD material will switch on and will become substantially conductive across that gap. [00231] Because in the embodiment of FIG. 14 the conductive layer L3 1474 is connected to a ground and the ESD pulse 1412 propagates to conductive layer L2 1472, the effective gap that will trigger vertical switching within the VSD material structure 1440 is substantially gap 1442, with an effective thickness of approximately T, determined substantially by the vertical spacing between the conductive layer L2 1472 and the grounded layer L3 1474. The thickness T will determine at least in part the characteristic voltage of the VSD material structure 1440 (e.g., in accordance with equation Eq. 1). In some implementations, more than one structures of VSD material may be stacked vertically (whether in adjacent or in physically separated layers) or may be connected horizontally (e.g., via layered interconnects), as described in this patent in connection with other embodiments.

[00232] When the VSD material structure 1440 shown in the embodiment of FIG. 14 switches on and

becomes substantially conductive across the gap 1442, current would flow predominantly in a vertical direction across the gap 1442, between the conductive layer L2 1472 and the grounded layer L3 1474. If this happens, the VSDM formation 1400 has switched vertically. In response to the ESD pulse 1412 (or another voltage source) applied to layer LI 1470 and having a voltage that exceeds the characteristic voltage of the VSD material structure across the gap 1442, current will flow substantially along an electrical path shown in FIG. 14 as electrical path 1490.

[00233] FIG. 15A shows a VSD material formation 1500 that is adapted to achieve vertical switching using VSD material in connection with one or more circuit elements, in accordance with an embodiment. The vertical switching VSD material formation 1500 of FIG. 15A may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events. Examples of substrate devices in which the VSD material formation 1500 may be integrated in various embodiments include a PCB, a flexible circuit, and the packaging of a semiconductor chip. FIG. 15A shows a cross section of the VSD material formation in a vertical direction of a substrate device.

[00234] The vertical switching VSD material formation 1500 of FIG. 15A is generally similar to the VSD material formation 1100 of FIG. 11, except that instead of conductive pre-preg 1 170 from the embodiment of FIG. 1 1, the embodiment of FIG. 15A incorporates two layered interconnects 1570 and 1572, connected through a circuit element 1592. The circuit element 1592 has an impedance that is non-negligible, denoted as H in FIG. 15 A. In various embodiments, the layered interconnects 1570 and 1572 may be, or may include electrodes, layered interconnects or portions of layered interconnects, conductive layers or portions of conductive layers, or any other conductive structures.

[00235] The vertical switching VSD material formation 1500 of FIG. 15A comprises a VSD material

structure 1540, which is disposed between the electrode 1520 and the layered interconnect 1572, and respectively also between the electrode 1522 and the layered interconnect 1570. The VSD material structure 1540 of the embodiment of FIG. 5 has a vertical thickness that is substantially uniform across the horizontal dimension and is approximately equal to the gap 1542, denoted as T. [00236] The layered interconnects 1570 and 1572 are disposed adjacent to a substrate layer, core 1582, which is substantially an insulator or substantially a dielectric. Additional layers may be present in a substrate device in which the VSDM formation 1500 is incorporated (e.g., one or more pre-preg layers).

[00237] In response to a voltage produced by an ESD pulse 1512 (or by a voltage source 1510) between the electrodes 1520 and 1522, the VSD material structure 1540 may switch on and become substantially conductive. The effective gap that will trigger vertical switching within the VSD material structure 1540 is substantially twice the gap 1542, with an effective thickness of approximately twice the value of T (this is because current will propagate across the gap 1542 twice, in opposite senses, when the VSDM formation 1500 switches vertically). The thickness T will determine at least in part the characteristic voltage of the VSD material structure 1540 (e.g., in accordance with equation Eq. 1). If the impedance of the element 1592 is zero or negligible, or in the absence of the element 1592, the minimum voltage that must be produced by the ESD pulse 1512 before the VSD material structure 1540 switches on is approximately equal to twice the characteristic voltage of the VSD material structure 1540 (because to complete an electric circuit between the two electrodes 1520 and 1522, current must flow twice across the gap 1542, in different vertical senses).

[00238] In the presence of an element 1592 with a non-negligible impedance, however, the minimum

voltage that must be produced by the ESD pulse 1512 before the VSD material structure 1540 switches on will be higher by a voltage that is approximately equal to the voltage drop across the element 1592. For example, if the element 1592 is a resistor, the VSD material structure 1540 will switch on and become substantially conductive when the voltage of the ESD pulse 1512 is approximately equal to twice the characteristic voltage of the VSD material structure 1540 plus the voltage drop across the element 1592.

[00239] In various embodiments, the circuit element 1592 may be, or may include one or more resistors, one or more inductors, one or more capacitors, one or more ferroic circuit elements (e.g., an embedded ferroic circuit element that may or may not comprise VSD material), one or more diodes, one or more transistors, one or more filters (e.g., various combinations of one or more low-pass, band-pass and high-pass filters or filter stages), any other passive or active circuit elements or electronic components, any layered interconnect, electrode or other conductive structure with a non- negligible impedance, and any combination of the foregoing. The circuit element 1592 may comprise a single electronic component or a combination of electronic components, and may be used in connection with the VSD material structure 1540 to provide partial or full ESD protection for an electronic device or for substrate device in which the VSDM formation 1500 is integrated.

[00240] In one embodiment, the circuit element 1592 is embedded in a substrate, such as a PCB, a flexible circuit, or the packaging of a semiconductor device. With reference to FIG. 15A, for example, the element 1592 may be embedded in a layer of a PCB in which the VSDM formation 1500 may be integrated (e.g., the circuit element 1592 may be incorporated in a core layer, in a pre-preg layer, in a laminated layer, or in any other layer of the PCB). In one embodiment, the element 1592 may be an electronic component or circuit element that is attached to a PCB in which the VSDM formation 1500 may be integrated. In one embodiment, the element 1592 may be a circuit element that is incorporated in a semiconductor chip that is protected by a packaging substrate in which a VSDM formation may be integrated.

[00241] In the embodiment of FIG. 15A, the element 1592 is illustrated as connected between the layered interconnects 1570 and 1572. In alternative or complementary embodiments, the element 1592 or other circuit elements may be disposed in other locations within a substrate or within the VSDM formation 1500. For example, the element 1592 or other circuit elements may be disposed between the electrode 1520 and the VSD material structure 1540, between the electrode 1522 and the VSD material structure 1540, in the electrical path of a voltage produced by the ESD pulse 1512 before such voltage reaches the electrode 1520 or the electrode 1522, or in electrical contact with the VSDM formation 1500 and one or more electronic components to be protected against ESD events.

[00242] In one embodiment, the element 1592 may be implemented using an embedded circuit element manufactured by embedding a conductive structure at least partially within a ferroic material, with the ferroic material being embedded at least partially within a substrate. A ferroic circuit element comprising ferroic VSD material and suitable for such embedded implementations was disclosed in United States patent application 13/1 15,068.

[00243] When the VSD material structure 1540 shown in the embodiment of FIG. 15A switches on and becomes substantially conductive across the gap 1542, current would flow predominantly in a vertical direction across the gap 1542, once between the electrode 1520 and the layered interconnect 1572, and once, in the opposite sense, between the electrode 1522 and the layered interconnect 1570.

[00244] In one embodiment, instead of the single VSD material structure 1540, the VSDM formation 1500 comprises two VSD material structures with different vertical thicknesses, such that the gap between the electrode 1522 and the layered interconnect 1570 is different from the gap between the electrode 1520 and the layered interconnect 1572.

[00245] In some implementations, more than one VSD material structures may be stacked vertically

(whether in adjacent or in physically separated layers).

[00246] For commercial implementations, the thickness T of the gap 1542 may take a range of values, depending on the formulations of the VSD material 1540, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material 1540.

Considering that the effective thickness of the VSDM formation 1500 is determined by twice the value of T, specific exemplary values for the thickness T that could be considered for

implementation in manufacturing processes include 1 mils, 0.75 mils, 0.5 mil, 0.25 mils, 0.1 mils, and smaller.. In general, smaller values for T are expected to provide lower characteristic voltages for the VSD material structure 1540, but may be more challenging to achieve consistently in commercial volume manufacturing environments.

[00247] FIG. 15B shows a VSD material formation 1502 that is adapted to achieve vertical switching using VSD material using a circuit element with a first impedance value and an embedded impedance element with a second impedance value, in accordance with an embodiment. The embodiments shown in FIG. 15A and FIG. 15B are generally the same, except that in the embodiment of FIG. 15B the element 1592 is replaced by an element 1593 and a circuit element shown as embedded impedance 1597 is embedded within the VSD material structure 1540. An electronic component 1599 is in electrical contact with the embedded impedance 1597. This electrical contact may be achieved through an optional electrode 1529.

[00248] In various embodiments, the architecture, implementation and functionality of the element 1593 is substantially the same as described in connection with the embodiment of FIG. 15A for the element 1592, except that the element 1593 has an impedance denoted as HI. The embedded impedance 1597 has an impedance denoted H2. In various embodiments, the element 1593 and the embedded impedance 1597 may or may not the same type of circuit element (e.g., they may both be inductors, or one of them may be a resistor and the other one may be a capacitor). In various embodiments, the impedances HI and H2 may or may not be the same.

[00249] In various embodiments, the architecture, implementation and functionality of the embedded

impedance 1597 and the electronic component 1599 may be substantially the same as described in connection with the embodiment of FIG. 12A for the embedded impedance 1296 and respectively for the electronic component 1298, except that the embedded impedance 1597 and the electronic component 1599 are disposed as discussed in connection with FIG. 12B and are used in connection with the vertical switching VSDM formation 1502.

[00250] As shown in FIG. 15B, the embedded impedance 1597 is incorporated at least partially within the VSD material structure 1540 and is in electrical contact with the electrode 1522. In the absence of the VSD material structure 1540, a large voltage applied at the electrode 1522 would propagate through the embedded impedance 1597 to the electronic component 1599, potentially damaging the electronic component 1599.

[00251] If the VSD material structure 1540 is present and switches on in response to a sufficiently large

ESD pulse 1512 applied to the electrode 1522, however, at least a portion of the current that would have flowed to the electronic component 1599 now flows through the VSD material 1540 to the layered interconnect 1570. As a result, the electronic component 1599 and possibly also the embedded impedance 1597 are protected from overvoltage damage.

[00252] As discussed in connection with the embodiment of FIG. 12B with respect to the embedded

impedance 1297, instead of being imbedded within the layer of VSD material 1540, the embedded impedance 1597 may alternatively be incorporated in the same substrate (e.g., same PCB) in which the VSDM formation 1502 is incorporated. In one embodiment, the embedded impedance 1597 and/or the electronic component 1599 may be surface-attached to the same substrate in which the VSDM formation 1502 is incorporated. In one embodiment, the embedded impedance 1597 and/or the electronic component 1599 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1502 is incorporated (e.g., the VSDM formation 1502 may be incorporated in a connector that is attached to an electronic device that comprises the embedded impedance 1597 and/or the electronic component 1599). In one embodiment, the VSDM formation 1502 and the embedded impedance 1597 are comprised in the packaging of the electronic component 1599, or are otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1599.

[00253] FIG. 16 shows a combination of a vertical switching VSD material formation 1600 and a

horizontal switching VSD material formation 1601 , in accordance with an embodiment. In the embodiment of FIG. 10, the VSDM formation 1000 comprises two structures of VSD material disposed in vertical layers that together switch vertically. In the embodiment of FIG. 16, the VSD material formations 1600 and 1601 combine a VSD material structure 1646 that is disposed to switch vertically across a gap 1648 and a VSD material structure 1640 that is disposed to switch horizontally across a gap 1642.

[00254] In one embodiment, the vertical switching VSD material formation 1600 and the horizontal

switching VSD material formation 1601 are incorporated within different substrates, which are connected by a connector 1628. In one embodiment, one or both of the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 are

incorporated in a flexible substrate, and the connector 1628 is a flexible connector.

[00255] In the embodiment of FIG. 16, the vertical switching VSD material formation 1600 comprises a set of two electrodes 1620 and 1622 and a VSD material structure 1646. The electrodes 1620 and 1622 are in contact with the VSD material structure 1646, which spans the vertical gap 1648 with a thickness Tl. A layered interconnect 1670 is disposed in contact with the VSD material structure 1646 opposite to the electrode 1620. The electrode 1622 shown in FIG. 16 crosses the layer of VSD material 1646 and is in direct electrical contact with the layered interconnect 1670. In an alternative embodiment, the electrode 1622 may not cross the layer of VSD material 1622 completely, in which case a second vertical gap may exist across the VSD material 1646 (having a thickness equal to, or smaller than Tl) across which vertical switching may take place.

[00256] In the embodiment of FIG. 16, the horizontal switching VSD material formation 1601 comprises two electrodes 1624 and 1626 and a VSD material structure 1640. The electrodes 1624 and 1626 are in contact with the VSD material structure 1640, which spans a vertical gap 1642 with a thickness T2. A layered interconnect 1672 is disposed in contact with the VSD material structure 1640 opposite to the electrodes 1624 and 1626. [00257] In the embodiment of FIG. 16, a conductive structure denoted as connector 1628 connects the electrode 1622 of the vertical switching VSD material formation 1600 and the electrode 1624 of the horizontal switching VSD material formation 1601. Connector 1628 may be a via, a pad, a trace, a layered interconnect, or any other structure that is designed to be conductive and to facilitate propagation of electric signals. In one embodiment, the connector 1628 is a flexible electrical connector.

[00258] The vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 of FIG. 16 may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events. An example of substrate devices in which the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 may be integrated in various embodiments include a combination of two PCBs interconnected by a flexible connector, a PCB and a semiconductor package

interconnected by a flexible connector, or two semiconductor packages interconnected by a flexible connector. Such flexible connector applications may occur in flexible electronic devices, including an electronic device that has a pivotable or mobile surface (e.g., a mobile phone or tablet with a keyboard or adjustable screen) or an electronic device that is designed to be flexible (e.g., a flexible LED display).

[00259] FIG. 16 shows a cross section of each of the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601. Each of the vertical switching VSD material formation 1600 and horizontal switching VSD material formation 1601 may be embedded in a separate substrate device, such as a PCB, flexible circuit or semiconductor package. FIG. 16 shows additional illustrative substrate layers, such as a core 1682 and a core 1683.

[00260] In one embodiment, each of the vertical switching VSD material formation 1600 and horizontal switching VSD material formation 1601 operate independently in response to an ESD pulse, such as ESD pulse 1612. For the vertical switching VSD material formation 1600, this could happen if the ESD pulse 1612 is applied at the electrode 1620 and the electrode 1622 is grounded (or is otherwise set at a particular voltage potential), or if the if the ESD pulse 1612 is applied at the electrode 1622 and the electrode 1620 is grounded (or is otherwise set at a particular voltage potential). For the horizontal switching VSD material formation 1601, this could happen if the ESD pulse 1612 is applied at the electrode 1624 and the electrode 1626 is grounded (or is otherwise set at a particular voltage potential), or if the if the ESD pulse 1612 is applied at the electrode 1626 and the electrode 1624 is grounded (or is otherwise set at a particular voltage potential).

[00261] In the embodiment shown in FIG. 16, the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 may operate cooperatively in response to an ESD pulse, such as ESD pulse 1612, if the two formations switch together. This may be achieved if the electrode 1626 is grounded (or is otherwise set at a particular voltage potential) and an ESD pulse 1612 is applied to the electrode 1620, or if the electrode 1620 is grounded (or is otherwise set at a particular voltage potential) and an ESD pulse 1612 is applied to the electrode 1626. In that case, the VSD material structure 1646 may switch vertically across the gap 1648 and the VSD material structure 1640 may switch horizontally across the gap 1642.

[00262] For the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 to switch together between the electrodes 1620 and 1626, both VSD material structures 1640 and 1648 must switch on. For this to happen, the voltage differential produced between the electrodes 1620 and 1626 in response to the ESD pulse 1612 must equal or exceed the sum of the characteristic voltages of the VSD material structures 1640 and 1648.

[00263] When both VSD material structures 1640 and 1646 switch on and the two VSD material structures become substantially conductive, current will propagate vertically across the gap 1648, and horizontally across the gap 1642.

[00264] In one embodiment, each of the VSD material structures 1640 and 1646 has a different

composition and characteristic voltage (expressed in Volts). In one embodiment, the two VSD material structures 1640 and 1646 have the same composition. The VSD material structures 1640 and 1646 may or may not have the same characteristic voltage, depending on the implementation.

[00265] For commercial implementations, the thicknesses Tl and T2 of the gap 1648 and respectively 1642 may each take a range of values, depending on the formulations of the VSD material structures 1646 and 1640, and depending on the characteristic voltage and other physical or operational properties desired for the VSDM formations 1600 and 1601. Specific exemplary values for Tl and T2 are 2 mils, 1.5 mils, 1 mil, 0.5 mil, or smaller values. In general, smaller values for T are expected to provide lower characteristic voltages for the VSD material structures 1646 and 1640.

[00266] In various embodiments, vertical switching VSDM formations as described and/or claimed in this patent may be implemented in a substrate in connection with horizontal switching formations, including as shown in FIG. 16. For example, both a vertical switching VSDM formation (such as the structure shown in FIG. 15A) and a horizontal switching VSDM formation (such as the structure shown in FIG. 2) may be embedded in a substrate, and the two VSDM formations may be used together (e.g., by connecting electrode 122 to electrode 1620) to protect a specific electronic component, or may be used independently (e.g., without directly connecting the two structures) to protect a single electronic component or different electronic components.

[00267] The embodiment of FIG. 16 further shows a circuit element denoted as embedded impedance 1696.

In various embodiments, this circuit element may be incorporated partially or completely within the vertically switching VSDM formation 1600, or may be in communication with the vertically switching VSDM formation 1600 (e.g., it may be embedded in the same PCB as the vertically switching VSDM formation 1600, or may be surface-attached to a PCB in which the vertically switching VSDM formation 1600 is incorporated). In alternative or complementary embodiments, the embedded impedance 1696 or another similar circuit element may be incorporated partially or completely within the horizontally switching VSDM formation 1601, or may be in communication with the horizontally switching VSDM formation 1601 (e.g., it may be embedded in the same PCB as the VSDM formation 1601, or may be surface-attached to a PCB in which the VSDM formation 1601 is incorporated).

[00268] In the embodiment of FIG. 16, the embedded impedance 1696 is shown as a circuit element that is embedded at least partially within the VSDM formation 1600. In particular, FIG. 16 shows the embedded impedance 1696 as being embedded at least partially within the VSD material structure 1646. In alternative or complementary embodiments, the embedded impedance 1696 may be disposed in other locations within a substrate or within the VSDM formation 1600.

[00269] In various embodiments, a circuit element embedded at least partially in a substrate, such as the embedded impedance 1696 from FIG. 16, consists of one or more circuit elements, or comprises one or more circuit elements. In various embodiments, the embedded impedance 1696 may include one or more resistors, one or more inductors, one or more capacitors, one or more ferroic circuit elements (e.g., an embedded ferroic circuit element that may or may not comprise VSD material), one or more diodes, one or more transistors, one or more filters (e.g., various combinations of one or more low-pass, band-pass and high-pass filters or filter stages), any other passive or active circuit elements or electronic components, any layered interconnect, electrode or other conductive structure with a non-negligible impedance, and any combination of the foregoing.

[00270] The embedded impedance 1696 may be used in connection with the VSD material structures 1640 and 1646 and to provide partial or full ESD protection for an electronic component, such as the electronic component 1698 shown in FIG. 16. In FIG. 16, the electronic component 1698 is shown as connected to the embedded impedance 1696 through an electrode 1629. The embedded impedance 1696 is also in electrical contact with the electrode 1620. In the absence of the VSD material 1640, an ESD pulse or other large voltage that is applied at the electrode 1620 would result in propagation of a large voltage and/or current through the embedded impedance 1696 to the electronic component 1698. In the presence of the VSD material 1648, however, the vertically- switching VSDM formation 1600 switches on as discussed above and then diverts through the layered interconnect 1670 at least part of the ESD pulse that would have otherwise reached the electronic component 1698. Consequently, the vertically switching structure 1600 employs the embedded impedance 1696 to protect the electronic component 1698 from a potentially damaging ESD pulse or other overvoltage event present at the electrode 1620.

[00271] The architecture and operation of an electric circuit that may be used in connection with the

switching VSDM formations 1600 and 1601 to provide partial or full ESD protection for an electronic component, such as the electronic component 1698 shown in FIG. 16, is disclosed in detail in US. Application Serial No. 13/096,860.

[00272] In one embodiment, the electronic component 1698 may be embedded within the VSDM formation 1600. In one embodiment, the electronic component 1698 may be embedded in the same substrate (e.g., same PCB) in which the VSDM formation 1600 is incorporated. In one embodiment, the electronic component 1698 may be surface-attached to the same substrate in which the VSDM formation 1600 is incorporated. In one embodiment, the electronic component 1698 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1600 is incorporated (e.g., the VSDM formation 1600 may be incorporated in a connector that is attached to an electronic device that comprises the electronic component 1698). In one embodiment, the VSDM formation 1600 is comprised in the packaging of the electronic component 1698, or is otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1698. In one embodiment, the electrode 1629 is a flexible connector, and the electronic component 1698 is disposed on a different substrate as part of a flexible electronic device.

[00273] In various embodiments, the architecture, implementation and functionality of the embedded

impedance 1696 and the electronic component 1698 may be substantially the same as described in connection with the embodiment of FIG. 12A for the embedded impedance 1296 and respectively for the electronic component 1298, except that the embedded impedance 1696 and the electronic component 1698 are disposed as discussed in connection with FIG. 16.

[00274] In one embodiment, the embedded impedance 1696 may be implemented using a ferroic circuit element that includes a conductive structure embedded at least partially within a ferroic material. In various embodiments, the embedded impedance 1696 may be implemented as an embedded ferroic inductor, embedded ferroic VSD material inductor, embedded ferroic capacitor, embedded ferroic VSD material capacitor, or as any other embedded ferroic circuit element or embedded ferroic VSD material circuit element.

[00275] FIG. 17 shows a VSD material formation 1700 that is adapted to achieve both vertical and

horizontal switching using VSD material, in accordance with an embodiment.

[00276] A VSD material formation that is adapted to perform both vertical and horizontal switching using VSD material is denoted a "bidirectional switching VSDM formation" or a "dual switching VSDM formation." In various embodiments, bidirectional switching VSDM formations, such as the bidirectional switching VSDM formation 1700 of FIG. 17, may be employed in similar applications and implementations as the various vertical switching VSDM formations disclosed and/or claimed in this patent, except that such bidirectional switching VSDM formations can perform an additional horizontal switching function.

[00277] In various embodiments, a bidirectional switching VSDM formation comprises a VSD material structure disposed in a manner that facilitates vertical switching as generally discussed in connection with the various vertical switching VSDM formations disclosed and/or claimed in this patent. Additionally, in such embodiments, the respective VSD material structure will also be in electrical contact with at least one electrode disposed in a manner that facilitates horizontal switching as generally discussed in connection with FIGs. 1 and/or 2. [00278] The VSD material formation 1700 shown in the embodiment of FIG. 17 comprises an electrode

1720 (e.g., a pad or a layered interconnect) that is in electrical contact with a VSD material structure 1740 (e.g., a layer of VSD material). The VSD material formation 1700 further comprises electrode 1726 and electrode 1728, which are also in electrical contact with the VSD material structure 1740. In one embodiment, the electrode 1726 may be in direct electrical contact with the layered interconnect 1770 (e.g., the electrode 1726 may cross the layer of VSD material 1740 or a via may connect the electrode 1726 to the layered interconnect 1770). In various embodiments, either one of the two electrodes 1726 and 1728 may be omitted, in which case the corresponding horizontal switching functionality provided by the omitted electrode would be absent as well.

[00279] In one embodiment, the electrode 1726 is in electrical contact with electrode 1728 (e.g., they may be part of the same conductive plane, or may be connected directly by a PCB trace or other connector).

[00280] The VSD material structure 1740 has a vertical gap 1742 with a vertical thickness Tl (e.g.,

measured in mils). A layered interconnect 1770 (e.g., an electrode or layered interconnect) is disposed in electrical contact with the VSD material structure 1740 and with the electrode 1726. A core layer 1782 is disposed adjacent to the layered interconnect 1770 and may be a layer in a substrate (e.g., a PCB or semiconductor package) in which the bidirectional switching structure 1700 is incorporated.

[00281] An optional via 1772 or any other conductive structure may cross one or more layers of the

substrate and establish electrical contact with the layered interconnect 1782. Such a via may be produced by laser drilling or through any other suitable manufacturing process.

[00282] In one embodiment, electrode 1726, electrode 1728 and via 1772 are all connected to a ground. In an alternative embodiment, the layered interconnect 1770 is not connected to a ground (e.g., via 1772 does not exist or is not connected to a ground), in which case vertical switching between the layered interconnect 1770 and the electrode 1720 would not occur. In an alternative embodiment, electrode 1726 or electrode 1728 is not connected to a ground, in which case horizontal switching between that unconnected electrode and the electrode 1720 would not occur.

[00283] The dual switching VSDM formation 1700 from the embodiment of FIG. 17 is capable of

performing both horizontal and vertical switching if electrode 1726, electrode 1728 and layered interconnect 1770 are all connected to a ground or another reference voltage potential. In that embodiment, there are three possible switching directions: (1) horizontal switching across the gap 1744 (with horizontal thickness Gl) between the electrodes 1726 and 1720; (2) horizontal switching across the gap 1746 (with horizontal thickness G2) between the electrodes 1728 and 1720, and (3) vertical switching across the gap 1742 (with vertical thickness Tl) between the electrode 1720 and the layered interconnect 1770. The gap across which the characteristic voltage of the formation of VSD material 1740 is the lowest will determine the location where switching will occur. If the formulation of VSD material is the same across the three gaps 1742, 1744 and 1746 and the characteristic voltage is correlated with the size of the gap, the switching will occur across the smallest gap.

[00284] In one embodiment, the gaps 1744 and 1746 are substantially the same and the VSDM formation 1700 switches horizontally across both the gaps 1744 and 1746. In one embodiment, the gaps 1742, 1744 and 1746 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gaps 1744 and 1746. In one embodiment, the gaps 1742 and 1744 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1744. In one embodiment, the gaps 1742 and 1746 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1746.

[00285] In some embodiments, for some formulations of VSD materials and for certain physical

characteristics of horizontal and/or vertical gaps, the characteristic voltages across such gaps may not be directly correlated with the sizes of the gaps. Consequently, in such embodiments, the characteristic voltages of two gaps with different thicknesses may still be substantially the same. In one embodiment, the characteristic voltages across gaps 1744 and 1746 are substantially the same and the VSDM formation 1700 switches horizontally across both the gaps 1744 and 1746. In one embodiment, the characteristic voltages across gaps 1742, 1744 and 1746 are substantially the same, and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gaps 1744 and 1746. In one embodiment, the characteristic voltages across gaps 1742 and 1744 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1744. In one embodiment, the characteristic voltages across gaps 1742 and 1746 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1746.

[00286] Vertical or bidirectional switching VSDM formations as described and/or claimed in this patent, such as the structure 400 of the embodiment of FIG. 4A, the VSDM formation 490 of the embodiment of FIG. 4B, the VSDM formation 500 of the embodiment of FIG. 5, the VSD material formation 600 of the embodiment of FIG. 6, the VSD material formation 900 of the embodiment of FIG. 9, the VSD material formation 1000 of the embodiment of FIG. 10, the VSD material formation 1 100 of the embodiment of FIG. 11, the VSD material formation 1200 of the embodiment of FIG. 12A, the VSD material formation 1300 of the embodiment of FIG. 13, the VSD material formation 1400 of the embodiment of FIG. 14, the VSD material formation 1500 of the embodiment of FIG. 15 A, the VSD material formation 1600 of the embodiment of FIG. 16, and the bidirectional switching structure 1700 of the embodiment of FIG. 17 may be used for ESD protection of circuit elements and components in electric circuits and devices. Examples of electronic components that may be protected by such vertical switching VSDM formations include one or more of the following: semiconductor chip or another integrated circuit (IC) (e.g., a microprocessor, controller, memory chip, RF circuit, baseband processor, etc.), light emitting diode (LED), MEMS chip or structure, or any other component or circuit element that is disposed inside an electronic device.

[00287] The architecture and operation of exemplary circuits that may utilize vertical switching VSDM formations as described and/or claimed in this patent for ESD protection are disclosed in US.

Application Serial No. 13/096,860 and in Application Serial No.13/1 15,068. While the exemplary circuits disclosed in these applications may have contemplated horizontal switching VSDM formations, those horizontal switching formations may be replaced by vertical switching VSDM formations as described and/or claimed in this patent while preserving their general ESD protection functionality.

[00288] Vertical switching VSDM formations and dual switching VSDM formations as described and/or claimed in this patent may be used for ESD protection of substrate devices, such as a layer or set of layers of a PCB, the packaging of a semiconductor device, or any other substrate to which a vertical switching VSD material formation can be attached or within which a vertical switching VSD material formation may be incorporated.

[00289] Vertical switching VSDM formations and dual switching VSDM formations as described and/or claimed in this patent may be used for ESD protection of electronic devices in which such VSDM formations are incorporated (e.g., through incorporation into a substrate comprised in such an electronic device), or to which such VSDM formations are connected (e.g., when such VSDM formations are incorporated into a connector or cable attached to such an electronic device, or when such VSDM formations are comprised into a device that is connected to such an electronic device).

[00290] Examples of electronic devices that may be protected by such vertical switching VSDM formations or dual switching VSDM formations, or that may include substrate devices, electronic components or circuit elements that may be protected by such vertical or dual switching VSDM formations, include mobile phones, electronic tablets, electronic readers, mobile computers (e.g., a laptop), desktop computers, server computers (e.g., servers, blades, multi-processor supercomputers), television sets, video displays, music players (e.g., a portable MP3 music player), personal health management devices (e.g., a pulse monitor, a cardiac monitor, a distance monitor, a temperature monitor, or any other sensor device with applications in health management), light emitting diodes (LEDs) and devices comprising LEDs, lighting modules, and any other consumer and/or industrial devices that process or otherwise store data using electrical or electromechanical signals. Other examples include satellites, military equipment, aviation instruments, and marine equipment.

[00291] In various embodiments, vertical switching VSDM formations and dual switching VSDM

formations as described and/or claimed in this patent may be incorporated in a connector. Such a connector may be attached to an electronic device to be protected against ESD or other overvoltage events. Examples of such connectors include a power connector, a USB connector, an Ethernet cable connector, an HDMI connector, or any other connector that facilitates serial, parallel or other types of data, signal or power transmission. [00292] This specification describes in detail various embodiments and implementations disclosed herein, and the present invention is open to additional embodiments and implementations, further modifications, and alternative constructions. There is no intention in this patent to limit the invention to the particular embodiments and implementations disclosed; on the contrary, this patent is intended to cover all modifications, equivalents and alternative embodiments and

implementations that fall within the scope of the claims.

[00293] As used in this specification, a set means any group of one, two or more items. Analogously, a subset means, with respect to a group of N items, any set of such items consisting of N-l or less of the respective items.

[00294] As used in this specification, the terms "include," "including," "for example," "exemplary," "e.g.," and variations thereof, are not intended to be terms of limitation, but rather are intended to be followed by the words "without limitation" or by words with a similar meaning. Definitions in this specification, and all headers, titles and subtitles, are intended to be descriptive and illustrative with the goal of facilitating comprehension, but are not intended to be limiting with respect to the scope of the inventions as recited in the claims. Each such definition is intended to also capture additional equivalent items, technologies or terms that would be known or would become known to a person of average skill in this art as equivalent or otherwise interchangeable with the respective item, technology or term so defined. Unless otherwise required by the context, the verb "may" indicates a possibility that the respective action, step or implementation may be achieved, but is not intended to establish a requirement that such action, step or implementation must occur, or that the respective action, step or implementation must be achieved in the exact manner described.

Claims

CLAIMS WHAT IS CLAIMED IS:

1. A vertical switching voltage switchable dielectric material (VSDM) formation incorporated in a substrate, the VSDM formation comprising:

a. a first conductive element disposed in a first horizontal layer of the substrate and a second conductive element disposed in a second horizontal layer of the substrate, the second horizontal layer different from the first horizontal layer;

b. a VSDM structure having a characteristic voltage and a vertical thickness, the VSDM structure disposed in a third horizontal layer of the substrate, the third horizontal layer being different from the first and second horizontal layers; and

c. a circuit element embedded at least partially in the substrate, the circuit element having an impedance; and

d. wherein the VSDM structure is adapted to become substantially conductive across its vertical thickness and to conduct electrical current between the first and the second conductive elements in response to an ESD pulse that exceeds the characteristic voltage.

2. The formation of claim 1, wherein the first conductive element is a layered interconnect, Z-axis conductive tape, silver paste, copper paste, silver coated copper layer, carbon layer, conductive epoxy, conductive polymer, electrode, pad, lead, trace, via, wire, or signal layer.

3. The formation of claim 1, wherein the vertical thickness is less than 2 mils.

4. The formation of claim 1, wherein the substrate is a PCB, a single layer or set of multiple layers of a PCB, a package of a semiconductor device, an LED substrate, an integrated circuit (IC) substrate, an interposer, a platform that connects two or more electronic components, devices or substrates, a stacked packaging format, an interposer, a wafer-level package, a package-in-package, a system-in- package, or a stacked combination of at least two packages or substrates.

5. The formation of claim 1, further comprising an electronic device.

6. The formation of claim 5, wherein the electronic device is a mobile phone, electronic tablet,

electronic reader, mobile computer, desktop computer, server computer, television set, video display, music player, personal health management device, light emitting diode (LED), device comprising at least one LED, or lighting module.

7. The formation of claim 1, wherein the circuit element comprises at least one of the following: a resistor, an inductor, a capacitor, a ferroic circuit element, a ferroic VSDM circuit element, a diode, a transistor, a filter, or a layered interconnect having an impedance.

8. An electronic device comprising a substrate and a vertical switching voltage switchable dielectric material (VSDM) formation, the VSDM formation incorporated in the substrate, the substrate comprising three different horizontal layers, the VSDM formation comprising: a. a first conductive element disposed in the first horizontal layer and a second conductive element disposed in the second horizontal layer;

b. a VSDM structure having a characteristic voltage and a vertical thickness, the VSDM

structure disposed in the third horizontal layer; and

d. wherein the VSDM structure is adapted to become substantially conductive across its vertical thickness and to conduct electrical current between the first and the second conductive elements in response to an ESD pulse that exceeds the characteristic voltage, the VSDM formation providing ESD protection to the electronic device.

9. The electronic device of claim 8, wherein the electronic device is a mobile phone, an electronic

tablet, an electronic reader, a mobile computer, a desktop computer, a server computer, a television set, a video display, a music player, a personal health management device, a light emitting diode (LED), a devices comprising at least one LED, a lighting module, a satellite, or an aviation instrument.

10. The electronic device of claim 8, wherein the first conductive element is a layered interconnect, Z- axis conductive tape, silver paste, copper paste, silver coated copper layer, carbon layer, conductive epoxy, conductive polymer, electrode, pad, lead, trace, via, wire, or signal layer.

11. The electronic device of claim 8, wherein the vertical thickness is less than 2 mils.

12. The electronic device of claim 8, wherein the substrate is a PCB, a single layer or set of multiple layers of a PCB, a package of a semiconductor device, an LED substrate, an integrated circuit (IC) substrate, an interposer, a platform that connects two or more electronic components, devices or substrates, a stacked packaging format, an interposer, a wafer-level package, a package-in-package, a system-in-package, or a stacked combination of at least two packages or substrates.

13. The electronic device of claim 8, wherein the circuit element comprises at least one of the following: a resistor, an inductor, a capacitor, a ferroic circuit element, a ferroic VSDM circuit element, a diode, a transistor, a filter, or a layered interconnect having an impedance.

14. A vertical switching voltage switchable dielectric (VSD) material structure comprising:

a. a first conductive element and a second conductive element, the first and second conductive elements disposed in a first horizontal layer;

b. a layered interconnect disposed in a second horizontal layer;

c. a third conductive element that connects the second conductive element to the layered

interconnect; and

d. a formation of VSD material disposed in a third horizontal layer, the formation of VSD

material having a characteristic voltage across a vertical gap formed between the first conductive element and the layered interconnect; e. wherein the formation of VSD material is adapted to switch vertically across the vertical gap in response to an ESD pulse that exceeds the characteristic voltage.

15. The structure of claim 14, wherein the first conductive element is a layered interconnect, Z-axis conductive tape, silver paste, copper paste, silver coated copper layer, carbon layer, conductive epoxy, conductive polymer, electrode, pad, lead, trace, via, wire, or signal layer.

16. The structure of claim 14, wherein the vertical gap is less than 2 mils.

17. The structure of claim 14, wherein the structure is incorporated in a substrate.

18. The structure of claim 17, wherein the substrate is a PCB, a single layer or set of multiple layers of a PCB, a package of a semiconductor device, an LED substrate, an integrated circuit (IC) substrate, an interposer, a platform that connects two or more electronic components, devices or substrates, a stacked packaging format, an interposer, a wafer-level package, a package-in-package, a system-in- package, or a stacked combination of at least two packages or substrates.

19. The structure of claim 14, wherein the structure is comprised in an electronic device.

20. The structure of claim 19, wherein the electronic device is a mobile phone, electronic tablet,