WO2010100741A1

WO2010100741A1 - Optical communication apparatus

Info

Publication number: WO2010100741A1
Application number: PCT/JP2009/054172
Authority: WO
Inventors: 享史竹本; 寛樹山下; 達也齊藤
Original assignee: 株式会社日立製作所
Priority date: 2009-03-05
Filing date: 2009-03-05
Publication date: 2010-09-10
Also published as: US8445832B2; US20110316632A1; JPWO2010100741A1

Abstract

Provided is an optical communication apparatus capable of operating at high speed. For example, there are included a preamplifier circuit (PREAMP1) that amplifies and converts a current signal (Iin) input from a photodiode (PD) to a voltage signal; and an operating point control circuit (VTCTL1) that controls the operation of the preamplifier circuit (PREAMP1). The preamplifier circuit (PREAMP1) includes a negative feedback path using a feedback resistor (Rf1) and comprises a level shift circuit (LS1) that performs a level shift in accordance with an operating point control signal (Vcon) and an amplifier circuit (AMP1) that is connected in the stage next to the level shift circuit (LS1) and performs a high-gain amplification. The operating point control circuit (VTCTL1) includes a replica circuit, which is constituted by the same circuit and circuit parameter as the amplifier circuit (AMP1) and the input and output of which are electrically connected to each other, and is operative to generate the operating point control signal (Vcon) such that the output DC level of the replica circuit is identical to the input DC level of the amplifier circuit (AMP1).

Description

Optical communication device

The present invention relates to an optical communication device, and more particularly, to a technique effective when applied to an optical communication device including a transimpedance amplifier (TIA).

For example, FIG. 4 and FIG. 5 shows an amplifier circuit and a TIA having a negative feedback configuration having a feedback resistor between the input and output of the amplifier circuit. FIG. In FIG. 5, this amplifier circuit is composed of three stages including a grounded gate amplification stage, a common source amplification stage, and a source follower stage. Also, FIG. 4 shows a circuit parameter setting method for reducing noise in the grounded-gate amplification stage. FIG. 5 shows a method of extending the band by using inductance for the load elements of the common-gate amplification stage and the common-source amplification stage.

FIG. 2 shows a TIA having an open loop configuration. This TIA has a configuration in which the first stage includes a grounded gate amplification stage and the subsequent stage includes an amplification stage including a grounded source stage and a grounded gate amplification stage, and the subsequent gate grounding stage is gain boosted by the grounded source stage. Each MOS transistor is formed with a large gate width, thereby improving the bandwidth.
Chih-Fan Liao, Shen-Iuan Liu, "40 Gb / s Transimpedance-AGC Amplifier and CDR Circuit for Broadband Data Receivers in 90 nm CMOS", IEEE Journal of Solid-State Circuits, Vol. 43, no. 3, March 2008, p. 642-648 C. Kromer and five others, "A 40 Gb / s Optical Receiver in 80-nm CMOS for Short-Distance High-Density Interconnects", IEEE Asian Solid-State Circuits Conference 2006 (ASSCC 2006), November 2006, p. . 395-398

FIG. 16 is a schematic diagram showing an example of the configuration of an optical communication apparatus studied as a premise of the present invention. The optical communication apparatus shown in FIG. 16 amplifies a current signal from a photodiode PD generated with optical input and converts it into a voltage signal, a post-amplifier circuit PSAMP that amplifies the output, and an output thereof. Is configured by a limit amplifier circuit LMTAMP that further amplifies the signal. Although not particularly limited, PREAMP_C converts a current signal of several tens to several hundreds of μA into a voltage signal of about 10 mV, and in response, PSAMP generates a voltage signal of 200 mV to 300 mV and receives it. LMTAMP generates a voltage signal of about 500 mV. The LMTAMP is a circuit that amplifies to a logic level of a logic circuit (not shown) such as a CDR (Clock Data Recovery) circuit that is shown later.

As described above, the current signal input to the PD is very small, and in recent years, communication exceeding several tens of Gbps is performed. Therefore, in PREAMP_C, in addition to a high amplification factor (for example, about 50 dB) and high speed. In particular, low noise is important. In PSAMP, if a sufficient input voltage signal is obtained via PREAMP_C, it is necessary to focus on high speed rather than amplification factor (for example, about 20 dB) and low noise. For example, the bandwidth is preferably about 4/3 times PREAMP_C. In FIG. 16, since PREAMP_C is a single input / output amplifier circuit and PSAMP is a differential input / output amplifier circuit, a reference voltage generation circuit VREFG that generates a reference voltage is provided at one end of PSAMP. VREFG can be realized, for example, by detecting a DC component with respect to the output of PREAMP_C using a low-pass filter. In this case, there is a concern about an increase in area.

FIGS. 17A to 17C are explanatory diagrams showing details of the preamplifier circuit PREAMP_C in FIG. As shown in FIG. 17A, PREAMP_C is a negative feedback circuit including an amplifier circuit AMP_C having a negative amplification factor (G) and a feedback resistor Rf connected between its input and output. In such PREAMP_C, when the input capacitance is Cin, as shown in FIG. 17B, the transimpedance is G / (1 + G) × Rf, and the high cut-off frequency is G / (2π · Rf · Cin). It becomes. Accordingly, if the amplification factor (G) is increased, the band can be extended.

Here, in order to increase the amplification factor (G), for example, as shown in Non-Patent Document 1, it is conceivable to provide a plurality of amplification stages (a common gate amplification stage and a common source amplification stage). However, usually, when the number of amplification stages is increased, the amount of noise is increased accordingly, and when the first stage is a grounded-gate amplification stage, although there is an advantage that the input impedance can be reduced, the sensitivity to noise is particularly increased.

Therefore, for example, it is conceivable to use a one-stage amplifier circuit with a very high amplification factor. However, if the amplification factor is high, it becomes difficult to accurately determine the operating point as shown in FIG. FIG. 17C shows an example of the characteristics of the input voltage Vi and the output voltage Vo of AMP_C. A high amplification factor means that the slope (Vo / Vi) becomes steep. In this case, for example, even when the operating point is slightly deviated from the design value due to process variations or the like, the amplification factor may change greatly, and predetermined performance may not be obtained.

On the other hand, for example, when an amplifier circuit having an open loop configuration shown in Non-Patent Document 2 is used, a low input impedance (improvement of bandwidth) can be realized by the first gate grounding stage, although there is a problem of noise. The amplification stage can improve the amplification factor (contributes to the improvement of the bandwidth). However, in the configuration of Non-Patent Document 2, since each MOS transistor is configured with a large gate width, the band may be limited due to the parasitic capacitance inside the circuit.

The present invention has been made in view of the above, and one of its purposes is to provide an optical communication apparatus capable of high-speed operation. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

Among the inventions disclosed in the present application, the outline of a typical embodiment will be briefly described as follows.

The optical communication apparatus according to the present embodiment includes a preamplifier circuit that amplifies a current signal from a photodiode and converts it into a voltage signal, and an operating point control circuit that controls the preamplifier circuit. The preamplifier circuit has a negative feedback configuration including an amplification path and a feedback path including a feedback resistor. The amplification path includes a first level shift circuit and a first amplifier circuit connected to the next stage. . The first level shift circuit performs a level shift operation in response to the first control signal from the operating point control circuit. The operating point control circuit includes a replica circuit configured with the same circuit and circuit parameters as the first amplifier circuit and electrically connected between the input and the output. The DC voltage level of the output signal of the replica circuit, The first control signal is generated so that the DC voltage level of the input signal of one amplifier circuit matches.

When such a configuration is used, the logical threshold voltage obtained from the output of the replica circuit can be set as the operating point of the first amplifier circuit, and accordingly, the first amplifier circuit has a high gain and a stable state. It becomes possible to perform an operation. As a result, the high frequency band of the preamplifier circuit having a negative feedback configuration is expanded, and the speed of the optical communication apparatus can be increased.

Here, the operating point control circuit includes, in addition to the replica circuit, for example, a first current source that generates a DC current that is the same as the DC level of the current signal from the photodiode, a replica preamplifier circuit, and a second amplifier circuit Can be configured. The replica preamplifier circuit is configured by the same circuit and circuit parameters as the preamplifier circuit, and performs an amplification operation with the direct current from the first current source as an input. The second amplifier circuit differentially amplifies the input signal of the first amplifier circuit in the replica preamplifier circuit and the output signal of the replica circuit, and outputs a first control signal. Each first level shift circuit in the preamplifier circuit and the replica preamplifier circuit receives this first control signal and performs a level shift operation.

As described above, by generating the first control signal using the operating point control circuit that simulates the DC operation of the preamplifier circuit, the operating point of the first amplifier circuit in the preamplifier circuit can always be determined stably. It becomes possible. As a result, the speed of the optical communication device can be increased. Furthermore, the output of the replica preamplifier circuit can also be used as a reference signal for a postamplifier circuit that is normally provided downstream of the preamplifier circuit. That is, the postamplifier circuit differentially amplifies the output signal from the preamplifier circuit with reference to this reference signal. This eliminates the need for a circuit (for example, a low-pass filter) that generates the reference signal. Furthermore, since the voltage level of the reference signal is an optimum value (the center of the output voltage amplitude of the preamplifier circuit), the postamplifier circuit can be increased in speed.

In the invention disclosed in the present application, the effects obtained by the representative embodiments will be briefly described, so that the speed of the optical communication apparatus can be increased.

FIG. 2 is a block diagram illustrating an exemplary configuration of a main part of the optical communication device according to the first embodiment of the present invention. FIG. 2 is a block diagram illustrating a configuration example of an operating point control circuit in the optical communication device of FIG. 1. FIG. 3 is a circuit diagram illustrating a detailed configuration example of the optical communication device including FIGS. 1 and 2. (A)-(f) is a circuit diagram which shows the detailed structural example of the amplifier circuit in the preamplifier circuit of FIG. In the optical communication apparatus by Embodiment 2 of this invention, it is a circuit diagram which shows the structural example of the principal part. In the optical communication apparatus by Embodiment 3 of this invention, the example of a structure of the principal part is shown, (a) is the block diagram, (b) shows the detailed structural example of the preamplifier circuit in (a). It is a circuit diagram. In the optical communication apparatus by Embodiment 4 of this invention, it is a block diagram which shows the structural example of the principal part. FIG. 8 is a circuit diagram showing a detailed configuration example of the amplifier circuit in the preamplifier circuit of FIG. 7. In the optical communication device according to the fifth embodiment of the present invention, (a) is a block diagram showing a configuration example of the main part, and (b) is a circuit diagram showing a detailed configuration example of the preamplifier circuit in (a). is there. In the optical communication apparatus by Embodiment 6 of this invention, it is a block diagram which shows an example of the structure. FIG. 10 illustrates an example of the post-amplifier circuit in the optical communication apparatus of FIG. 10, (a) is a conceptual diagram illustrating a configuration example thereof, and (b) is an explanatory diagram illustrating an operation example of (a). FIG. 7 shows an optical communication apparatus according to a seventh embodiment of the present invention, where (a) is a block diagram illustrating an example of the configuration, and (b) is an explanatory diagram illustrating an example of the effect of (a). FIG. 10 is a block diagram showing an example of the configuration of an optical communication device according to an eighth embodiment of the present invention. In the optical communication apparatus of FIG. 13, (a) and (b) are circuit diagrams showing detailed configuration examples of the preamplifier circuit. It is a block diagram which shows the structural example of the optical communication apparatus examined as a comparison object of FIG. 1 is a schematic diagram illustrating an example of the configuration of an optical communication device studied as a premise of the present invention. (A)-(c) is explanatory drawing which showed the detail of the preamplifier circuit in FIG.

Explanation of symbols

AMP amplifier circuit Cin input capacitance Cos capacitance DRV output driver circuit IS constant current source ISV variable current source L inductor LMAMP limit amplifier circuit LS level shift circuit MN NMOS transistor MP PMOS transistor OSCTL offset correction circuit PD photodiode PREAMP preamplifier circuit PSAMP postamplifier circuit R, Ros resistance REP replica circuit Rf feedback resistance VDD, VCC power supply voltage VREFG reference voltage generation circuit VREG regulator circuit VSS ground voltage VTCTL operation point control circuit Vc operation point correction signal Vcon operation point control signal Vos offset voltage Vref reference voltage

In the following embodiment, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant, and one is the other. Some or all of the modifications, details, supplementary explanations, and the like are related. Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges.

The circuit elements constituting each functional block of the embodiment are not particularly limited, but are formed on a semiconductor substrate such as single crystal silicon by a known integrated circuit technology such as a CMOS (complementary MOS transistor). . In the embodiment, a MOS (Metal Oxide Semiconductor) transistor is used as an example of a MISFET (Metal Insulator Semiconductor Field Effect Transistor). In the drawing, a P-channel MOS transistor (PMOS transistor) is distinguished from an N-channel MOS transistor (NMOS transistor) by adding a circle symbol to the gate. Although the connection of the substrate potential of the MOS transistor is not particularly specified in the drawing, the connection method is not particularly limited as long as the MOS transistor can operate normally.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
FIG. 1 is a block diagram illustrating a configuration example of a main part of an optical communication apparatus according to Embodiment 1 of the present invention. The optical communication device shown in FIG. 1 includes a preamplifier circuit PREAMP1 that receives a current signal Iin from a photodiode PD accompanying optical input, amplifies it, and converts it into a voltage signal, and an operating point control circuit VTCTL1. PREAMP1 is applied instead of the preamplifier circuit PREAMP_C shown in FIG.

PREAMP1 is a transimpedance amplifier (TIA) having a negative feedback configuration, and includes a level shift circuit LS1, an output thereof, an amplifier circuit AMP1 having a negative amplification factor, an output of AMP1 and an input of LS1. The feedback resistor Rf1 is connected between them. The current signal Iin from the PD is converted into a voltage signal via Rf1, and the voltage signal generated at one end of Rf1 and the output node Vout that is the output of AMP1 is approximately Iin × when the amplification factor of AMP1 is high. Rf1.

AMP1 is composed of one amplification stage, and the amplification factor (output voltage signal Vo / input voltage signal Vi) is designed to be a very large value. As a result, as described in FIGS. 16 and 17, low noise characteristics and high speed can be realized. However, as shown in FIG. 17C, when the operating point of AMP1 fluctuates due to process variations or the like, a desired gain cannot be obtained, and the high speed of PREAMP1 may be hindered.

Therefore, VTCTL1 is provided. Although details will be described later, VTCTL1 includes a replica circuit having the same circuit configuration and element parameters as AMP1, and uses this replica circuit to generate an operating point control signal Vcon for determining the operating point of AMP1. LS1 is typically composed of a source follower circuit, and shifts the DC level of a very small voltage signal accompanying Iin according to Vcon and outputs it to AMP1. As a result, the operating point of AMP1 is set to an appropriate value through this level shift. As a result, a desired gain can be obtained in AMP1, and the speed of PREAMP1 can be increased. Further, by configuring the LS1 with a gate input transistor such as a source follower circuit, it is possible to reduce noise. Although details will be described later, VTCTL1 also generates a reference voltage Vref as a DC component of the output signal at the output node Vout in addition to Vcon.

FIG. 2 is a block diagram showing a configuration example of the operating point control circuit VTCTL1 in the optical communication apparatus of FIG. The operating point control circuit VTCTL1 shown in FIG. 2 includes a level shift circuit LS2, a constant current source IS1 that is a circuit reflecting the photodiode PD of FIG. 1, and a replica preamplifier circuit that reflects the preamplifier circuit PREAMP1 of FIG. The amplifier circuit includes an amplifier circuit AMP1a and a feedback resistor Rf1a, and additionally includes an amplifier circuit AMP2 and a replica circuit REP. The connection relationship among IS1, LS2, AMP1a, and Rf1a in FIG. 2 is the same as the connection relationship between PD, LS1, AMP1, and Rf1 in FIG. AMP1a and Rf1a are composed of the same circuits (including circuit parameters) as AMP1 and Rf1 in PREAMP1 of FIG. IS1 generates the same current as the DC current of the PD in FIG.

The replica circuit REP includes an amplifier circuit AMP1b that is the same circuit (including circuit parameters) as AMP1 in FIG. 1 and AMP1a in FIG. 2, and a feedback resistor Rf2 connected between the input and output thereof. Rf2 is for preventing oscillation of the AMP 1b and electrically short-circuiting the input and output of the AMP 1b. With such a configuration, the output of the AMP 1b converges to the logical threshold level. The AMP2 performs a differential amplification operation using the output of the AMP1b as a (−) input and the output of the LS2 (an input of the AMP1a) as a (+) input, and outputs an operating point control signal Vcon. This Vcon is output to LS1 of PREAMP1 in FIG. 1 described above and also output to LS2 in FIG.

LS2 is composed of substantially the same circuit (including circuit parameters) as LS1 of PREAMP1 in FIG. 1, and level-shifts the DC voltage signal accompanying IS1 based on Vcon and outputs it to AMP1a and AMP2. The AMP2 has a sufficiently large amplification factor, and the feedback through the LS2 generates the operating point control signal Vcon having a value that matches the input voltage level to the AMP1a and the logical threshold level that is the output of the AMP1b. To do. This Vcon is supplied to LS1 in PREAMP1 in FIG. 1, and as a result, the input voltage signal Vi to AMP1 in PREAMP1 also matches the logical threshold level from AMP1b in FIG. Accordingly, since AMP1 performs an amplification operation with a logic threshold level having a high amplification factor as an operating point, it is possible to increase the speed of PREAMP1 as described above.

The difference between LS2 in FIG. 2 and LS1 in FIG. 1 is that LS2 can correct the level shift amount also by the operating point correction signal Vc. AMP1, AMP1a, and AMP1b are the same circuit, and when they are formed on the same semiconductor chip, they usually receive the same process variation. Therefore, the operating point correction signal Vc is not necessarily provided. However, for example, when these degrees of variation are different, correction can be performed using Vc. Further, the output of the AMP 1a in FIG. 2 is used as the reference voltage Vref described above.

FIG. 3 is a circuit diagram illustrating a detailed configuration example of the optical communication apparatus including FIGS. 1 and 2. In the preamplifier circuit PREAMP1 of FIG. 3, the level shift circuit LS1 is a source follower circuit including an NMMOS transistor MN20 and a variable current source ISV1 connected to the source thereof. In the MN20, a photodiode PD and a feedback resistor Rf1 are connected in parallel to a gate, and an output signal Vth is output from a source. The current value of the ISV1 is controlled according to the operating point control signal Vcon, and the DC level of Vth is controlled accordingly. The amplifier circuit AMP1 is composed of a CMOS inverter circuit composed of a PMOS transistor MP10 and an NMOS transistor MN10, and operates with Vth from LS1 as an input. The output of AMP1 is connected to the output node Vout and is connected to the gate of MN20 via the feedback resistor Rf1.

In the operating point control circuit VTCTL1 of FIG. 3, the level shift circuit LS2 is a source follower circuit including an NMOS transistor MN20a and two variable current sources ISV1a and ISV2 connected to the source thereof. The MN 20a has the same circuit parameters as those of the MN 20 described above, a constant current source IS1 and a feedback resistor Rf1a are connected in parallel to the gate, and an output signal Vth ′ is output from the source. IS1 is set to a DC level current value Ib in the PD current signal Iin, as shown in FIG. The ISV 1 a has the same circuit parameters as the ISV 1 described above, and its current value is controlled according to Vcon, and accordingly, the DC level of Vth ′ is controlled. The current value of the ISV2 is controlled according to the operating point correction signal Vc, and the DC level of Vth ′ is finely adjusted.

The amplifier circuit AMP1a is composed of a CMOS inverter circuit including a PMOS transistor MP10a and an NMOS transistor MN10a, and is formed with the same circuit parameters as the CMOS inverter circuit of AMP1. The AMP 1a operates with Vth 'from the LS2 as an input, and a reference voltage Vref as an output is input to the gate of the MN 20a via the feedback resistor Rf1a. The replica circuit REP includes a CMOS inverter circuit composed of a PMOS transistor MP10b and an NMOS transistor MN10b, and a feedback resistor Rf2 connected between its input and output. This CMOS inverter circuit is the same circuit as the CMOS inverter circuit of AMP1. Formed with parameters. The AMP2 receives the output signal Vth ″ from the REP CMOS inverter circuit and the output signal Vth ′ of the LS2 and outputs a control signal Vcon.

As shown in FIG. 3, by configuring the amplifier circuit AMP1 in the preamplifier circuit PREAMP1 with a single-stage CMOS inverter circuit, high gain and low noise can be achieved. Further, the noise can be reduced by configuring the level shift circuit LS1 in the PREAMP1 with a source follower circuit. Therefore, as described above, by appropriately determining the operating point of the AMP1 using the operating point control circuit VTCTL1, it is possible to realize high speed and low noise of the preamplifier circuit.

4A to 4F are circuit diagrams showing different detailed configuration examples of the amplifier circuit AMP1 in the preamplifier circuit PREAMP1 of FIG. The amplifier circuit shown in FIG. 4A is formed of a CMOS inverter circuit including a PMOS transistor MP40 and an NMOS transistor MN40, as in the case of FIG. The amplifier circuit shown in FIG. 4 (b) is a CMOS inverter circuit composed of MP40 and MN40 similar to FIG. 4 (a), and further gates a fixed voltage Vb between its output node (Vo) and the drain of MN40. In this configuration, a grounded NMOS transistor MN41 as a voltage is inserted. MN40 and MN41 are so-called cascode connections. As a result, the mirror capacitance (gate-drain capacitance Cgd) of the MN 40 is reduced and the output impedance at the drain of the MN 41 is increased, so that the high frequency characteristics of the amplifier circuit itself can be improved and the gain can be increased.

The amplifier circuit shown in FIG. 4 (c) is a CMOS inverter circuit with cascode connection composed of MP40, MN40, and MN41 similar to FIG. 4 (b), and further between the output node (Vo) and the drain of MP40. The inductor L1 is inserted. In order to increase the gain of the amplifier circuit, it is necessary to increase the mutual conductance gm by designing the size of each MOS transistor to be large. If so, there is a concern that the bandwidth will decrease due to its own parasitic capacitance. In particular, there is a problem of bandwidth reduction associated with the PMOS transistor MP40 having a lower drive capability than the NMOS transistor. Therefore, when L1 is provided, the gain can be improved (ie peaking) as the impedance increases in the high frequency region, so that the high frequency characteristics can be further improved as compared with the case of FIG. 4B.

The amplifier circuits shown in FIGS. 4D to 4F have a configuration in which the PMOS transistor MP40 in the amplifier circuits shown in FIGS. 4A to 4C is replaced with a resistor R1. As described above, since the PMOS transistor has a low driving capability, by replacing it with a resistor as shown in FIGS. 4D to 4F, it is possible to further improve the high frequency characteristics and increase the gain.

As described above, each amplifier circuit shown in FIGS. 4A to 4F (particularly FIGS. 4B, 4C, 4E, and 4F) is configured to achieve high gain in one stage. It has become. Therefore, it is desirable to determine the operating point optimally in order to exhibit stable amplification characteristics, and it is beneficial to use the configuration example shown in FIGS. When the amplifier circuit of FIGS. 4B to 4F is applied to the configuration example of FIG. 2, each amplifier of FIG. 3 is similar to the configuration example of FIG. 3 to which the amplifier circuit of FIG. 4A is applied. The circuits AMP1, AMP1a, and AMP1b may be replaced with the amplifier circuits shown in FIGS.

As described above, typically, high-speed operation can be realized by using the optical communication apparatus according to the first embodiment. Here, in order to detect the DC components of the input (Vi) and output (Vo) of the amplifier circuit AMP1 in the preamplifier circuit PREAMP1, an operating point control circuit VTCTL1 that simulates the DC operation of the entire PREAMP1 as shown in FIG. 2 is used. It was. Since VTCTL1 performs a DC operation, the value of the operating point control signal Vcon is also constant, and the operating point of AMP1 in PREAMP1 can always be kept constant. Here, in some cases, for example, it is conceivable that the VTCTL1 is configured only by the amplifier circuit AMP2 and the replica circuit REP of FIG. That is, the (+) input node of AMP2 is connected to the output node of the level shift circuit LS1 in PREAMP1, and LS1 is controlled by Vcon from AMP2. When such a configuration example is used, the operating point cannot be stabilized as much as the configuration example of FIG. 2 and the reference voltage Vref cannot be generated, but the control of the operating point can be realized to some extent with a small circuit area. .

(Embodiment 2)
In the second embodiment, a modification of FIG. 3 described above will be described. FIG. 5 is a circuit diagram showing a configuration example of the main part of the optical communication apparatus according to the second embodiment of the present invention. The optical communication device shown in FIG. 5 is different from the configuration example of FIG. 3 in the circuit configuration in the level shift circuit LS2 ′ in the operating point control circuit VTCTL1, and further includes regulator circuits VREG1 and VREG2. Is different. Other configurations are the same as those in the configuration example of FIG. 3, and thus detailed description thereof is omitted.

LS2 'in VTCTL1 shown in FIG. 5 has a configuration in which variable current source ISV2 is deleted from LS2 in VTCTL1 shown in FIG. In FIG. 5, VREG1 supplies a power supply voltage to the amplifier circuit AMP1 in the preamplifier circuit PREAMP1, and VREG2 supplies a power supply voltage to the amplifier circuit AMP1a in the operating point control circuit VTCTL1. In the configuration example of FIG. 3 described above, the process variation of each amplifier circuit AMP1, AMP1a, and AMP1b is corrected by supplying the operating point correction signal Vc to the ISV2. However, in the configuration example of FIG. The above-described correction is performed by finely adjusting the power supply voltage of the AMP 1a.

Therefore, as in the case of FIG. 3, even if the characteristics of the amplifier circuits AMP1, AMP1a, and AMP1b are slightly different due to process variations, it is possible to make corrections so that they are the same. As a result, high-speed operation of the optical communication device can be realized.

(Embodiment 3)
In the third embodiment, a modification of FIG. 1 described above will be described. 6 shows an example of the configuration of the main part of an optical communication apparatus according to Embodiment 3 of the present invention. FIG. 6A is a block diagram thereof, and FIG. 6B is a detailed diagram of a preamplifier circuit in FIG. It is a circuit diagram which shows a structural example. The optical communication apparatus shown in FIG. 6A includes a preamplifier circuit PREAMP2 instead of the preamplifier circuit PREAMP1 of FIG. Compared with PREAMP1, PREAMP2 has a level shift circuit LS3 connected to the output of the amplifier circuit AMP1, and the output of this LS3 serves as an output node Vout and is fed back to the level shift circuit LS1 via a feedback resistor Rf1. The point is different. Since other configurations are the same as those in FIG. 1, detailed description thereof is omitted.

As shown in FIG. 6B, PREAMP2 includes a level shift circuit LS1, an amplifier circuit AMP1 connected to the subsequent stage, a level shift circuit LS3 connected to the subsequent stage, and a feedback that feeds back the output to LS1. A resistor Rf1 is provided. Similarly to FIG. 3, LS1 and AMP1 are each composed of a source follower circuit and a CMOS inverter circuit. The LS3 includes a source follower circuit including an NMOS transistor MN30 having the output of the CMOS inverter circuit as a gate input and a constant current source IS2 connected to the source of the MN30.

The AMP1 CMOS inverter circuit has a large transistor size for high gain. Therefore, as shown in FIG. 6B, in order to drive the post-amplifier circuit PSAMP connected to the subsequent stage of PREAMP2 at high speed, the load of the CMOS inverter circuit of AMP1 and the input capacitor Cin1 of PSAMP are separated. It is desirable. Furthermore, in order to operate PSAMP at high speed, it is desirable to appropriately adjust its operating point. Therefore, by providing the level shift circuit LS3 composed of a source follower circuit, the load of AMP1 and the CAMP1 of PSAMP can be separated, and the operating point of PSAMP can be adjusted appropriately.

As described above, typically, high-speed operation can be realized by using the optical communication apparatus according to the third embodiment. Although an example in which a CMOS inverter circuit is used as the amplifier circuit AMP1 is shown here, it is of course possible to use circuits as shown in FIGS. 4B to 4F instead.

(Embodiment 4)
In the fourth embodiment, another modification of FIG. 1 described above will be described. FIG. 7 is a block diagram showing a configuration example of the main part of an optical communication apparatus according to Embodiment 4 of the present invention. The optical communication apparatus shown in FIG. 7 includes a preamplifier circuit PREAMP3 instead of the preamplifier circuit PREAMP1 of FIG. The PREAMP3 is different from the PREAMP1 in that an amplifier circuit AMP3 having a plurality of stages is provided instead of the one-stage amplifier circuit AMP1 in the PREAMP1. Since other configurations are the same as those in FIG. 1, detailed description thereof is omitted. AMP3 is configured to have a negative gain as a whole because PREAMP3 has a negative feedback configuration.

As described above, the amplifier circuit in the preamplifier circuit is preferably configured with a small number of stages (preferably one stage) in order to reduce noise. However, in practice, it may be difficult to achieve high gain and high speed with a single-stage configuration due to the influence of parasitic capacitance in the amplifier circuit. High speed may be required. In such a case, a configuration example as shown in FIG. 7 is useful.

FIG. 8 is a circuit diagram showing a detailed configuration example of the amplifier circuit AMP3 in the preamplifier circuit PREAMP3 of FIG. The amplifier circuit AMP3 shown in FIG. 8 is configured by a CMOS inverter circuit composed of a PMOS transistor MP50 and an NMOS transistor MN50, and a subsequent stage connected to a CMOS inverter circuit composed of an NMOS transistor MN51, a constant current source IS7, and a resistor R2. The In the MN 51, a fixed voltage Vb is applied to the gate, and a source is connected to the IS7 and in parallel to the output of the preceding CMOS inverter circuit. The drain of MN51 is connected to the resistor R2 and outputs the output voltage signal Vo.

When such a configuration is used, a high gain amplifier circuit can be realized by the front stage CMOS inverter circuit and the rear stage grounded gate amplification stage. As described above, since the operating point control circuit VTCTL1 in FIG. 7 (FIG. 2) optimally determines the input operating point, the preceding stage CMOS inverter circuit performs a stable operation at a desired amplification factor. Since this CMOS inverter circuit is provided with a grounded-gate amplification stage in the subsequent stage, the high-speed performance should be emphasized and the parasitic component may be designed to be small. Note that VTCTL1 in the case of using the configuration example of FIG. 8 may be configured by replacing each amplifier circuit AMP1, AMP1a, AMP1b with the amplifier circuit of FIG. 8 in the configuration example of FIG.

As described above, typically, high-speed operation can be realized by using the optical communication apparatus according to the fourth embodiment. Here, the amplifier circuit AMP3 is configured by a CMOS inverter circuit and a grounded-gate amplification stage, but is not limited to this, and various configurations are applicable as long as a negative amplification factor is obtained. For example, a configuration in which each amplifier circuit shown in FIG. 4 and a grounded gate amplification stage are combined can be used, and in some cases, it can be configured by a three-stage CMOS inverter circuit.

(Embodiment 5)
In the fifth embodiment, another modification of FIG. 1 described above will be described. FIG. 9A is a block diagram showing a configuration example of the main part of the optical communication apparatus according to the fifth embodiment of the present invention, and FIG. 9B shows the preamplifier circuit PREAMP4 in FIG. 9A. It is a circuit diagram which shows the detailed structural example. The optical communication apparatus shown in FIG. 9A includes a preamplifier circuit PREAMP4 instead of the preamplifier circuit PREAMP1 of FIG. Compared with PREAMP1, PREAMP4 includes an amplifier circuit AMP4 in front of the level shift circuit LS1 in PREAMP1, and this AMP4 receives a current signal Iin from the photodiode PD and a feedback signal from the feedback resistor Rf1. Is different. Since other configurations are the same as those in FIG. 1, detailed description thereof is omitted. AMP4 is configured to have a positive gain.

As shown in FIG. 9B, the AMP4 is a grounded-gate amplification stage including an NMOS transistor MN60, a constant current source IS3, an inductor L2, and a resistor R3. MN60 has a fixed voltage Vb applied to its gate, and its source is connected in parallel to one end of Rf1 and IS3 and receives current signal Iin from PD. R3 and L2 are connected in series between the power supply voltage VCC and the drain of MN60. This L2 functions for peaking as described in FIG.

The level shift circuit LS1 provided at the subsequent stage of the AMP4 is a source follower circuit including an NMOS transistor MN20 and a variable current source ISV1 connected to the source thereof. MN20 receives an output signal from the drain of MN60 at its gate. The current value of ISV1 is controlled by the operating point control signal Vcon described above. AMP1 provided in the subsequent stage of LS1 is configured by a CMOS inverter circuit including a PMOS transistor MP10 and an NMOS transistor MN10. This CMOS inverter circuit performs an amplification operation using an output signal from the source of the MN 20 as an input voltage signal Vi, and outputs an output voltage signal Vo. The output from this CMOS inverter circuit is fed back to the input of AMP4 via Rf1.

When such a configuration is used, since the current signal Iin from the PD is received by the AMP4 including the grounded gate amplification stage, the input impedance can be reduced and the high frequency characteristics can be improved. Further, as described above, the output signal is level-shifted by LS1 so as to be an optimum operating point in AMP1 (CMOS inverter circuit). Therefore, AMP1 performs a stable operation at a desired amplification factor. At this time, since the AMP1 is equipped with a grounded-gate amplification stage in the previous stage, it may be designed so that the parasitic component is reduced with emphasis on high speed. Note that VTCTL1 in the case of using the configuration example of FIG. 9B may be configured such that AMP4 is inserted into the previous stage of LS1 in PREAMP1 and the previous stage of LS2 in VTCTL1 in the configuration example of FIG. .

As described above, typically, high-speed operation can be realized by using the optical communication apparatus according to the fifth embodiment. Although an example in which a CMOS inverter circuit is used as the amplifier circuit AMP1 is shown here, it is of course possible to use circuits as shown in FIGS. 4B to 4F instead.

(Embodiment 6)
In the sixth embodiment, an overall configuration example when an optical communication device is constructed using the configuration example of FIG. 1 will be described. FIG. 10 is a block diagram showing an example of the configuration of an optical communication apparatus according to Embodiment 6 of the present invention. The optical communication apparatus shown in FIG. 10 includes a post-amplifier circuit PSAMP and a limit amplifier circuit LMAMP in the subsequent stage of PREAMP1 in addition to the photodiode PD, preamplifier circuit PREAMP1, and operating point control circuit VTCTL1 shown in FIG. Yes. The optical communication device of FIG. 10 has a configuration in which the preamplifier circuit PREAMP_C is replaced with PREAMP1, VTCTL1 is added, and the reference voltage generation circuit VREFG is deleted, as compared with the optical communication device of FIG. 16 described above. Yes.

As described in FIG. 16, VREFG is a circuit that detects the DC component of the output of PREAMP_C by a low-pass filter because PSAMP has a differential input / output configuration. However, in the configuration example of FIG. 10, as shown in FIG. 2 and the like, since VTCTL1 can generate the DC component of the output of PREAMP1 as the reference voltage Vref, VREFG is obtained by using this Vref. It becomes unnecessary. Accordingly, VREFG, which normally occupies a large area, can be reduced, so that the circuit area can be reduced. Furthermore, by generating Vref by VTCTL1 that performs DC-like operation, it is possible to generate a more stable reference voltage compared to the case of using a low-pass filter, resulting in high-speed amplification operation by PSAMP. It becomes possible to contribute.

FIG. 11 shows an example of the post-amplifier circuit PSAMP in the optical communication apparatus of FIG. 10, (a) is a conceptual diagram showing an example of the configuration, and (b) is an explanation showing an example of the operation of (a). FIG. The post-amplifier circuit PSAMP shown in FIG. 11A is configured by amplifier circuits AMP10a and AMP10b having a differential configuration. The AMP 10a includes, for example, an inductor similar to that shown in FIG. 4 (f) or the like in a general differential amplifier circuit including two transistors serving as a differential pair and a load element connected to each transistor. The peaking can be performed by using an element. As shown in FIG. 10, the reference voltage Vref from the operating point control circuit VTCTL1 is input to one of the transistors forming the differential pair. In addition, the AMP 10b connected to the subsequent stage of the AMP 10a is a general differential amplifier circuit without particularly having a peaking function.

When such a configuration is used, as shown in FIG. 11B, the AMP 10a in the previous stage has a low gain in the low to medium frequency band, but has a high gain in accordance with the peaking function in the high frequency band. On the other hand, although the AMP 10b in the subsequent stage has a high gain in the low to medium frequency band, the gain decreases with a parasitic component in the high frequency band. Therefore, by combining these amplifier circuits AMP10a and AMP10b, it is possible to ensure a certain amount of gain and a certain frequency band as a whole.

As described above, typically, high-speed operation can be realized by using the optical communication apparatus according to the sixth embodiment. Although the configuration example of FIG. 1 is used here as the preamplifier circuit, the configuration examples of FIG. 6, FIG. 7, FIG. 9, and the like can also be used.

(Embodiment 7)
In the seventh embodiment, a configuration example in which the performance of the post-amplifier circuit PSAMP is further improved with respect to the above-described optical communication apparatus of FIG. 10 will be described. 12A and 12B show an optical communication apparatus according to Embodiment 7 of the present invention. FIG. 12A is a block diagram showing a configuration example thereof, and FIG. 12B is an explanatory diagram showing an example of the effect of FIG. . FIG. 15 is a block diagram illustrating a configuration example of an optical communication apparatus studied as a comparison target in FIG.

First, the optical communication apparatus shown in FIG. 15 has a configuration in which an offset correction circuit OSCTL_C is added between the input and output of the post-amplifier circuit PSAMP in the optical communication apparatus shown in FIG. The PSAMP includes a plurality of stages of differential amplifier circuits, and includes an amplifier circuit AMP10 having an overall gain of Apa. The AMP 10 normally includes an offset voltage Vos that becomes a noise component due to process variations and the like. OSCTL_C is provided to reduce this Vos. OSCTL_C is a gain between a low-pass filter that detects a DC component for each of the (+) output and (−) output from the AMP 10 and a (+) output and (−) output through the low-pass filter. An amplifier circuit AMP11 for differential amplification at Aos is provided. The (+) output and (−) output of the AMP 11 are negatively fed back toward the (−) input and the (+) input of the AMP 10. The low-pass filter includes a resistor Ros connected in series between the output of the AMP 10 and the input of the AMP 11 and a capacitor Cos connected between the input of the AMP 11 and the ground voltage VSS.

As described in FIG. 16, the amplitude of the output voltage from the preamplifier circuit PREAMP_C is as small as about 10 mV. For example, when an offset voltage Vos of the same level is generated in the postamplifier circuit PSAMP, a desired operation can be obtained. It is important to compensate for this. Therefore, when the configuration example as shown in FIG. 15 is used, the offset voltage Vos serving as the DC component is compressed to approximately 1 / (Apa · Aos) at the output of the AMP 10 and can be reduced to, for example, about 100 μV or less. Become. On the other hand, the input / output signal of the AMP 10 serving as an AC component hardly receives negative feedback in accordance with the cutoff by the low-pass filter in the OSCTL_C. Therefore, the output signal of the AMP 10 is the input signal amplified by Apa. Further, the low cutoff frequency of the output signal of the AMP 10 is approximately Apa · Aos / (2π · Ros · Cos).

However, in this case, if the low-frequency cutoff frequency is too high, waveform distortion or the like may occur in the output signal of the AMP 10. The PSAMP is desirably configured to be able to amplify a low-frequency signal with a low offset, for example, about 100 kHz. That is, ideally, the low-pass filter in OSCTL_C is desirably configured to pass only the DC component. For this purpose, for example, it is conceivable that Cos or the like is formed to be large. However, if this is done, the circuit area is increased, and it may be difficult to form it in the semiconductor chip in practice.

Therefore, it is useful to use the configuration example of FIG. The optical communication apparatus shown in FIG. 12 has a configuration example in which an offset correction circuit OSCTL is added between the input and output of the post-amplifier circuit PSAMP in addition to the configuration example of FIG. The OSCTL in FIG. 12 is different from the OSCTL_C in FIG. 15 in that a capacitor Cos is provided between the input and output of the amplifier circuit AMP11. Then, since Cos functions as a mirror capacitor, the low-frequency cutoff frequency in the output signal of the AMP 10 in the PSAMP is approximately Apa / (2π · Ros · Cos). Therefore, as shown in FIG. 12B, the low-frequency cutoff frequency is reduced by the gain Aos of the AMP11, so that the above-described problem can be solved.

As described above, by using the optical communication apparatus of the seventh embodiment, typically, the offset voltage in the post-amplifier circuit can be reduced and the frequency band can be expanded.

(Embodiment 8)
In the eighth embodiment, an example of using a preamplifier circuit having an open loop configuration instead of a negative feedback configuration preamplifier circuit as a preamplifier circuit will be described. FIG. 13 is a block diagram showing an example of the configuration of an optical communication apparatus according to Embodiment 8 of the present invention. The optical communication apparatus shown in FIG. 13 includes an open-loop preamplifier circuit PREAMP_OP that receives a current signal from a photodiode PD, a post-amplifier circuit PSAMP, a limit amplifier circuit LMTAMP, and an output driver circuit that are sequentially connected to the subsequent stage. It is composed of a DRV, a reference voltage generation circuit VREFG, an offset correction circuit OSCTL, and the like.

The configuration and operation of VREFG, PSAMP, and LMTAMP are the same as those described with reference to FIG. The configuration and operation of the OSCTL are the same as those described with reference to FIG. The DRV is installed to drive an external load. If the preamplifier circuit is formed as an independent chip, it is desirable that the DRV be provided in this way to perform external driving. However, when the preamplifier circuit is formed on the same chip including the subsequent circuit of the preamplifier circuit, the DRV is particularly preferable. May not be provided.

14A and 14B are circuit diagrams showing detailed configuration examples of the preamplifier circuit PREAMP_OP in the optical communication apparatus of FIG. The preamplifier circuit PREAMP_OP1 shown in FIG. 14A includes NMOS transistors MN70 to MN74, resistors R4 and R5, and constant current sources IS4 and IS5. MN70, MN71 and R5 constitute a grounded source amplification stage with a cascode connection, MN72, MN73, R4 and IS4 constitute a gate grounded amplification stage with a cascode connection, and MN74 and IS5 constitute a source follower stage. Constitute.

The MN 70 has a source connected to the ground voltage VSS, a gate connected to the input node of the current signal Iin from the PD, and a drain connected to the source of the MN 71. In MN71, a fixed voltage Vb1 is applied to the gate, and the drain is connected to one end of R5 and the gate of MN72. The source of MN 72 is connected to the input node of Iin, and the drain is connected to the source of MN 73. IS4 is connected between the input node of Iin and VSS. In MN73, a fixed voltage Vb2 is applied to the gate, and the drain is connected to one end of R4 and the gate of MN74. The MN 74 has a source connected to the output node Vout and a drain connected to the power supply voltage VCC. IS5 is connected between Vout and VSS. The other ends of R4 and R5 are connected to VCC.

In the configuration example of FIG. 14A, Iin is amplified and converted into a voltage signal at the grounded gate amplification stage, and then output from Vout as a voltage signal through the source follower stage. At the time of amplification at the grounded-gate amplification stage, the gain of the MN 72 is boosted by the output from the common-source amplification stage, so that high gain amplification is possible. On the other hand, in such a preamplifier circuit having an open loop configuration, the effect of reducing the input impedance associated with the negative feedback configuration as shown in FIG. 1 or the like cannot be obtained. Therefore, by increasing the transistor sizes of MN70 and MN72, It is desirable to lower as much as possible.

However, in this case, the parasitic capacitances of the MN 70 and MN 72 become large, and there is a risk that the speeding up may be hindered due to a decrease in the pole. Therefore, it is beneficial to have MN71 and MN73 that form cascode connections with MN70 and MN72, respectively. MN71 and MN73 are each formed with a small transistor size, and reduce the mirror effect of the gate-drain capacitance Cgd of MN70 and MN72. Therefore, an increase in input capacitance at each amplification stage is suppressed, and a high-speed preamplifier circuit can be realized.

Further, the preamplifier circuit PREAMP_OP2 shown in FIG. 14B is different from the PREAMP_OP1 shown in FIG. 14A in that an inductor L3 is inserted between the drain of the MN71 and the gate of the MN72. Other configurations are the same as those in FIG. In the circuit configuration of FIG. 14A, the gain is increased by the negative feedback loop of the MNs 70 to 72, and the speed is increased by reducing the input impedance. As shown in FIG. 14 (b), by inserting an inductor L3 in this loop, it is possible to further increase the gain and to realize a higher speed.

As described above, by using the optical communication apparatus according to the eighth embodiment, the parasitic components in the circuit are typically reduced as compared with the configuration shown in Non-Patent Document 2, and accordingly, high-speed operation is achieved. It becomes feasible.

As described above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention.

The optical communication apparatus according to the present embodiment is particularly effective when applied to a circuit of a receiving unit thereof in an optical communication system having a communication speed exceeding several tens of Gbps.

Claims

A preamplifier circuit including an input node to which a current signal from a photodiode is input and an output node, amplifying the current signal from the input node and converting the current signal to a voltage signal and outputting the voltage signal to the output node;
A first control circuit for controlling the preamplifier circuit;
The preamplifier circuit is
A first level shift circuit that is provided on a first path between the input node and the output node and that shifts a voltage level of a signal input via the input node by an amount corresponding to a first control signal;
A first amplifier circuit connected to the next stage of the first level shift circuit on the first path, amplifying an output signal of the first level shift circuit with a negative gain, and outputting the amplified signal toward the output node;
A feedback resistor provided on a second path connected in parallel with the first path between the input node and the output node;
The first control circuit includes a replica circuit configured with the same circuit and circuit parameters as the first amplifier circuit and electrically connected between input and output, and a DC voltage level of an output signal of the replica circuit The optical communication device generates the first control signal so that a DC voltage level of an input signal of the first amplifier circuit matches.
The optical communication device according to claim 1.
The first control circuit includes:
A first current source that generates a direct current equal to the direct current level of the current signal from the photodiode;
A replica preamplifier circuit configured with the same circuit and circuit parameters as the preamplifier circuit, and performing an amplification operation using a direct current from the first current source as an input;
A second amplifier circuit that performs an amplification operation using the input signal of the first amplifier circuit in the replica preamplifier circuit and the output signal of the replica circuit as a differential input and outputs the first control signal;
An optical communication apparatus configured to operate in response to the first control signal, the first level shift circuit in the preamplifier circuit and the first level shift circuit in the replica preamplifier circuit. .
The optical communication device according to claim 2,
The first level shift circuit in the replica preamplifier circuit can receive a second control signal in addition to the first control signal, and can finely adjust the level shift amount corresponding to the second control signal. An optical communication device characterized in that
The optical communication device according to claim 1.
The first level shift circuit is a source follower circuit including a first variable current source whose current value is adjusted according to the first control signal,
The optical communication apparatus, wherein the first amplifier circuit is a CMOS inverter circuit.
The optical communication device according to claim 1.
The first level shift circuit is a source follower circuit including a first variable current source whose current value is adjusted according to the first control signal,
The first amplifier circuit includes a first NMOS transistor, a second NMOS transistor whose source is cascode-connected to the drain of the first NMOS transistor, and a first PMOS transistor whose drain is connected to the drain of the second NMOS transistor. An optical communication device characterized by being a CMOS inverter circuit.
The optical communication device according to claim 5.
The cascode-connected CMOS inverter circuit further has a configuration in which a first inductor for peaking is inserted between the drain of the first PMOS transistor and the drain of the second NMOS transistor. Communication device.
The optical communication device according to claim 1.
The first level shift circuit is a source follower circuit including a first variable current source whose current value is adjusted according to the first control signal,
The optical communication device, wherein the first amplifier circuit is a grounded source amplifier circuit including a third NMOS transistor and a first resistor connected to a drain of the third NMOS transistor.
The optical communication device according to claim 1.
The first level shift circuit is a source follower circuit including a first variable current source whose current value is adjusted according to the first control signal,
The first amplifier circuit has a cascode connection including a fourth NMOS transistor, a fifth NMOS transistor whose source is cascode-connected to the drain of the fourth NMOS transistor, and a second resistor whose one end is connected to the drain of the fifth NMOS transistor. An optical communication device characterized by being a common-source amplifier circuit.
The optical communication apparatus according to claim 8.
The grounded-source amplifier circuit with cascode connection is further characterized in that a second inductor for peaking is inserted between one end of the second resistor and the drain of the fifth NMOS transistor. Optical communication device.
A preamplifier circuit including an input node to which a current signal from a photodiode is input and an output node, amplifying the current signal from the input node and converting the current signal to a voltage signal and outputting the voltage signal to the output node;
A post-amplifier circuit connected to the next stage of the pre-amplifier circuit and differentially amplifying an output signal from the pre-amplifier circuit;
A first control circuit for supplying a control signal to the preamplifier circuit and the postamplifier circuit,
The preamplifier circuit is
A first level shift circuit that is provided on a first path between the input node and the output node and that shifts a voltage level of a signal input via the input node by an amount corresponding to a first control signal;
A first amplifier circuit connected to the next stage of the first level shift circuit on the first path, amplifying an output signal of the first level shift circuit with a negative gain, and outputting the amplified signal toward the output node;
A feedback resistor provided on a second path connected in parallel with the first path between the input node and the output node;
The first control circuit includes:
A replica circuit composed of the same circuit and circuit parameters as the first amplifier circuit and electrically connected between the input and output;
A first current source that generates a direct current equal to the direct current level of the current signal from the photodiode;
A replica preamplifier circuit configured with the same circuit and circuit parameters as the preamplifier circuit, and performing an amplification operation using a direct current from the first current source as an input;
A second amplifier circuit that performs an amplification operation using the input signal of the first amplifier circuit in the replica preamplifier circuit and the output signal of the replica circuit as a differential input and outputs the first control signal;
The first level shift circuit in the preamplifier circuit and the first level shift circuit in the replica preamplifier circuit operate in response to the first control signal,
The post-amplifier circuit is configured to differentially amplify the voltage of the output node in the preamplifier circuit with reference to the voltage of the output node in the replica preamplifier circuit.
The optical communication device according to claim 10.
The post-amplifier circuit is composed of a plurality of stages of differential amplifier circuits,
An optical communication apparatus, wherein at least one of the plurality of stages of differential amplifier circuits is configured to increase a gain in a high frequency region by including an inductor.
The optical communication device according to claim 10.
Furthermore, a feedback path including an offset correction circuit is provided between the input and output of the post-amplifier circuit,
The offset correction circuit is
Filtering the output signal of the post-amplifier circuit, and a low-pass filter circuit including a first resistor and a first capacitor;
A third amplifier circuit that amplifies the output signal of the low-pass filter circuit and feeds back to the input of the post-amplifier circuit;
The optical communication device, wherein the first capacitor is connected between input and output of the third amplifier circuit.
A grounded-gate amplifier circuit and a common-source amplifier circuit that amplify a current signal from the photodiode input from the first node and convert the current signal into a voltage signal;
A source follower circuit connected to the next stage of the grounded gate amplifier circuit and the grounded source amplifier circuit;
The gate ground amplifier circuit is:
A first MIS transistor of a first conductivity type having a source connected to the first node;
A second MIS transistor of the first conductivity type, the source of which is cascode-connected to the drain of the first MIS transistor;
A first resistor having one end connected to the drain of the second MIS transistor;
A first current source connected to the first node;
The common source amplifier circuit is:
A third MIS transistor of the first conductivity type having a gate connected to the first node;
A fourth MIS transistor of the first conductivity type having a source connected to the drain of the third MIS transistor and a drain connected to the gate of the first MIS transistor;
A second resistor having one end connected to the drain of the fourth MIS transistor,
The source follower circuit is:
A fifth MIS transistor of the first conductivity type having a gate connected to a drain of the second MIS transistor;
An optical communication device comprising: a second current source connected to a source of the fifth MIS transistor.
The optical communication device according to claim 13.
The common-source amplifier circuit further includes an inductor,
The optical communication apparatus, wherein the drain of the fourth MIS transistor is connected to the gate of the first MIS transistor and one end of the second resistor via the inductor.