WO2006062351A1 - Ldpc encoder and decoder and ldpc encoding and decoding methods - Google Patents
Ldpc encoder and decoder and ldpc encoding and decoding methods Download PDFInfo
- Publication number
- WO2006062351A1 WO2006062351A1 PCT/KR2005/004177 KR2005004177W WO2006062351A1 WO 2006062351 A1 WO2006062351 A1 WO 2006062351A1 KR 2005004177 W KR2005004177 W KR 2005004177W WO 2006062351 A1 WO2006062351 A1 WO 2006062351A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- parity check
- check matrix
- ldpc
- matrices
- matrix
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 27
- 239000011159 matrix material Substances 0.000 claims abstract description 251
- 238000009825 accumulation Methods 0.000 claims 16
- 238000010586 diagram Methods 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 3
- 230000003044 adaptive effect Effects 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 238000005562 fading Methods 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- Mathematical Analysis (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05821430A EP1820275A4 (en) | 2004-12-08 | 2005-12-07 | Ldpc encoder and decoder and ldpc encoding and decoding methods |
US11/721,162 US7882418B2 (en) | 2004-12-08 | 2005-12-07 | LDPC encoder and decoder and LDPC encoding and decoding methods |
CN2005800422197A CN101073205B (en) | 2004-12-08 | 2005-12-07 | LDPC encoder and decoder and LDPC encoding and decoding methods |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2004-0103240 | 2004-12-08 | ||
KR20040103240 | 2004-12-08 | ||
KR1020050063905A KR100641052B1 (en) | 2004-12-08 | 2005-07-14 | LDPC encoder and decoder, and method for LDPC encoding and decoding |
KR10-2005-0063905 | 2005-07-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006062351A1 true WO2006062351A1 (en) | 2006-06-15 |
Family
ID=36578137
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/KR2005/004177 WO2006062351A1 (en) | 2004-12-08 | 2005-12-07 | Ldpc encoder and decoder and ldpc encoding and decoding methods |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP1820275A4 (en) |
WO (1) | WO2006062351A1 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8762806B2 (en) | 2008-09-26 | 2014-06-24 | Agency For Science, Technology And Research | Decoding circuit and encoding circuit |
WO2014117836A1 (en) * | 2013-01-31 | 2014-08-07 | Intracom S.A. Telecom Solutions | Ldpc code design and encoding apparatus enabling the adjustment of code rate and codelength |
WO2018014272A1 (en) | 2016-07-20 | 2018-01-25 | Huawei Technologies Co., Ltd. | Methods and systems for encoding and decoding for ldpc codes |
CN110352562A (en) * | 2017-06-25 | 2019-10-18 | Lg 电子株式会社 | The parity matrix based on LDPC code executes the method for coding and the terminal using it in a wireless communication system |
US10727875B2 (en) | 2009-03-02 | 2020-07-28 | Panasonic Corporation | Transmission apparatus including encoder, reception apparatus including decoder, and associated methods |
RU2791717C1 (en) * | 2022-12-14 | 2023-03-13 | Акционерное общество "Научно-производственная фирма "Микран" | Channel encoding method in a communication system using an ldpc code |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004006442A1 (en) * | 2002-07-03 | 2004-01-15 | Hughes Electronics Corporation | Encoding of low-density parity check (ldpc) codes using a structured parity check matrix |
WO2004047307A1 (en) * | 2002-11-18 | 2004-06-03 | Qualcomm Incorporated | Rate-compatible low-density parity-check (ldpc) codes |
WO2004102810A1 (en) * | 2003-05-13 | 2004-11-25 | Sony Corporation | Decoding method, decoding device, and program |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1480346A4 (en) * | 2002-02-28 | 2006-05-10 | Mitsubishi Electric Corp | Ldpc code inspection matrix generation method and inspection matrix generation device |
US7103818B2 (en) * | 2002-09-30 | 2006-09-05 | Mitsubishi Electric Research Laboratories, Inc | Transforming generalized parity check matrices for error-correcting codes |
US20050283707A1 (en) * | 2004-06-22 | 2005-12-22 | Eran Sharon | LDPC decoder for decoding a low-density parity check (LDPC) codewords |
-
2005
- 2005-12-07 WO PCT/KR2005/004177 patent/WO2006062351A1/en active Application Filing
- 2005-12-07 EP EP05821430A patent/EP1820275A4/en not_active Ceased
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004006442A1 (en) * | 2002-07-03 | 2004-01-15 | Hughes Electronics Corporation | Encoding of low-density parity check (ldpc) codes using a structured parity check matrix |
WO2004047307A1 (en) * | 2002-11-18 | 2004-06-03 | Qualcomm Incorporated | Rate-compatible low-density parity-check (ldpc) codes |
WO2004102810A1 (en) * | 2003-05-13 | 2004-11-25 | Sony Corporation | Decoding method, decoding device, and program |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8762806B2 (en) | 2008-09-26 | 2014-06-24 | Agency For Science, Technology And Research | Decoding circuit and encoding circuit |
US10727875B2 (en) | 2009-03-02 | 2020-07-28 | Panasonic Corporation | Transmission apparatus including encoder, reception apparatus including decoder, and associated methods |
US11206049B2 (en) | 2009-03-02 | 2021-12-21 | Panasonic Corporation | Transmission apparatus including encoder, reception apparatus including decoder, and associated methods |
WO2014117836A1 (en) * | 2013-01-31 | 2014-08-07 | Intracom S.A. Telecom Solutions | Ldpc code design and encoding apparatus enabling the adjustment of code rate and codelength |
WO2018014272A1 (en) | 2016-07-20 | 2018-01-25 | Huawei Technologies Co., Ltd. | Methods and systems for encoding and decoding for ldpc codes |
CN109417392A (en) * | 2016-07-20 | 2019-03-01 | 华为技术有限公司 | The decoding method and system of LDPC code |
EP3479486A4 (en) * | 2016-07-20 | 2019-07-10 | Huawei Technologies Co., Ltd. | Methods and systems for encoding and decoding for ldpc codes |
RU2716044C1 (en) * | 2016-07-20 | 2020-03-05 | Хуавей Текнолоджиз Ко., Лтд. | Methods and systems for encoding and decoding ldpc codes |
US10868567B2 (en) | 2016-07-20 | 2020-12-15 | Huawei Technologies Co., Ltd. | Methods and systems for encoding and decoding for LDPC codes |
CN110352562A (en) * | 2017-06-25 | 2019-10-18 | Lg 电子株式会社 | The parity matrix based on LDPC code executes the method for coding and the terminal using it in a wireless communication system |
CN110352562B (en) * | 2017-06-25 | 2023-04-25 | Lg 电子株式会社 | Method for performing encoding based on parity check matrix of LDPC code in wireless communication system and terminal using the same |
RU2791717C1 (en) * | 2022-12-14 | 2023-03-13 | Акционерное общество "Научно-производственная фирма "Микран" | Channel encoding method in a communication system using an ldpc code |
Also Published As
Publication number | Publication date |
---|---|
EP1820275A1 (en) | 2007-08-22 |
EP1820275A4 (en) | 2009-11-25 |
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