WO2004109595A2 - Method for doubling resolution lcd display using line doubling and non-linear interpolation curve - Google Patents

Method for doubling resolution lcd display using line doubling and non-linear interpolation curve Download PDF

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Publication number
WO2004109595A2
WO2004109595A2 PCT/IB2004/001876 IB2004001876W WO2004109595A2 WO 2004109595 A2 WO2004109595 A2 WO 2004109595A2 IB 2004001876 W IB2004001876 W IB 2004001876W WO 2004109595 A2 WO2004109595 A2 WO 2004109595A2
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Prior art keywords
resolution
data
doubling
pixel
lcd
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PCT/IB2004/001876
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French (fr)
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WO2004109595A3 (en
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Lee, Jin, H.
Canada Interworld Telecommunications Inc.
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Publication of WO2004109595A2 publication Critical patent/WO2004109595A2/en
Publication of WO2004109595A3 publication Critical patent/WO2004109595A3/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00—Geometric image transformations in the plane of the image
    • G06T3/40—Scaling of whole images or parts thereof, e.g. expanding or contracting
    • G06T3/4015—Image demosaicing, e.g. colour filter arrays [CFA] or Bayer patterns
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00—Geometric image transformations in the plane of the image
    • G06T3/40—Scaling of whole images or parts thereof, e.g. expanding or contracting
    • G06T3/4007—Scaling of whole images or parts thereof, e.g. expanding or contracting based on interpolation, e.g. bilinear interpolation

Definitions

  • the PDA and cellular phone's LCD displays are used a RGB color system.
  • each color component's value is very important for pixel presenta ion. This means that each color component can not overlook and decimate
  • RGB color format is not suitable because of computational complexity " and performance.
  • the LCD controller module has the RGB input specifications. So, the most LCD controller's output format is RGB format
  • the conventional LCD controller's functions consist with data processing and data transfer function.
  • Input data of LCD controller handled by data processing unit which can enlarge the image size and adjust the contrast, hue, and saturation.
  • the adjustment of contrast, hue, and saturation is performed in same resolution of input data size, so its processing performance depends on the hardware architecture and color format.
  • the enlargement of display size is more complex than the adjustment processing.
  • the enlargement function is very useful for small systems with large LCD display-
  • the small systems, such as cellular phone, PDA, and embedded systems have some constraints of CPU usages.
  • the enlargement of display size needs computa ional overheads and memory traffic; even though use the simplest algorithm.
  • some LCD controller support the hardware enlargement processing that means enlargement processing needs many computation and memory traffics.
  • the most interpolation methods use the FIR filter structures.
  • the common implementation of FIR filter used multipliers and adders.
  • filter coefficient is very easy to implement because the coefficient value is 2" So, the hardware is implemented with simple shifter.
  • the simple algorithm results in bad quality. There is trade-off between quality and complexity.
  • pixel clock(PCLK) and frame buffer memory size also increase for transfer the pixel data to LCD driver module. Therefore the proposed architecture uses the YCbCr color format for computing like Fi ⁇ . 2. This color format is very useful for improving the computational complexity, enlargement quality, and memory traffic. After color format changed, each pixel doesn't need all value of Cb, and Cr component. And for image quality and computational complexity, using the new interpolation method base on the lookup table which has a feedback loop.
  • the frame buffer size is very critical for total chip size and external interface pin configuration because memory access need many data and address pins. That kind of external pins effect the total powe consuming.
  • this architecture proposed the interpolated pixel compression and decompression method. It could reduce the total frame buffer size and traffic.
  • Fig. 1 The relationship between PCLK(Pixel Clock) and resolution.
  • Fig.2 The block diagram of color format useage.
  • the present invention is improved the interpolation complexity, the frame buffer memory size, a cost effective hardware architecture, and the power consuming for LCD display controller. And also, it support the intellectual property (IP) characterization features.
  • IP intellectual property
  • the display data have a temporal and spatial redundancy.
  • spatial redundancy is key point.
  • An adjacent pixel is very closely related. So, these pixels difference of value is very small or zero.
  • the amount of differences could decide that pixel is on the edge or the background.
  • the background area is not critical in the enlargement of display size because of background interpolated pixel value is very similar to original pixel values. But, the edge area is very important for image clearance.
  • the common interpolation filter is reduced the high frequency components. So, the edge is looked smooth by interpolation pixels.
  • Proposed system maximizes the preserving of edge information and the reducing of computational complexity, and also reducing the memory usage by pixel data compression method.
  • the overall enlargement system is like Fig. 3.
  • the first step of enlargement is simple motion detection module. It detects the pixel values difference between current pixel and previous pixel. After the motion detection, controller decides interpolation flow.
  • the interpolator & quantizer generate the new pixel data for interpolation position. It is larger than original pixel resolution. So, the next step is compression of the pixel data with encoder module.
  • Fig. 4 shows the interpolator module block diagram.
  • the most interpolators are consisted with multiplier and adder.
  • the new interpolator module is consisted with Look-up Table (LUT) of quantize step, controller, and interpolation decision uni .
  • LUT Look-up Table
  • the controller decides the LUT index value and makes control signals.
  • the LUT is contained step size of interpolation value. It is add or subtracted to original values. This step sizes are determined that kept the edge property.
  • decision unit check the error value and updated the LUT values.
  • Fig. 9(a) is non-linear interpolation curve. This curve is non-linear but it has symmetric characteristics. So, if display mode is set to 2x mode, the result is almost same as linear interpolation.
  • center line is conventional interpolation deciding line which is center of two pixel values. It is very easy to ' decide but we loose high frequency component form original signal. So, this system uses I n ⁇ n+1 line for 2x mode.
  • Fig. 9 (a) shows two X n n+1 lines, in 2x mode use only one line which is decided by relation of 2 pixels ( P n , P n+ , ) .
  • Fig. 9 (b) -(c) shows the decision line of interpolation. This method can support the varieties of interpolation step as the input situation.
  • Fig. 5 describes the relation of RGB and YCbCr color format.
  • the digital video and image processing use the YCbCr color format. Because YCbCr color format is more efficient to store the pixel data.
  • the YCbCr format could decimate to 4 : l : X (Y:Cb:Cr) for every 4 pixels.
  • the interpolation value is decimating with Fig 5.
  • Y component value is encoded with differential pulse coded modulation (DPCM) method.
  • Fig.6 shows that the DPCM encoder's block diagram.
  • the delay is one or three pixels for prediction
  • the performance of encoder depends on the predictor's accuracy. Because the encoder's output is difference between predicted value and current value. So, if predictor makes good prediction value, the output variable length coder result is very good. It means that compression rate is very high. This compression could reduce the frame buffer memory usage. As the enlargement rate is bigger than 2, the frame buffer memory usage increase with 2" . So, compression is very important for the efficiency of frame buffer memory.
  • the encoded data is decoded with decoder.
  • Fig. 7- shows the decoder block diagram It is inverse process of encoder modules.
  • the input data is interpolated with new LUT methods that only output the LUT index data.
  • This data is compressed with Fig. 6, and then stored frame buffer memory.
  • output date is decoded with Fig. 1 , - its data is real pixel data that include the interpolated pixel data.
  • Fig. 7 w ll have the calculation modules that will be simple adder. This separation of decoder and encoder function is very efficient for parallel processing and it could be reduce the image processing overload.
  • Fig. 4 The signal flow diagram of interpolation processor which is based on look-up table method
  • Fig. 7 The block diagram of decoder module
  • Fig. 9 The method of interpolation table decision.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Image Processing (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

A method for scaling a low resolution display size to multiple of two is presented. The system consists of a signal processor including a simple motion detector, controller, image processing module with interpolation processor and data compression codec (decoder and encoder). The scaling method involves converting pixel data from red, green, blue (RGB) color format to YcbCr color format, and interpolating the pixel data based on a look-up table, to obtains pixel data having larger pixel resolution. Therefore efficiency of frame buffer usage is increased and data traffic and power consumption are reduced. The method is used for doubling resolution of LCD used in cellular phone, personal digital assistant (PDA) and laptop or desktop computer.

Description

Title: Method for doubling resolution LCD display using line doubling and non-linear interpolation curve .
Introduction
The PDA and cellular phone's LCD displays are used a RGB color system. In the RGB color system, each color component's value is very important for pixel presenta ion. This means that each color component can not overlook and decimate In digital image processing, RGB color format is not suitable because of computational complexity" and performance. The LCD controller module has the RGB input specifications. So, the most LCD controller's output format is RGB format
The conventional LCD controller's functions consist with data processing and data transfer function. Input data of LCD controller handled by data processing unit which can enlarge the image size and adjust the contrast, hue, and saturation. The adjustment of contrast, hue, and saturation is performed in same resolution of input data size, so its processing performance depends on the hardware architecture and color format. The enlargement of display size is more complex than the adjustment processing.
The enlargement function is very useful for small systems with large LCD display- The small systems, such as cellular phone, PDA, and embedded systems have some constraints of CPU usages. The enlargement of display size needs computa ional overheads and memory traffic; even though use the simplest algorithm. So, some LCD controller support the hardware enlargement processing that means enlargement processing needs many computation and memory traffics. The most interpolation methods use the FIR filter structures. The common implementation of FIR filter used multipliers and adders. In the simple liner interpola ion algorithm, filter coefficient is very easy to implement because the coefficient value is 2" So, the hardware is implemented with simple shifter. The simple algorithm results in bad quality. There is trade-off between quality and complexity. And like Fig 1, when enlarge the original display image, pixel clock(PCLK) and frame buffer memory size also increase for transfer the pixel data to LCD driver module. Therefore the proposed architecture uses the YCbCr color format for computing like Fiς. 2. This color format is very useful for improving the computational complexity, enlargement quality, and memory traffic. After color format changed, each pixel doesn't need all value of Cb, and Cr component. And for image quality and computational complexity, using the new interpolation method base on the lookup table which has a feedback loop. The frame buffer size is very critical for total chip size and external interface pin configuration because memory access need many data and address pins. That kind of external pins effect the total powe consuming. And if it uses the MMIC technology, memory size is increase the total die size of chip. So, using smaller memory size is better. For memory buffer size and memory transfer traffic, this architecture proposed the interpolated pixel compression and decompression method. It could reduce the total frame buffer size and traffic.
Figure imgf000003_0001
Fig. 1. The relationship between PCLK(Pixel Clock) and resolution.
Figure imgf000003_0002
Fig.2. The block diagram of color format useage.
Technical objective
The present invention is improved the interpolation complexity, the frame buffer memory size, a cost effective hardware architecture, and the power consuming for LCD display controller. And also, it support the intellectual property (IP) characterization features.
System architecture The display data have a temporal and spatial redundancy. In this system, spatial redundancy is key point. An adjacent pixel is very closely related. So, these pixels difference of value is very small or zero. The amount of differences could decide that pixel is on the edge or the background. When pixel is on the background, that pixel's information could be decimated. This method could reduce the total computation amount. The background area is not critical in the enlargement of display size because of background interpolated pixel value is very similar to original pixel values. But, the edge area is very important for image clearance. The common interpolation filter is reduced the high frequency components. So, the edge is looked smooth by interpolation pixels.
Proposed system maximizes the preserving of edge information and the reducing of computational complexity, and also reducing the memory usage by pixel data compression method.
SYSTEM ARCHITECTURE
The overall enlargement system is like Fig. 3. The first step of enlargement is simple motion detection module. It detects the pixel values difference between current pixel and previous pixel. After the motion detection, controller decides interpolation flow. The interpolator & quantizer generate the new pixel data for interpolation position. It is larger than original pixel resolution. So, the next step is compression of the pixel data with encoder module.
Fig. 4 shows the interpolator module block diagram. The most interpolators are consisted with multiplier and adder. The new interpolator module is consisted with Look-up Table (LUT) of quantize step, controller, and interpolation decision uni .
The controller decides the LUT index value and makes control signals. The LUT is contained step size of interpolation value. It is add or subtracted to original values. This step sizes are determined that kept the edge property. And decision unit check the error value and updated the LUT values.
Fig. 9(a) is non-linear interpolation curve. This curve is non-linear but it has symmetric characteristics. So, if display mode is set to 2x mode, the result is almost same as linear interpolation. In fig.9 (a), center line is conventional interpolation deciding line which is center of two pixel values. It is very easy to' decide but we loose high frequency component form original signal. So, this system uses In<n+1 line for 2x mode. Fig. 9 (a) shows two Xn n+1 lines, in 2x mode use only one line which is decided by relation of 2 pixels ( Pn, Pn+, ) . Fig. 9 (b) -(c) shows the decision line of interpolation. This method can support the varieties of interpolation step as the input situation.
Fig. 5 describes the relation of RGB and YCbCr color format. The digital video and image processing use the YCbCr color format. Because YCbCr color format is more efficient to store the pixel data. The YCbCr format could decimate to 4 : l : X (Y:Cb:Cr) for every 4 pixels.
The interpolation value is decimating with Fig 5. And then, Y component value is encoded with differential pulse coded modulation (DPCM) method. Fig.6 shows that the DPCM encoder's block diagram. The delay is one or three pixels for prediction The performance of encoder depends on the predictor's accuracy. Because the encoder's output is difference between predicted value and current value. So, if predictor makes good prediction value, the output variable length coder result is very good. It means that compression rate is very high. This compression could reduce the frame buffer memory usage. As the enlargement rate is bigger than 2, the frame buffer memory usage increase with 2" . So, compression is very important for the efficiency of frame buffer memory. The encoded data is decoded with decoder. Fig. 7- shows the decoder block diagram It is inverse process of encoder modules.
As like Fig. 8, the input data is interpolated with new LUT methods that only output the LUT index data. This data is compressed with Fig. 6, and then stored frame buffer memory. Finally output date is decoded with Fig. 1 , - its data is real pixel data that include the interpolated pixel data. So, Fig. 7 w ll have the calculation modules that will be simple adder. This separation of decoder and encoder function is very efficient for parallel processing and it could be reduce the image processing overload.
Figure imgf000005_0001
Resolution Enhancement Signal Processor Fig. 3. The block diagram of the resolution enhancement signa 1 processor
Figure imgf000005_0002
Interpolation Processor
Fig. 4. The signal flow diagram of interpolation processor which is based on look-up table method
Figure imgf000006_0001
lq 5 The relation of RGB and "t Cbf i
Figure imgf000006_0002
Fig. 6 The block diagram of encoder module
Figure imgf000006_0003
Fig. 7 The block diagram of decoder module
Input
Resolution Pixel data Enhancement
Frame Signal 2
Control Processor Buffer Signal Memory § 3
CD Controller ■5 C 31 >
-►j Decoder J^E"1- ,
' Data
Fig . 8 The data f low of the overall processing
Figure imgf000008_0001
(C)
Fig. 9 The method of interpolation table decision.
(a) non-linear interpolation curve
(b) non-linear and linear interpolation curve
(c) an comparison of linear and non-linear results.

Claims

Claims :
1. A method for scaling a low resolution display size to multiple of 2. It includes the simple motion detector, controller, image processing module, and data compression codec.
2. A method for interpolating a pixel data. And look-up table based interpolation step decision method. It includes look-up table, step size decision controller, and decision unit that have table update function.
3. A method for compressing an interpolated pixel data. It receives the index data from claim 2, and predicted the current value with predictor. And it includes the LUT base variable length code book.
4. A method for decompressing a compressed data as claim 3. It includes a syntax parser, index predictor, and adder.
5. A method for making and deciding an interpolation step size table as claim 2. It reserves the edge characteristics and can implement with adaptive architec ure.
L = o. d = o.
Figure imgf000010_0001
i Distance I coding
Syntax Multlplaxer
Encoded data
The flow chart of pixel compression (reference figure)
Figure imgf000011_0001
The example of interpolation pixel value decision method (reference figure)
Many efforts have been made to find a way to view full HTML web pages on mobile devices over the wireless Internet. In order to that, there are two approaches, one thing is to increase the display panel size and the other is to increase the resolutions of display. As it reveals, the large panel is not adequate for mobile terminal and thus, small LCD that has more pixels in the unit area is required, which has technical limitation to enhance resolution to an some extent. The method to increase the resolutions without increasing number of pixels has been developed and called Smart Display Technology (SDT).
SDT is implemented by hardware logic only. With this SDT, you can get mobile Web access to real Web pages that maintain full text legibility.
Smart Display Technology
Smart Display Technology (SDT) is a new method for increasing horizontal and/or vertical resolution in TFT LCD. We describe the method for doubling vertical resolution as well as horizontal resolution for digital color TFT LCDs, which are used for mobile terminal such as cell phone, PDA, and HPC. As the digital LCD has a different array of pixels from that of analog type LCD, we applied an method to attain doubling horizontal and vertical resolutions simultaneously. With this method, horizontal and vertical resolutions are doubled, that is to say, the resolution is increased by 4 times comparing to the conventional method. This technology is implemented using hardware logic only, less than 2k gates are used; therefore, this is independent to the OS, or applications. In addition, this hardware logic size is small enough to merged into graphic controller as a sub-function.
PCT/IB2004/001876 2003-05-22 2004-04-26 Method for doubling resolution lcd display using line doubling and non-linear interpolation curve WO2004109595A2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102522069A (en) * 2011-12-20 2012-06-27 龙芯中科技术有限公司 Pixel frame buffer processing system of liquid crystal display controller (LCDC) and method thereof
US8854383B2 (en) 2011-04-13 2014-10-07 Qualcomm Incorporated Pixel value compaction for graphics processing

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0803841A2 (en) * 1996-04-25 1997-10-29 Canon Kabushiki Kaisha Image processing apparatus and method
EP0895187A2 (en) * 1997-07-31 1999-02-03 Hewlett-Packard Company A method for scaling an image
JP2000092485A (en) * 1998-09-08 2000-03-31 Canon Inc Encoding device, decoding device, image processor, and image processing system
EP1289304A2 (en) * 1996-05-28 2003-03-05 Matsushita Electric Industrial Co., Ltd. Intraframe block prediction by using adjacent blocks

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0803841A2 (en) * 1996-04-25 1997-10-29 Canon Kabushiki Kaisha Image processing apparatus and method
EP1289304A2 (en) * 1996-05-28 2003-03-05 Matsushita Electric Industrial Co., Ltd. Intraframe block prediction by using adjacent blocks
EP0895187A2 (en) * 1997-07-31 1999-02-03 Hewlett-Packard Company A method for scaling an image
JP2000092485A (en) * 1998-09-08 2000-03-31 Canon Inc Encoding device, decoding device, image processor, and image processing system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8854383B2 (en) 2011-04-13 2014-10-07 Qualcomm Incorporated Pixel value compaction for graphics processing
CN102522069A (en) * 2011-12-20 2012-06-27 龙芯中科技术有限公司 Pixel frame buffer processing system of liquid crystal display controller (LCDC) and method thereof

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