TWI445074B - Method of treating a mask layer prior to rerforming an etching process - Google Patents

Method of treating a mask layer prior to rerforming an etching process Download PDF

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TWI445074B
TWI445074B TW096129002A TW96129002A TWI445074B TW I445074 B TWI445074 B TW I445074B TW 096129002 A TW096129002 A TW 096129002A TW 96129002 A TW96129002 A TW 96129002A TW I445074 B TWI445074 B TW I445074B
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plasma
mask layer
etching
electron beam
etching method
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TW200828432A (en
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Peter L G Ventzek
Lee Chen
Akira Koshiishi
Ikuo Sawada
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Tokyo Electron Ltd
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Priority claimed from US11/499,680 external-priority patent/US7642193B2/en
Priority claimed from US11/499,678 external-priority patent/US7449414B2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/40Treatment after imagewise removal, e.g. baking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32321Discharge generated by other radiation
    • H01J37/3233Discharge generated by other radiation using charged particles
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks

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Description

在蝕刻處理前施行之遮罩層處理方法Mask layer processing method performed before etching process

本發明係關於在電漿處理系統中蝕刻在基板上之薄膜的方法,特別是關於在使用以彈道電子束輔助的電漿去蝕刻薄膜之前,處理在薄膜上的遮罩層。The present invention relates to a method of etching a film on a substrate in a plasma processing system, and more particularly to treating a mask layer on a film prior to etching the film with a ballistic electron beam assisted plasma.

在半導體的處理中,(乾式)電漿蝕刻處理可以用來移除或是蝕刻沿著在基板上圖案化的邊線的材料、或是在通孔中的材料、或是接觸中的材料。電漿蝕刻處理大致上涉及在處理室中放置具有底面圖案化的保護層(例如光阻層)之一半導體基板。一但基板位於處理室中,可離子化且可解離的氣體混合物就以預定的流動速度被引入處理室中,同時調節真空幫浦以達到周圍環境的處理壓力。In semiconductor processing, a (dry) plasma etch process can be used to remove or etch materials along the edges patterned on the substrate, or in the vias, or in contact. The plasma etch process generally involves placing a semiconductor substrate having a protective layer (eg, a photoresist layer) patterned with a bottom surface in a processing chamber. Once the substrate is in the processing chamber, the ionizable and dissociable gas mixture is introduced into the processing chamber at a predetermined flow rate while the vacuum pump is adjusted to achieve the processing pressure of the surrounding environment.

之後,當現有的氣體物種的一部份被加熱電子離子化,就會形成電漿。加熱電子是藉由電感性地或是電容性地轉移射頻(RF)電源的功率、或是例如使用電子迴旋加速震盪器(ECR)所轉移的微波功率來加熱的。此外,加熱電子是用來解離周圍氣體物種的一些物種,並產生適合於暴露表面之蝕刻化學品的反應物種。一但電漿形成,擇出之基板表面就被電漿蝕刻。調整處理到適當的條件,包括在基板之所擇出的區域蝕刻不同特徵部(例如,渠溝、通孔、接觸等者)之適當的所欲反應物濃度及離子濃度。需要蝕刻的例示性基板材料包括二氧化矽(SiO2 )、低k介電材料、聚合矽、及氮化矽。Thereafter, when a portion of the existing gas species is heated and ionized, a plasma is formed. Heating electrons is heated by inductively or capacitively transferring the power of a radio frequency (RF) power source, or for example, using microwave power transferred by an electron cyclotron oscillator (ECR). In addition, the heated electrons are used to dissociate some species of the surrounding gas species and produce reactive species suitable for the etch chemical that exposes the surface. Once the plasma is formed, the surface of the selected substrate is etched by the plasma. Adjusting the treatment to appropriate conditions includes etching the appropriate desired reactant concentration and ion concentration for different features (eg, trenches, vias, contacts, etc.) in selected regions of the substrate. Exemplary substrate materials that require etching include cerium oxide (SiO 2 ), low-k dielectric materials, polymeric germanium, and tantalum nitride.

本發明之一目的是為蝕刻介電質提供改進的方法及系統。It is an object of the present invention to provide an improved method and system for etching dielectrics.

本發明之另一目的是為處理圖案化的遮罩層提供改進的方法及系統,以促進蝕刻處理。Another object of the present invention is to provide an improved method and system for processing patterned mask layers to facilitate etching processes.

本發明這些及/或其他的目的是藉由蝕刻形成在基板上並具有圖案化的遮罩層於其上的薄膜的方法而提供的。此方法包括藉由暴露遮罩層於含氧電漿、或是含鹵素電漿、或是惰性氣體、或是其中兩者或更多者的組合之中來處理遮罩層,接著處理遮罩層,為了要轉移遮罩層的圖案到薄膜,蝕刻此薄膜。蝕刻包括在電漿處理系統中從處理氣體形成電漿;耦合直流(DC)電源到電漿處理系統中的電極以在電漿處理系統中形成在蝕刻時輔助電漿的電子束;及暴露基板於電漿及電子束中。These and/or other objects of the present invention are provided by a method of etching a film formed on a substrate and having a patterned mask layer thereon. The method includes treating the mask layer by exposing the mask layer to an oxygen-containing plasma, or a halogen-containing plasma, or an inert gas, or a combination of two or more thereof, and then processing the mask The layer is etched in order to transfer the pattern of the mask layer to the film. Etching includes forming a plasma from a process gas in a plasma processing system; coupling a direct current (DC) power source to an electrode in the plasma processing system to form an electron beam that assists the plasma during etching in the plasma processing system; and exposing the substrate In plasma and electron beam.

本發明之另一實施態樣包括形成在基板上並具有圖案化的遮罩層於其上的的薄膜之蝕刻方法。此方法包括在用來形成電漿及彈道電子束的電漿處理系統中設置基板在基板支座上,及在電漿處理系統中,藉由暴露遮罩層於含氧電漿、或是含鹵素電漿、或是惰性氣體電漿、或是其中兩者或是更多者的組合中,來處理遮罩層,且不用形成彈道電子束。更進一步,在處理遮罩層之後,為了要蝕刻薄膜並轉移圖案化的遮罩的圖案至薄膜,在電漿處理系統中形成電漿及彈道電子束。Another embodiment of the invention includes a method of etching a thin film formed on a substrate and having a patterned mask layer thereon. The method includes disposing a substrate on a substrate support in a plasma processing system for forming a plasma and a ballistic electron beam, and in the plasma processing system, by exposing the mask layer to an oxygen-containing plasma, or Halogen plasma, or inert gas plasma, or a combination of two or more, to treat the mask layer without forming a ballistic electron beam. Still further, after processing the mask layer, in order to etch the film and transfer the patterned pattern of the mask to the film, a plasma and ballistic electron beam is formed in the plasma processing system.

在又另一實施態樣中,用來蝕刻基板的電漿處理系統包括處理室、供應氣體到處理室的氣體供應系統、耦合於處理室且用來支撐基板的基板支座、設置於處理室內部的電極。為了要在處理室中形成電漿,一AC電源系統耦合於處理室且耦合至少一個AC信號到基板支座、或是電極或是此二者,為了要形成通過電漿的彈道電子束,一DC電源系統耦合於處理室且耦合DC電壓到電極。控制器是用來控制氣體供應系統、AC電源系統、及DC電源系統以施行下列步驟:在電漿處理系統中,藉由暴露遮罩層於含氧電漿、或是含鹵素電漿、或是惰性氣體電漿、或是其中兩者或是更多者的組合中來處理遮罩層,且不用形成彈道電子束;及在處理遮罩層之後,為了要蝕刻薄膜並轉移圖案化遮罩的圖案至薄膜,在電漿處理系統中形成電漿及彈道電子束。In still another embodiment, a plasma processing system for etching a substrate includes a processing chamber, a gas supply system that supplies gas to the processing chamber, a substrate holder coupled to the processing chamber and used to support the substrate, and is disposed in the processing chamber. The electrode of the part. In order to form a plasma in the processing chamber, an AC power system is coupled to the processing chamber and couples at least one AC signal to the substrate holder, or the electrodes, or both, in order to form a ballistic electron beam through the plasma, A DC power system is coupled to the processing chamber and couples a DC voltage to the electrodes. The controller is used to control the gas supply system, the AC power system, and the DC power system to perform the following steps: in the plasma processing system, by exposing the mask layer to an oxygen-containing plasma, or a halogen-containing plasma, or Is an inert gas plasma, or a combination of two or more, to treat the mask layer without forming a ballistic electron beam; and after processing the mask layer, in order to etch the film and transfer the patterned mask The pattern to the film forms a plasma and ballistic electron beam in the plasma processing system.

在以下的描述中,為了解釋性目的而非限制性目的而先設定特定的細節,例如電漿處理系統的幾何方法及不同的處理。然而,應了解者為,本發明在脫離這些特定的細節的情況下,仍能以其他的實施例實現。In the following description, specific details are set for illustrative purposes and not for purposes of limitation, such as the geometry of the plasma processing system and the different processes. However, it is to be understood that the invention may be embodied in other embodiments without departing from the specific details.

在材料處理方法論中,為了要在蝕刻時轉移圖案至下方之基板上的薄膜,圖案蝕刻包含施加光感性材料(例如光阻)薄層到將被圖案化的基板的上表面。光阻材料的圖案化大致上涉及藉由發射光源通過初縮光罩(及相關的光學儀器)的光阻材料的曝光,利用,例如微影蝕刻系統,接著使用顯影溶液來移除照光區域(若為正光阻的情況)或是未照光區域(若為負光阻的情況)的光感性材料。此外,遮罩層可以包含多重次級層。舉例而言,遮罩層可以包括光感性材料層,例如光阻、及底層的抗反射塗佈(ARC)層。In the material processing methodology, in order to transfer a pattern to a film on a substrate underneath during etching, the pattern etch comprises applying a thin layer of a photosensitive material (eg, photoresist) to the upper surface of the substrate to be patterned. Patterning of the photoresist material generally involves exposure of the photoresist material through the refracting reticle (and associated optical instrument) by the emission source, using, for example, a lithography etching system, followed by removal of the illumination region using a developing solution ( Photosensitive material in the case of a positive photoresist or in the case of an unilluminated area (in the case of a negative photoresist). Additionally, the mask layer can comprise multiple secondary layers. For example, the mask layer can include a layer of photo-sensitive material, such as a photoresist, and an underlying anti-reflective coating (ARC) layer.

在圖案蝕刻中,經常使用乾式蝕刻處理,其中為了要加熱電子並導致接續的處理氣體的原子及/或分子離子化並解離,藉由耦合電磁(EM)能量[例如射頻(RF)電源]到處理氣體以從處理氣體形成電漿。更進一步,為了要產生能在RF週期的一部份中,例如耦合的RF電源的正半週,衝擊基板表面的高能(彈道)電子束,負高壓直流(DC)電源可以耦合於電漿處理系統。已知藉由例如增加在底層(將被蝕刻的)的薄膜及遮罩層之間的選擇度,彈道電子束可以加強乾式電漿蝕刻處理的特性、減少衝擊損害,例如電子遮蔽損害等者。相信是因為彈道電子改質遮罩層所以使乾式電漿蝕刻處理加強,例如,遮罩層對蝕刻處理更有抵抗性導致加強的蝕刻選擇度。關於產生彈道電子束的額外細節揭露於待判決的美國專利申請案第11/156559號,其發明名稱為「電漿處理設備及方法」,並公開於美國專利申請案第2006/0037701A1號中,其全部內容在此作為參考資料。In pattern etching, a dry etching process is often used in which atoms and/or molecules of ions and/or molecules of the subsequent process gas are heated and dissociated by coupling electromagnetic (EM) energy [eg, radio frequency (RF) power] to The gas is treated to form a plasma from the process gas. Further, in order to generate a high energy (ballistic) electron beam that strikes the surface of the substrate during a portion of the RF cycle, such as the positive half cycle of the coupled RF power source, a negative high voltage direct current (DC) power source can be coupled to the plasma processing system. It is known that ballistic electron beams can enhance the characteristics of dry plasma etching processes, reduce impact damage, such as electronic shadow damage, etc., by, for example, increasing the selectivity between the film (which will be etched) and the mask layer. It is believed that the dry plasma etching process is enhanced by the ballistic electronically modified mask layer, for example, the mask layer is more resistant to etching processes resulting in enhanced etching selectivity. </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The entire contents thereof are hereby incorporated by reference.

現在參照圖1,設置一種結合彈道電子束的電漿處理系統的概略圖。電漿處理系統包含互相對立在處理室中的第一電極120及第二電極172,其中第一電極120是用來支撐基板125。第一電極120耦合於第一RF產生器140,以第一RF頻率提供RF電源,且第二電極耦合於第二RF產生器170,以第二RF頻率提供RF電源,第二RF頻率可與第一RF頻率相同或是不同。舉例而言,第二RF頻率可以是相對第一RF頻率而言較高的頻率。耦合RF電源至第一及第二電極可以促進電漿130的形成。Referring now to Figure 1, an overview of a plasma processing system incorporating a ballistic electron beam is provided. The plasma processing system includes a first electrode 120 and a second electrode 172 that are opposite each other in the processing chamber, wherein the first electrode 120 is used to support the substrate 125. The first electrode 120 is coupled to the first RF generator 140 to provide RF power at a first RF frequency, and the second electrode is coupled to the second RF generator 170 to provide RF power at a second RF frequency, the second RF frequency being The first RF frequencies are the same or different. For example, the second RF frequency can be a higher frequency relative to the first RF frequency. Coupling the RF power to the first and second electrodes can facilitate the formation of the plasma 130.

此外,電漿處理系統包含用來供應DC電壓到第二電極172的DC電源供應器150。(舉例而言)負DC電壓耦合到第二電極172可以促進彈道電子束135的形成。電子束的電源是從負DC電壓重疊到第二電極172得到的。如美國專利申請案第2006/0037701A1號所公開的內容,負DC電源施加於電漿處理系統會影響衝擊基板125之表面的彈道(或是無碰撞)電子束的形成。Additionally, the plasma processing system includes a DC power supply 150 for supplying a DC voltage to the second electrode 172. The coupling of the negative DC voltage to the second electrode 172, for example, may facilitate the formation of the ballistic electron beam 135. The power of the electron beam is obtained by overlapping the negative DC voltage to the second electrode 172. The application of a negative DC power source to the plasma processing system affects the formation of a ballistic (or collision free) electron beam that impacts the surface of the substrate 125, as disclosed in U.S. Patent Application Serial No. 2006/0037701 A1.

大致上,彈道電子束可以與任何類型的電漿處理系統一起使用,如以下所述。在此範例中,負DC電壓重疊在RF驅動的電容性耦合電漿(CCP)處理系統。因此,本發明並不被此範例所限制。此範例只是用於描述性的目的。In general, ballistic electron beams can be used with any type of plasma processing system, as described below. In this example, the negative DC voltage overlaps the RF-driven capacitively coupled plasma (CCP) processing system. Therefore, the invention is not limited by this example. This example is for descriptive purposes only.

彈道電子束對於加強蝕刻特性來說是很重要的,而發明人也發現在使用彈道電子束的許多情況中會導致在遮罩層中形成之條紋或圖案異常(通常被稱為「線緣粗度」(LER))。明確而言,發明人發現LER最常發生在相對的低聚合形成中(例如,相對低的CF2 基含量)蝕刻化學物(例如CF4 化學物),且較不常發生在相對的高聚合形成中(例如相對高的CF2 基含量)蝕刻化學物(例如C4 F8 或是C5 F8 化學物)。在正進行的蝕刻處理及/或是接續的蝕刻處理中,圖案的異常及側壁粗度會轉移到下面的層中。舉例而言,在初始的基板暴露於具有激發破壞鍵,例如彈道電子束輔助的電漿中,遮罩層可以被改質以使形成在遮罩層中的圖案表現出當蝕刻處理進行時被轉移到蝕刻薄膜的側壁粗度(或是圖案異常)。這會減少製造產量及/或低劣的裝置性能及可靠度。Ballistic electron beams are important for enhancing the etch characteristics, and the inventors have also found that in many cases where ballistic electron beams are used, streaks or pattern anomalies formed in the mask layer are caused (often referred to as "line margins". Degree (LER)). Specifically, the inventors have discovered that LER most often occurs in relatively low polymerization formations (eg, relatively low CF 2 radical content) etching chemistries (eg, CF 4 chemistries), and less frequently occurs in relatively high polymerizations. An etch chemistry (eg, C 4 F 8 or C 5 F 8 chemistry) is formed (eg, a relatively high CF 2 group content). In the ongoing etching process and/or the subsequent etching process, pattern anomalies and sidewall thicknesses are transferred to the underlying layers. For example, in the case where the initial substrate is exposed to a plasma having an excitation breaking bond, such as ballistic electron beam assist, the mask layer may be modified such that the pattern formed in the mask layer appears to be performed while the etching process is in progress. Transfer to the sidewall thickness of the etched film (or pattern anomaly). This can reduce manufacturing throughput and/or poor device performance and reliability.

發明人為了判定上述LER問題的原因,努力研究過彈道電子束輔助的電漿的特徵。發明人相信即使延長遮罩層(例如光阻層)暴露於能改質遮罩層以增進如上述的蝕刻處理的高能電子束(例如電子能量超出大約100 eV)的時間,當鹵素原子出現時,初始的暴露於電子束中會造成導致遮罩層中的條紋形成(被稱為LER)之損害,例如電子所引發的缺陷。舉例而言,當遮罩層暴露於上述的含氟蝕刻化學物時,遮罩層之表面層化學鍵的瓦解會導致氟的氧化(藉由氟原子)、及從遮罩層的表面移除碳、氫、及氧(至由衝擊電子的能量所決定的深度)。大致上而言,發明人相信在習知的彈道電子束蝕刻處理中,即使接續暴露於具有對蝕刻處理有益的鹵素原子物種的彈道電子束中,遮罩層的初始暴露於出現鹵素原子物種的彈道電子束會導致LER。In order to determine the cause of the above LER problem, the inventors have made an effort to study the characteristics of ballistic electron beam-assisted plasma. The inventors believe that even if the extended mask layer (e.g., photoresist layer) is exposed to the upgradeable mask layer to enhance the high energy electron beam (e.g., electron energy exceeds about 100 eV) of the etching process as described above, when halogen atoms are present Initial exposure to the electron beam can cause damage to the formation of fringes (referred to as LER) in the mask layer, such as defects caused by electrons. For example, when the mask layer is exposed to the fluorine-containing etch chemistry described above, the disintegration of the chemical bonds on the surface layer of the mask layer causes oxidation of fluorine (by fluorine atoms) and removal of carbon from the surface of the mask layer. , hydrogen, and oxygen (to the depth determined by the energy of the impact electron). In general, the inventors believe that in conventional ballistic electron beam etching processes, even if exposed to a ballistic electron beam having a halogen atom species beneficial to the etching process, the initial exposure of the mask layer to the presence of a halogen atom species Ballistic electron beams can cause LER.

因此,發明人期望在施行蝕刻處理之前處理遮罩層能夠減少在蝕刻處理時引發的LER。此遮罩層包含含矽層、或是不含矽層。此外,此遮罩層包含光感性材料,例如光阻。例如,遮罩層可包含248奈米(nm)的光阻、193 nm的光阻、157 nm的光阻、或是EUV(超紫外光)光阻、或是其中兩者或更多者的組合。Therefore, the inventors expect that processing the mask layer before performing the etching process can reduce the LER induced at the etching process. The mask layer comprises a layer containing germanium or a layer containing no germanium. Furthermore, this mask layer contains a light-sensitive material such as a photoresist. For example, the mask layer may comprise 248 nm (nm) photoresist, 193 nm photoresist, 157 nm photoresist, or EUV (ultraviolet) photoresist, or two or more of them. combination.

根據一實施例,在施行轉移形成在遮罩層之中的圖案到下面的薄膜的蝕刻處理之前,圖案化的遮罩層暴露於含氧電漿、或是含鹵素電漿、或是惰性氣體電漿、或是其中兩者或更多者組合之中。遮罩層以缺少激發破壞鍵的含氧電漿、或是含鹵素電漿、或是惰性氣體電漿、或是其中兩者或更多者組合來處理,例如高能電子或是高能光子。較佳者為,處理電漿是導致少數或是沒有離子撞上圖案化遮罩(亦即,基板的低能量離子)的電漿。因此,設置於電漿源的射頻(RF)或是微波電源較佳者為是以足夠解離並離子化氧氣或是鹵素氣體、及能離子化惰性氣體的功率位準所設置的。在一實施例中,電漿源的功率是大約2000 W或更少,且所欲電漿源的功率是大約500 W或更少。此外,基板電極的偏壓功率少於大約500 W,且所欲偏壓功率為少於大約100 W,更欲者為,偏壓功率包含實際上沒有加在基板電極的功率。更進一步,電漿處理實施大約1到30秒,所欲者為電漿處理實施大約2到20秒,例如大約10秒。According to an embodiment, the patterned mask layer is exposed to an oxygen-containing plasma, or a halogen-containing plasma, or an inert gas, prior to performing an etching process of transferring the pattern formed in the mask layer to the underlying film. Plasma, or a combination of two or more. The mask layer is treated with an oxygen-containing plasma that lacks a destructive bond, or a halogen-containing plasma, or an inert gas plasma, or a combination of two or more thereof, such as high energy electrons or high energy photons. Preferably, the treatment of the plasma is a plasma that causes little or no ions to impinge on the patterned mask (i.e., the low energy ions of the substrate). Therefore, the radio frequency (RF) or microwave power source disposed in the plasma source is preferably set at a power level sufficient to dissociate and ionize oxygen or a halogen gas, and to ionize the inert gas. In one embodiment, the power of the plasma source is about 2000 W or less, and the power of the desired plasma source is about 500 W or less. In addition, the substrate electrode has a bias power of less than about 500 W and the desired bias power is less than about 100 W. More preferably, the bias power includes power that is not actually applied to the substrate electrode. Still further, the plasma treatment is carried out for about 1 to 30 seconds, and the desired treatment is about 2 to 20 seconds, for example about 10 seconds, for the plasma treatment.

遮罩層的暴露可以在用於蝕刻處理的電漿處理系統中實施,例如圖1中所示之電漿處理系統,或者暴露可以在不同於施行蝕刻處理的電漿處理系統中的另一基板處理系統中實施。電漿可以使用在蝕刻處理時促進電漿形成的電漿產生系統在原位產生。或者電漿也可以使用耦合於施行蝕刻處理的電漿處理系統的或是分開的基板處理系統的遠端電漿源在不是原位之處產生。The exposure of the mask layer can be performed in a plasma processing system for etching processes, such as the plasma processing system shown in Figure 1, or exposing another substrate that can be in a plasma processing system other than performing an etching process. Implemented in the processing system. The plasma can be generated in situ using a plasma generating system that promotes plasma formation during the etching process. Alternatively, the plasma may be generated using a remote plasma source coupled to the plasma processing system performing the etching process or a separate substrate processing system where it is not in situ.

含氧電漿可以從O2 、CO、CO2 、NO、N2 O、或是NO2 、或是其中兩者或是更多者的組合形成。含氧氣體的流動速度大約是10 sccm(每分鐘的標準立方公分)到大約1000 sccm,舉例而言,大約是100到300 sccm。室壓力可以是大約1 mTorr到大約1000 mTorr,所欲者為室壓力是大約50 mTorr到大約500 mTorr。含氧電漿可進一步包含惰性氣體、鈍氣、N2 、H2 、或是CN。發明人相信使用含氧電漿會促進在具有增加的氧濃度的遮罩層中的次級層形成。發明人期望處理過之遮罩層能夠幫助減少在接續的蝕刻處理中的遮罩層中的LER。舉例而言,在含矽遮罩層的情況中,可以形成對LER的形成特別有抗性的「玻璃似的」(亦即SiOx )次級層。The oxygen-containing plasma may be formed from O 2 , CO, CO 2 , NO, N 2 O, or NO 2 , or a combination of two or more thereof. The flow rate of the oxygen-containing gas is about 10 sccm (standard cubic centimeters per minute) to about 1000 sccm, for example, about 100 to 300 sccm. The chamber pressure can be from about 1 mTorr to about 1000 mTorr, and the desired chamber pressure is from about 50 mTorr to about 500 mTorr. The oxygen-containing plasma may further comprise an inert gas, an inert gas, N 2 , H 2 , or CN. The inventors believe that the use of oxygenated plasma promotes secondary layer formation in a mask layer having an increased oxygen concentration. The inventors expect that the treated mask layer can help reduce the LER in the mask layer in successive etching processes. For example, in the case of a germanium-containing mask layer, a "glass-like" (i.e., SiO x ) secondary layer that is particularly resistant to the formation of LER can be formed.

在一範例中,在電漿處理系統中施行藉由含氧電漿實施的遮罩層處理。處理的條件包括:含氧氣體的流動速度範圍從大約100 sccm到大約500 sccm;室壓力大於或是等於大約100 mTorr;施加小或是無RF偏壓功率於下電極(基板放置於其上);施加大約500 W的RF功率於上電極(或是感應線圈);且處理時間大約是10秒。在另一範例中,藉由含氧電漿施行的遮罩層處理是使用移位(或是遠端)電漿源,例如微波動力電漿源。處理條件包括:含氧電氣體的流動速度範圍從大約100 sccm到大約500 sccm;室壓力大於或是等於大約100 mTorr;施加小或是無RF偏壓功率於下電極(基板放置於其上);微波功率大約是1000 W;且處理時間大約是10秒。In one example, a masking layer treatment by an oxygen-containing plasma is performed in a plasma processing system. The conditions of the treatment include: the flow rate of the oxygen-containing gas ranges from about 100 sccm to about 500 sccm; the chamber pressure is greater than or equal to about 100 mTorr; and the small or no RF bias power is applied to the lower electrode (on which the substrate is placed) Applying approximately 500 W of RF power to the upper electrode (or induction coil); and the processing time is approximately 10 seconds. In another example, the masking process performed by the oxygenated plasma is to use a displaced (or remote) plasma source, such as a microwave powered plasma source. Processing conditions include: a flow rate of the oxygen-containing electric gas ranging from about 100 sccm to about 500 sccm; a chamber pressure greater than or equal to about 100 mTorr; applying a small or no RF bias power to the lower electrode (on which the substrate is placed) The microwave power is approximately 1000 W; and the processing time is approximately 10 seconds.

含鹵素電漿可以從Cl2 、Br2 、F2 、HBr、HCl、HF、C2 H4 Br2 、ClF3 、NF3 、SiCl4 、SF6 、或是其中兩者或是更多者的組合形成。含鹵素氣體的流動速度大約是10 sccm到大約1000 sccm,例如大約是100到300 sccm。室壓力在大約1 mTorr到大約1000 mTorr,所欲者為室壓力在大約20 mTorr到大約500 mTorr,更欲者為室壓力在20 mTorr到大約100 mTorr。含鹵素電漿更包含惰性氣體、鈍氣、N2 、H2 、或是CN。此外,含鹵素電漿更包含含氧氣體。發明人期望遮罩層暴露於缺少高能電子束的含鹵素電漿可以鈍化遮罩層的表面層,藉此幫助減少接下來的蝕刻處理中的遮罩層中的LER形成。The halogen-containing plasma may be from Cl 2 , Br 2 , F 2 , HBr, HCl, HF, C 2 H 4 Br 2 , ClF 3 , NF 3 , SiCl 4 , SF 6 , or both or more The combination is formed. The flow rate of the halogen-containing gas is about 10 sccm to about 1000 sccm, for example, about 100 to 300 sccm. The chamber pressure ranges from about 1 mTorr to about 1000 mTorr, with room pressures ranging from about 20 mTorr to about 500 mTorr, and more for chamber pressures from 20 mTorr to about 100 mTorr. The halogen-containing plasma further contains an inert gas, an inert gas, N 2 , H 2 , or CN. In addition, the halogen-containing plasma further contains an oxygen-containing gas. The inventors expect that exposure of the mask layer to a halogen-containing plasma lacking a high energy electron beam can passivate the surface layer of the mask layer, thereby helping to reduce LER formation in the mask layer in the subsequent etching process.

在一範例中,藉由含鹵素電漿的遮罩層處理係施行在實施蝕刻處理的電漿處理系統之中。處理條件包括:含鹵素氣體的流動速度在大約100 sccm到大約500 sccm;室壓力範圍在大約25 mTorr到大約50 mTorr;施加小或是無RF偏壓功率於下電極(基板放置於其上);施加大約100 W到大約500 W的RF功率在上電極(或是感應線圈);且處理時間大約是10秒。在另一範例中,藉由含鹵素電漿的遮罩層處理是使用移位(或是遠端)電漿源來實施的,例如微波動力電漿源。處理條件包括:含鹵素氣體的流動速度範圍在大約100 sccm到大約500 sccm;室壓力大於或是等於大約100 mTorr;施加小或是無RF偏壓功率於下電極(基板放置於其上);微波功率大約是1000W;且處理時間大約是10秒。In one example, a masking layer treatment by a halogen-containing plasma is performed in a plasma processing system that performs an etching process. Processing conditions include: a flow rate of the halogen-containing gas of from about 100 sccm to about 500 sccm; a chamber pressure ranging from about 25 mTorr to about 50 mTorr; applying a small or no RF bias power to the lower electrode (on which the substrate is placed) Applying about 100 W to about 500 W of RF power at the upper electrode (or induction coil); and the processing time is about 10 seconds. In another example, the masking process by the halogen-containing plasma is performed using a displaced (or remote) plasma source, such as a microwave powered plasma source. Processing conditions include: a flow rate of the halogen-containing gas ranging from about 100 sccm to about 500 sccm; a chamber pressure greater than or equal to about 100 mTorr; applying a small or no RF bias power to the lower electrode (on which the substrate is placed); The microwave power is approximately 1000 W; and the processing time is approximately 10 seconds.

惰性氣體電漿可以從惰性氣體,例如He、Ne、Ar、Xe、Kr或是其中兩者或更多者的組成形成。惰性氣體的流動速度大約是10 sccm到大約1000 sccm,例如大約是100到300 sccm。室壓力在大約1 mTorr到大約1000 mTorr,所欲者為室壓力在大約50 mTorr到大約500 mTorr,更欲者為室壓力在大約50 mTorr到大約200 mTorr。發明人相信惰性氣體的使用可以促進富含碳,或是「碳化的」遮罩層上的表面層的形成(亦即,例如耗盡O及H)。取決於衝擊遮罩層的離子的離子能量,「碳化的」表面層可以延伸好幾奈米(nm)到遮罩層之中(例如1到10 nm)。舉例而言,能量範圍在大約25到大約50 eV的離子應該可以穿透大約1 nm到大約2 nm。發明人期望此處理過的遮罩層可以幫助減少在接續的蝕刻處理中的遮罩層中的LER。The inert gas plasma may be formed of an inert gas such as He, Ne, Ar, Xe, Kr or a combination of two or more thereof. The flow rate of the inert gas is about 10 sccm to about 1000 sccm, for example, about 100 to 300 sccm. The chamber pressure ranges from about 1 mTorr to about 1000 mTorr, and the desired chamber pressure is from about 50 mTorr to about 500 mTorr, more preferably for chamber pressures from about 50 mTorr to about 200 mTorr. The inventors believe that the use of an inert gas can promote the formation of a surface layer on a carbon-rich or "carbonized" mask layer (i.e., for example, depleting O and H). The "carbonized" surface layer can extend a few nanometers (nm) into the mask layer (eg, 1 to 10 nm) depending on the ion energy of the ions striking the mask layer. For example, ions with energies ranging from about 25 to about 50 eV should be able to penetrate from about 1 nm to about 2 nm. The inventors expect that this treated mask layer can help reduce the LER in the mask layer in successive etching processes.

在一範例中,藉由惰性氣體電漿的遮罩層處理是在施行蝕刻處理的電漿處理系統中執行。處理條件包括:惰性氣體的流動速度範圍在大約100 sccm到大約300 sccm;室壓力範圍在大約25 mTorr到大約50 mTorr;施加小或是無RF偏壓功率於下電極(基板放置於其上);施加大約500 W到大約1000 W的RF功率於上電極(或是感應線圈);且處理時間大約是10秒。In one example, the masking process by inert gas plasma is performed in a plasma processing system that performs an etching process. Processing conditions include: a flow rate of the inert gas ranging from about 100 sccm to about 300 sccm; a chamber pressure ranging from about 25 mTorr to about 50 mTorr; applying a small or no RF bias power to the lower electrode (on which the substrate is placed) Applying about 500 W to about 1000 W of RF power to the upper electrode (or induction coil); and the processing time is about 10 seconds.

根據另一範例,在實施轉移形成在遮罩層中的圖案到底層的薄膜之前,先在遮罩層上形成保護層。形成在遮罩層上的保護層包含在蝕刻處理時被消耗掉或是部分消耗掉的材料層,且藉此可在蝕刻處理的早期保護遮罩層。或者,形成在遮罩層上的保護層可以提供在蝕刻處理時的增加的蝕刻抗性,特別是在蝕刻處理早期時提供增加的蝕刻抗性。According to another example, a protective layer is formed on the mask layer prior to performing the transfer of the pattern formed in the mask layer to the underlying film. The protective layer formed on the mask layer contains a layer of material that is consumed or partially consumed during the etching process, and thereby the mask layer can be protected early in the etching process. Alternatively, the protective layer formed on the mask layer can provide increased etch resistance during the etch process, particularly providing increased etch resistance during the early stages of the etch process.

遮罩層上的保護層的形成可以在實施蝕刻處理的電漿處理系統中施行,例如圖1中所示之電漿處理系統,或者,暴露也可以在不同於實施電漿處理系統的另一基板處理系統中施行。可以用在蝕刻處理時促進電漿形成的電漿產生系統在原位形成電漿,或是可以用耦合於實施蝕刻處理的電漿處理系統、或是分開的基板處理系統的遠端電漿產生系統來移位地形成電漿。The formation of the protective layer on the mask layer can be performed in a plasma processing system that performs an etching process, such as the plasma processing system shown in Figure 1, or the exposure can be performed in another different from the implementation of the plasma processing system. Executed in the substrate processing system. The plasma generation system that promotes plasma formation during etching can be used to form plasma in situ, or can be generated by a plasma processing system coupled to an etching process or a remote plasma processing of a separate substrate processing system. The system displaces the plasma.

在遮罩層之上形成保護層時,使用沉積氣體電漿,其中遮罩層暴露於沉積氣體電漿會導致材料淨沉積在基板表面上。遮罩層上的保護層的形成可以包括暴露遮罩層於沉積氣體電漿中,例如含碳氫化合物電漿(亦即,含Cx Hy 電漿,其中x及y是大於或是等於1的整數)、或是含氟碳化合物電漿(含Cx Fz 電漿,其中x及z是大於或是等於1的整數)、或是含碳氫氟電漿(含Cx Hy Fz 電漿,其中x、y及z是大於或是等於1的整數)、或是其中兩者或更多者的組合。遮罩層在缺少激發破壞鍵(例如高能的電子或是高能的光子)的情況下以沉積氣體電漿處理。含Cx Hy 電漿可以用C2 H4 、CH4 、C2 H2 、C2 H6 、C3 H4 、C3 H6 、C3 H8 、C4 H6 、C4 H8 、C4 H10 、C5 H8 、C5 H10 、C6 H6 、C6 H10 、C6 H12 、或是其中兩者或是更多者的組合形成。含Cx Fz 電漿可以用C2 F6 、CF4 、C3 F8 、C4 F8 、C5 F8 、C4 F6 、或是其中兩者或是更多者的組合形成。含Cx Hy Fz 電漿可以用CH3 F、C2 HF5 、CH2 F2 、或是CHF3 或是其中兩者或更多者的組合形成。When a protective layer is formed over the mask layer, a deposition gas plasma is used in which exposure of the mask layer to the deposition gas plasma results in a net deposition of material on the surface of the substrate. The formation of the protective layer on the mask layer may include exposing the mask layer to a deposition gas plasma, such as a hydrocarbon-containing plasma (ie, containing a C x H y plasma, where x and y are greater than or equal to An integer of 1), or a fluorocarbon plasma (containing C x F z plasma, where x and z are integers greater than or equal to 1), or a hydrofluorocarbon containing slurry (containing C x H y F z plasma, where x, y, and z are integers greater than or equal to 1, or a combination of two or more thereof. The mask layer is treated with a deposition gas plasma in the absence of a destructive bond (eg, high energy electrons or high energy photons). C 2 H 4 , CH 4 , C 2 H 2 , C 2 H 6 , C 3 H 4 , C 3 H 6 , C 3 H 8 , C 4 H 6 , C 4 H may be used for the C x H y- containing plasma. 8. C 4 H 10 , C 5 H 8 , C 5 H 10 , C 6 H 6 , C 6 H 10 , C 6 H 12 , or a combination of two or more thereof. The C x F z- containing plasma may be formed by a combination of C 2 F 6 , CF 4 , C 3 F 8 , C 4 F 8 , C 5 F 8 , C 4 F 6 , or a combination of two or more thereof. . The C x H y F z containing plasma may be formed using CH 3 F, C 2 HF 5 , CH 2 F 2 , or CHF 3 or a combination of two or more thereof.

選擇處理的條件以在使用上述的一或更多個沉積氣體的遮罩層上形成碳氫保護層、或是碳氟保護層、或是其組合。應該選擇處理條件以使形成在遮罩層中的圖案不被蓋上或是被「夾止」。保護層可以覆蓋平坦的平板。此外,保護層可以包含圖案上的一些突出,還能更包含一些遮罩層圖案側壁的覆蓋。舉例而言,應選擇處理條件以用來形成具有少許噴濺或是不具噴濺(亦即,在基板表面上時是低離子能量)的離子驅動沉積電漿(亦即,離子化物種的沉積)。沉積氣體的流動速度大約是10 sccm到大約1000 sccm,所欲者為流動速度的範圍在大約100 sccm到大約300 sccm,例如大約200 sccm。室壓力可以在大約1 mTorr到大約1000 mTorr,所欲者為室壓力在大約50 mTorr到大約500 mTorr,更欲者為室壓力在大約50 mTorr到大約200 mTorr。此外,沉積氣體電漿更包含稀釋氣體,例如惰性氣體。舉例而言,沉積氣體的流動速度範圍在氣體混合物的流動速度的大約1%到大約20%,且餘者包括稀釋氣體的流動速度。此外,舉例而言,沉積氣體的流動速度範圍在氣體混合物的大約5%到大約10%,且餘者包括稀釋氣體的流動速度。更進一步而言,沉積氣體亦可包括H2 、O2 、CO、CO2 、NO、N2 O、NO2 、N2 、CN、或是鈍氣、或是其中兩者或更多的組合。The conditions of the treatment are selected to form a hydrocarbon protective layer, or a fluorocarbon protective layer, or a combination thereof on the mask layer using the one or more deposition gases described above. The processing conditions should be chosen such that the pattern formed in the mask layer is not covered or "clamped". The protective layer can cover a flat plate. In addition, the protective layer may include some protrusions on the pattern, and may further include some coverage of the sidewalls of the mask layer pattern. For example, processing conditions should be selected to form ion-driven deposition plasmas with little or no sputtering (ie, low ion energy on the surface of the substrate) (ie, deposition of ionized species). ). The flow rate of the deposition gas is from about 10 sccm to about 1000 sccm, and the flow rate is desirably in the range of from about 100 sccm to about 300 sccm, for example about 200 sccm. The chamber pressure can range from about 1 mTorr to about 1000 mTorr, with a chamber pressure of from about 50 mTorr to about 500 mTorr, and a chamber pressure of from about 50 mTorr to about 200 mTorr. In addition, the deposition gas plasma further contains a diluent gas such as an inert gas. For example, the flow rate of the deposition gas ranges from about 1% to about 20% of the flow rate of the gas mixture, and the remainder includes the flow rate of the diluent gas. Further, for example, the flow rate of the deposition gas ranges from about 5% to about 10% of the gas mixture, and the remainder includes the flow rate of the diluent gas. Further, the deposition gas may also include H 2 , O 2 , CO, CO 2 , NO, N 2 O, NO 2 , N 2 , CN, or blunt gas, or a combination of two or more thereof. .

在一範例中,在沉積CF(亦即CX FZ )聚合物時,可以使用例如包含或是不包含CF4 的C4 F8 或是C4 F6 的沉積氣體。處理條件包括:稀釋氣體的流動速度範圍在大約100 sccm到大約500 sccm;沉積氣體的流動速度範圍在稀釋氣體流動速度範圍的大約1%到大約20%;室壓力的範圍在大約50 mTorr到大約200 mTorr;施加小或是無RF偏壓功率於下電極(基板設置於其上);施加大約500 W到大約1500 W的RF功率到上電極(或是感應線圈);且處理時間足以形成厚度範圍在大約好幾nm到大約200 nm的薄膜。In one example, a deposition gas such as C 4 F 8 or C 4 F 6 with or without CF 4 may be used in the deposition of CF (ie, C X F Z ) polymer. The processing conditions include: the flow rate of the diluent gas ranges from about 100 sccm to about 500 sccm; the flow rate of the deposition gas ranges from about 1% to about 20% of the flow rate of the dilution gas; and the chamber pressure ranges from about 50 mTorr to about 200 mTorr; apply small or no RF bias power to the lower electrode (on which the substrate is placed); apply approximately 500 W to approximately 1500 W of RF power to the upper electrode (or induction coil); and processing time is sufficient to form a thickness Films ranging from about a few nm to about 200 nm.

在另一範例中,沉積CH(亦即Cx Hy )聚合物時,處理條件包括:稀釋氣體的流動速度範圍在大約100 sccm到大約500 sccm;沉積氣體的流動速度是稀釋氣體流動速度範圍的大約1%到大約20%;室壓力的範圍在大約50 mTorr到大約200 mTorr;施加小或是無RF偏壓功率於下電極(基板設置於其上);施加大約500 W到大約1500 W的RF功率到上電極(或感應線圈);且處理時間足以形成厚度範圍在大約好幾nm到大約200 nm的薄膜。In another example, when the CH (ie, C x H y ) polymer is deposited, the processing conditions include: the flow rate of the diluent gas ranges from about 100 sccm to about 500 sccm; and the flow rate of the deposition gas is the range of the dilution gas flow rate. From about 1% to about 20%; chamber pressure in the range of about 50 mTorr to about 200 mTorr; applying little or no RF bias power to the lower electrode (on which the substrate is placed); applying about 500 W to about 1500 W The RF power is applied to the upper electrode (or induction coil); and the processing time is sufficient to form a film having a thickness ranging from about several nm to about 200 nm.

既然發明人相信CF薄膜在蝕刻處理中提供相對更高的蝕刻抗性,因此相對於CF薄膜來說,CH薄膜保護層所需之厚度較大。保護層的最小厚度應該根據蝕刻處理中的帶電物種的穿透厚度來選擇。舉例而言,具有大約50 nm厚度的薄膜會需要1 keV的電子束,具有大約100 nm厚度的薄膜會需要1.5 keV的電子束。Since the inventors believe that the CF film provides relatively higher etching resistance in the etching process, the thickness of the CH thin film protective layer is required to be larger than that of the CF film. The minimum thickness of the protective layer should be selected according to the penetration thickness of the charged species in the etching process. For example, a film having a thickness of about 50 nm would require an electron beam of 1 keV, and a film having a thickness of about 100 nm would require an electron beam of 1.5 keV.

在又另一範例中,遮罩層上之保護層的形成包括把遮罩層浸在醇類中,例如甲醇或是乙醇。In yet another example, the formation of the protective layer on the mask layer includes immersing the mask layer in an alcohol, such as methanol or ethanol.

發明人期望使用碳氫基化學物或是碳氫氟基化合物的遮罩層上的保護層的形成會增加遮罩層的表面的氫含量,藉此在蝕刻處理的初期調變高能的電子。藉著在蝕刻處理的初期減輕高能電子造成的損害,保護層可以幫助減少在接下來的蝕刻處理中的遮罩層中的LER。此外,發明人期望使用碳氫基化學物或是碳氫氟基化合物的遮罩層上的保護層的形成可以促進在蝕刻處理時提供額外蝕刻抗性的聚合物薄膜的形成。增加改質後的遮罩層的蝕刻選擇度可以幫助在接下來的蝕刻處理中減少遮罩層中的LER。The inventors expect that the formation of a protective layer on the mask layer using a hydrocarbon-based chemical or a hydrofluoro-based compound increases the hydrogen content of the surface of the mask layer, thereby modulating high-energy electrons at the beginning of the etching process. By mitigating damage caused by high energy electrons at the beginning of the etching process, the protective layer can help reduce the LER in the mask layer in the subsequent etching process. Furthermore, the inventors expect that the formation of a protective layer on the mask layer using a hydrocarbon-based chemical or a hydrofluoro-based compound can promote the formation of a polymer film that provides additional etch resistance during the etching process. Increasing the etch selectivity of the modified mask layer can help reduce the LER in the mask layer during the subsequent etching process.

根據又另一實施例,在施行蝕刻處理之前,遮罩層是在缺少原子狀態之鹵素物種(亦即F、Cl、Br等者)的情況下,藉由電子束所處理的。發明人期望暴露遮罩層於缺少原子狀態之鹵素物種的電子束中會「治癒」或是硬化遮罩層之表面層,因此使遮罩層在蝕刻處理中較不易形成LER。According to still another embodiment, the mask layer is treated by an electron beam in the absence of an atomic state of the halogen species (i.e., F, Cl, Br, etc.) prior to performing the etching process. The inventors desire to expose the mask layer to "cure" or harden the surface layer of the mask layer in the electron beam of the halogen species lacking atomic state, thus making the mask layer less prone to form LER during the etching process.

暴露遮罩層於電子束可以在施行蝕刻處理的電漿處理系統中執行,例如圖1所示之電漿處理系統,或者暴露步驟也可以在不同於施行蝕刻處理的電漿處理系統的另一基板處理系統中實施。舉例而言,電子束源可以耦合於(以蝕刻處理為目的之)電漿處理系統或是其他基板處理系統,且能用來產生處理遮罩層的電子束。Exposing the mask layer to the electron beam can be performed in a plasma processing system that performs an etching process, such as the plasma processing system shown in FIG. 1, or the exposing step can also be performed in another plasma processing system different from the etching process. Implemented in a substrate processing system. For example, the electron beam source can be coupled to a plasma processing system (for etching processing purposes) or other substrate processing system, and can be used to generate an electron beam that processes the mask layer.

或者,舉例而言,電子束可以藉由耦合直流(DC)電源至電漿處理系統(如圖1、及以下的圖2到圖7所示的)中之電極而在電漿處理系統中產生,並產生電漿。參照圖1,可以藉由耦合交流(AC)電源,例如射頻(RF)電源,至第一電極120、或是第二電極172、或是此二者,以形成預先蝕刻電漿,且可以藉由耦合DC電源至第二電極172以形成電子束。Alternatively, for example, the electron beam can be generated in a plasma processing system by coupling a direct current (DC) power source to an electrode in a plasma processing system (as shown in Figures 1 and 2 and Figures 7 through 7 below). And produce plasma. Referring to FIG. 1, a pre-etched plasma can be formed by coupling an alternating current (AC) power source, such as a radio frequency (RF) power source, to the first electrode 120, or the second electrode 172, or both. A DC power source is coupled to the second electrode 172 to form an electron beam.

使用預先蝕刻電子束,可以在蝕刻處理之前先處理遮罩層的表面層。處理深度的範圍從大約1 nm到大約100 nm,所欲者為處理深度範圍從大約5 nm到大約50 nm,例如10 nm。可以利用能量範圍在大約500 eV到大約1.5 keV的電子束來達成該穿透深度。預先蝕刻電子束的能量可高達1.5 keV,且所欲範圍為大約200 eV到大約1.5 keV,例如500 eV。可選擇預先蝕刻電子束暴露以製造劑量範圍在大約1014 個電子每平方公分(cm-2 )到大約1016 個電子cm-2Using a pre-etched electron beam, the surface layer of the mask layer can be treated prior to the etching process. The processing depth ranges from about 1 nm to about 100 nm, and the desired depth ranges from about 5 nm to about 50 nm, such as 10 nm. This penetration depth can be achieved with an electron beam having an energy ranging from about 500 eV to about 1.5 keV. The energy of the pre-etched electron beam can be as high as 1.5 keV, and the desired range is from about 200 eV to about 1.5 keV, such as 500 eV. The pre-etched electron beam exposure can be selected to produce a dose ranging from about 10 14 electrons per square centimeter (cm -2 ) to about 10 16 electron cm -2 .

在一範例中,預先蝕刻電子束是形成在圖1的電漿處理系統中。處理條件包括:惰性氣體的流動速度範圍在大約100 sccm到大約300 sccm;室壓力範圍在大約20 mTorr到大約100 mTorr;施加小或是無RF偏壓功率於下電極(基板設置於其上);施加範圍大約在500 W到大約1000 W的RF功率於上電極(或是感應線圈);施加範圍在大約-500 V到大約-1000 V的DC電壓於上電極;且處理時間大約是10秒。In one example, the pre-etched electron beam is formed in the plasma processing system of FIG. Processing conditions include: a flow rate of the inert gas ranging from about 100 sccm to about 300 sccm; a chamber pressure ranging from about 20 mTorr to about 100 mTorr; applying a small or no RF bias power to the lower electrode (on which the substrate is placed) Applying RF power ranging from approximately 500 W to approximately 1000 W to the upper electrode (or induction coil); applying a DC voltage ranging from approximately -500 V to approximately -1000 V to the upper electrode; and processing time is approximately 10 seconds .

可以用惰性氣體形成預先蝕刻電漿,例如鈍氣(亦即He、Ne、Ar、Xe、Kr)。此外,預先蝕刻電漿更包含CHF3 。在電漿的出現中,CHF3 的解離有產生CF2 (例如,形成聚合物的自由基)及(離子化連接的)HF的傾向。形成聚合物的自由基對於藉由設置如上述的犧牲層的遮罩層處理有益處。然而,重要的是,為了要在減少上述的LER問題時處理遮罩層。應該選擇(除了形成電漿的惰性氣體之外的)額外氣體以使電漿中缺少原子狀態之鹵素物種。The pre-etched plasma may be formed with an inert gas such as an inert gas (i.e., He, Ne, Ar, Xe, Kr). In addition, the pre-etched plasma further contains CHF 3 . Appears in the plasma, CHF 3 from the solution has a tendency to produce CF 2 (e.g., to form a polymer radical) and (ionization connection) of the HF. The free radicals forming the polymer are beneficial for the treatment of the mask layer by providing a sacrificial layer as described above. However, it is important to process the mask layer in order to reduce the LER problem described above. Additional gases (other than the inert gas forming the plasma) should be selected to minimize the absence of atomic halogen species in the plasma.

可以藉由預先蝕刻電子束及預先蝕刻電漿處理遮罩層一段預定的時間,例如10秒。更進一步,執行預先蝕刻電子束大約1到30秒,所欲者為執行預先蝕刻電子束大約2到20秒,例如大約10秒。在此處理之後,利用蝕刻氣體形成蝕刻電漿、蝕刻電子束,且藉由暴露基板與處理過的遮罩層於蝕刻電子束及蝕刻電漿中來進行蝕刻處理。預先蝕刻電子束的能量可以選擇接近等於蝕刻電子束的能量,或是預先蝕刻電子束的能量可以選擇少於蝕刻電子束的能量。例如,預先蝕刻電子束的能量可以是大約500 eV,而蝕刻電子束的能量可以是大約1500 eV。電子束的能量(或是施加於圖1中的第二電極172的電壓)可以在預先蝕刻處理的時候以如階梯方式增大,或是能在預先蝕刻處理的時候斜坡式增大。此外,電子束的能量(或是施加於圖1中的第二電極172的電壓)可以是脈衝式的。例如,施加於第二電極172的電壓可以在大約0 V及大約-1500 V之間脈衝,所欲者為電壓可以在大約-100 V及大約-1500 V之間脈衝,或是更欲者為,電壓可以在大約-500 V及大約-1500 V之間脈衝。The mask layer can be treated by pre-etching the electron beam and pre-etching the plasma for a predetermined period of time, such as 10 seconds. Further, the electron beam is pre-etched for about 1 to 30 seconds, and the desired one is to perform pre-etching of the electron beam for about 2 to 20 seconds, for example, about 10 seconds. After this treatment, an etching plasma is used to form an etching plasma, an electron beam is etched, and an etching process is performed by exposing the substrate and the processed mask layer to etch the electron beam and etching the plasma. The energy of the pre-etched electron beam can be selected to be approximately equal to the energy of the etched electron beam, or the energy of the pre-etched electron beam can be selected to be less than the energy of the etched electron beam. For example, the energy of the pre-etched electron beam can be about 500 eV, and the energy of the etched electron beam can be about 1500 eV. The energy of the electron beam (or the voltage applied to the second electrode 172 in Fig. 1) may be increased in a stepwise manner at the time of the pre-etching treatment, or may be ramped up at the time of the pre-etching treatment. Further, the energy of the electron beam (or the voltage applied to the second electrode 172 in FIG. 1) may be pulsed. For example, the voltage applied to the second electrode 172 can be pulsed between about 0 V and about -1500 V, and the voltage can be pulsed between about -100 V and about -1500 V, or more preferably The voltage can be pulsed between approximately -500 V and approximately -1500 V.

遮罩層的預先蝕刻電子束處理亦可使用含氧電漿、或是含鹵素電漿、或是惰性氣體電漿作為遮罩層之前處理。此外,亦可在遮罩層上之保護層的形成之前達成遮罩層的預先蝕刻電子束處理。例如,預先處理電子束可以在保護層之形成時,為了聚合物的成長預備遮罩層之表面。The pre-etched electron beam treatment of the mask layer may also be treated with an oxygen-containing plasma, or a halogen-containing plasma, or an inert gas plasma as a mask layer. Furthermore, a pre-etched electron beam treatment of the mask layer can also be achieved prior to the formation of the protective layer on the mask layer. For example, the pre-processed electron beam can prepare the surface of the mask layer for the growth of the polymer when the protective layer is formed.

這些實施例可以用於任何如下所示之類型的電漿處理系統中。These embodiments can be used in any plasma processing system of the type shown below.

參照圖2,根據本發明之實施例,顯示出一種用來在以彈道式電子束加強電漿來蝕刻底下層之前處理遮罩層的電漿處理系統。電漿處理系統1包含促進電漿形成的電漿處理室8、基板支座2,耦合於電漿處理室8且用來支撐基板3、電極9,耦合於電漿處理室8並用來接觸電漿。此外,電漿處理系統1包含AC電源系統4,耦合於電漿處理室8並為了形成電漿而耦合至少一個AC信號至基板支座2、或是電極9、或是兩者皆是、及DC電源系統5,耦合於電漿處理室8並為了形成通過電漿的彈道電子束而耦合DC電壓至電極9。Referring to Figure 2, in accordance with an embodiment of the present invention, a plasma processing system for treating a mask layer prior to etching a bottom layer with a ballistic electron beam reinforced plasma is shown. The plasma processing system 1 comprises a plasma processing chamber 8 for promoting plasma formation, a substrate holder 2, is coupled to the plasma processing chamber 8 and is used to support the substrate 3, the electrode 9, is coupled to the plasma processing chamber 8 and is used for contacting electricity. Pulp. In addition, the plasma processing system 1 includes an AC power system 4 coupled to the plasma processing chamber 8 and coupled to at least one AC signal to the substrate holder 2, or the electrode 9, or both for forming a plasma. The DC power system 5 is coupled to the plasma processing chamber 8 and couples a DC voltage to the electrode 9 in order to form a ballistic electron beam through the plasma.

更進一步,電漿處理系統1包含處理氣體分佈系統6,耦合於電漿處理室8,且用來引入任何上述實施例中的氣體至電漿處理室8。更進一步之另一者,電漿處理系統1包含真空幫浦系統(未顯示),耦合於電漿處理室8,並用來從處理室消除氣體。Still further, the plasma processing system 1 includes a process gas distribution system 6, coupled to the plasma processing chamber 8, and used to introduce the gases of any of the above embodiments to the plasma processing chamber 8. Still further, the plasma processing system 1 includes a vacuum pumping system (not shown) coupled to the plasma processing chamber 8 and used to remove gas from the processing chamber.

選擇性的,電漿處理系統1更包含控制器7,耦合於電漿處理室8、基板支座2、AC電源系統4、DC電源系統5、及處理氣體分佈系統6,並為了在電漿處理室8中執行處理基板3的處理,與這些元件交換資料。電漿處理系統1可以促進基板3上之遮罩層的處理、或是基板3之蝕刻處理、或是兩者皆是。Optionally, the plasma processing system 1 further comprises a controller 7 coupled to the plasma processing chamber 8, the substrate holder 2, the AC power system 4, the DC power system 5, and the process gas distribution system 6, and for the purpose of plasma Processing of the processing substrate 3 is performed in the processing chamber 8, and data is exchanged with these components. The plasma processing system 1 can facilitate the processing of the mask layer on the substrate 3, or the etching process of the substrate 3, or both.

圖3顯示根據另一實施例之電漿處理系統。電漿處理系統1a包含電漿處理室10、固定將被處理之基板25在其上之基板支座20、及真空幫浦系統30。基板25可以是半導體基板、晶圓、或是液晶顯示器。電漿處理室10可以促進鄰近基板25表面之處理區域15的電漿產生。通過氣體注入系統(未顯示)引入可離子化的氣體或是氣體混合物,並調整處理壓力。舉例而言,控制機構(未顯示)可以用來調節真空幫浦系統30。電漿可以用來製造特別用於預定材料處理中的材料、及/或輔助從基板25之暴露表面移除材料。電漿處理系統1a可以用來處理任何尺寸之基板,例如200 mm的基板、300 mm的基板、或是更大的基板。Figure 3 shows a plasma processing system in accordance with another embodiment. The plasma processing system 1a includes a plasma processing chamber 10, a substrate holder 20 on which the substrate 25 to be processed is fixed, and a vacuum pumping system 30. The substrate 25 may be a semiconductor substrate, a wafer, or a liquid crystal display. The plasma processing chamber 10 can promote plasma generation of the processing region 15 adjacent the surface of the substrate 25. An ionizable gas or gas mixture is introduced through a gas injection system (not shown) and the process pressure is adjusted. For example, a control mechanism (not shown) can be used to adjust the vacuum pump system 30. The plasma can be used to make materials that are particularly useful in the processing of predetermined materials, and/or to assist in removing material from the exposed surfaces of the substrate 25. The plasma processing system 1a can be used to process substrates of any size, such as a 200 mm substrate, a 300 mm substrate, or a larger substrate.

基板25通過電子穩態箝位系統固定於基板支座20。更進一步,基板支座20更包含含有在冷卻時從基板支座20接收熱量並把熱量轉換到熱量交換系統(未顯示)的循環液流的冷卻系統、或是在加熱時從熱量交換系統轉換熱量到液流的加熱系統。此外,可以通過後側氣體系統輸送氣體至基板25之後側,以改善基板25及基板支座20之間的氣隙熱傳導。可以在基板需要溫度控制在升高的或是降低的溫度時使用此種系統。舉例而言,後側氣體系統可以包含雙區氣體分佈系統,其中後側氣體(例如氦)壓力可以在基板25的中央及邊緣之間獨立地變更。在其他實施例中,加熱/冷卻元件,例如阻抗性加熱元件或是電熱式加熱器/冷卻器,可以包含於基板支座20中,而電漿處理室10的室壁及任何其他電漿處理系統1a中的元件也能包含於電漿處理系統1a中。The substrate 25 is fixed to the substrate holder 20 by an electronic steady state clamping system. Further, the substrate holder 20 further includes a cooling system containing a circulating liquid stream that receives heat from the substrate holder 20 upon cooling and converts heat to a heat exchange system (not shown), or converts from a heat exchange system upon heating. Heat to liquid heating system. Further, gas can be transported to the rear side of the substrate 25 through the rear side gas system to improve air gap heat conduction between the substrate 25 and the substrate holder 20. Such a system can be used when the substrate requires temperature control at elevated or reduced temperatures. For example, the backside gas system can include a dual zone gas distribution system in which the backside gas (eg, helium) pressure can be independently varied between the center and the edge of the substrate 25. In other embodiments, a heating/cooling element, such as a resistive heating element or an electrothermal heater/cooler, may be included in the substrate support 20 while the chamber walls of the plasma processing chamber 10 and any other plasma treatments Elements in system 1a can also be included in the plasma processing system 1a.

如圖3所示之實施例中,基板支座20包含一電極,在處理區域15之內RF電源通過此電極耦合於處理電漿。例如,可以使RF產生器40之RF功率通過耦合於基板支座20的擇用的阻抗匹配網路42轉移至基板支座20,而使基板支座20電偏壓於RF電壓。RF偏壓可用於加熱電子以形成並維持電漿、或是影響在其中的離子能量分佈函數、或是兩者皆是。在此組成中,系統可以操作如同反應離子蝕刻(RIE)反應器,其中處理室可以作為接地面。電型的RF偏壓頻率範圍大概是從0.1 MHz到100 MHz。電漿處理所使用之RF系統是熟知此技藝者所廣知的。In the embodiment shown in FIG. 3, substrate support 20 includes an electrode through which RF power is coupled to the processing plasma within processing region 15. For example, RF power of RF generator 40 can be transferred to substrate holder 20 via an optional impedance matching network 42 coupled to substrate holder 20, while substrate holder 20 is electrically biased to the RF voltage. The RF bias can be used to heat electrons to form and maintain plasma, or to affect the ion energy distribution function therein, or both. In this composition, the system can operate as a reactive ion etching (RIE) reactor where the processing chamber can act as a ground plane. The RF bias frequency range of the electrical type is approximately from 0.1 MHz to 100 MHz. RF systems used in plasma processing are well known to those skilled in the art.

更進一步,為了要影響基板25的電子束通量的空間分佈,可以調變耦合於基板支座20的RF電源的振幅。額外的細節可在在2006年7月31日所提出之美國專利申請案第11/XXXXXX號中找到,其發明名稱為「藉由RF調變來控制彈道電子束的均勻度的方法及系統」;其全部內容在此作為參考資料。Further, in order to influence the spatial distribution of the electron beam flux of the substrate 25, the amplitude of the RF power source coupled to the substrate holder 20 can be modulated. Additional details can be found in U.S. Patent Application Serial No. 11/XXXXXX, filed on Jul. 31, 2006, entitled,,,,,,,,,,,,,,, The entire contents of this are hereby incorporated by reference.

更進一步,阻抗匹配網路42可藉由減少反射能量來改善在電漿處理室10中的RF能量轉換成電漿。匹配網路拓樸學(例如L型、π型、T型等者)及自動化控制方法是熟知本技藝者所廣知的。Still further, the impedance matching network 42 can improve the conversion of RF energy into the plasma in the plasma processing chamber 10 by reducing the reflected energy. Matching network topologies (e.g., L-type, π-type, T-type, etc.) and automated control methods are well known to those skilled in the art.

仍然參照圖3,電漿處理系統1a更包含耦合於面對著基板25的上電極52的直流(DC)電源供應器50。上電極52可以包含電極板。電極板可以包含含矽電極板。此外,電極板可以包含摻雜的矽電極板。DC電源供應器可以包括可變的DC電源供應器。此外,DC電源供應器可以包括雙極性DC電源供應器。DC電源供應器50可以更包含用來實施監視、調整或是控制極性、電流、電壓、及DC電源供應器50的on/off狀態其中至少一個的系統。一但電漿形成,DC電源供應器50促進彈道電子束的形成。可以用電濾波器來從DC電源供應器50退耦RF電源。Still referring to FIG. 3, the plasma processing system 1a further includes a direct current (DC) power supply 50 coupled to the upper electrode 52 facing the substrate 25. The upper electrode 52 may include an electrode plate. The electrode plate may comprise a ruthenium containing electrode plate. Furthermore, the electrode plates may comprise doped yttrium electrode plates. The DC power supply can include a variable DC power supply. Additionally, the DC power supply can include a bipolar DC power supply. The DC power supply 50 can further include a system for performing at least one of monitoring, adjusting, or controlling the polarity, current, voltage, and on/off state of the DC power supply 50. Once the plasma is formed, the DC power supply 50 promotes the formation of a ballistic electron beam. An electrical filter can be used to decouple the RF power from the DC power supply 50.

舉例而言,由DC電源供應器50施加於電極52的DC電壓的範圍從大約-2000伏特(V)到大約1000 V。所欲者為,DC電壓的絕對值等於或是大於大約100 V,且更欲者為,DC電壓的絕對值等於或是大於大約500 V。此外,所欲者為DC電壓具有負極性。更進一步,是負電壓的DC電壓具有大於從上電極52的表面所產生的自身偏壓的絕對值。面對基板支座20之上電極52的表面可以包含於含矽材料中。For example, the DC voltage applied to electrode 52 by DC power supply 50 ranges from approximately -2000 volts (V) to approximately 1000 V. The desired value is that the absolute value of the DC voltage is equal to or greater than about 100 V, and more preferably, the absolute value of the DC voltage is equal to or greater than about 500 V. In addition, the desired voltage is negative for the DC voltage. Further, the DC voltage of the negative voltage has an absolute value larger than the self-bias generated from the surface of the upper electrode 52. The surface facing the electrode 52 above the substrate holder 20 may be included in the ruthenium containing material.

真空幫浦系統30可以包括幫浦速度高達每秒5000公升(及更大)的渦輪分子真空幫浦(TMP)、及調節室壓力的閘門閥。在習知的用於乾式電漿蝕刻的電漿處理裝置中,可以用每秒1000到3000公升的TMP。TMP可以用在較低的壓力處理,通常少於50 mTorr。在高壓力處理(亦即大於100 mTorr),可以使用機械推進器幫浦及乾式粗抽幫浦。更進一步,可以耦合用來監視室壓力的裝置(未顯示)於電漿處理室10。壓力測量裝置可以是,例如從MKS Instruments,Inc.(Andover,MA)商業上可獲得的Type 628B Baratron絕對電容壓力計。The vacuum pump system 30 can include a turbo molecular vacuum pump (TMP) with a pump speed of up to 5000 liters per second (and greater), and a gate valve that regulates chamber pressure. In a conventional plasma processing apparatus for dry plasma etching, TMP of 1000 to 3000 liters per second can be used. TMP can be used at lower pressures, typically less than 50 mTorr. At high pressures (ie greater than 100 mTorr), mechanical thrusters and dry rough pumps can be used. Still further, means (not shown) for monitoring chamber pressure may be coupled to the plasma processing chamber 10. The pressure measuring device can be, for example, a Type 628B Baratron absolute capacitance manometer commercially available from MKS Instruments, Inc. (Andover, MA).

仍然參照圖3,電漿處理系統1a更包含含有微處理器、記憶體、數位I/O埠的控制器90,控制器9O能夠產生足以傳達並啟動電漿處理系統1a的輸入、並肩式電漿處理系統1a的輸出的控制電壓。此外,控制器90可以耦合於RF產生器40、阻抗匹配網路42、DC電源供應器50、氣體注入系統(未顯示)、真空幫浦系統30、後側氣體傳送系統(未顯示)、基板/基板支座溫度量測系統(未顯示)、及/或是電子穩態箝位系統(未顯示),並與其交換資訊。為了要實施蝕刻薄膜的方法,儲存於記憶體中的程式可以根據處理的教示來啟動上述之電漿處理系統之元件。控制器90的一例為從Dell Corporation,Austin,Texas可獲得的DELL PRECISION WOPKSTATION 610TMStill referring to FIG. 3, the plasma processing system 1a further includes a controller 90 including a microprocessor, a memory, and a digital I/O port. The controller 90 is capable of generating an input sufficient to communicate and activate the plasma processing system 1a. The control voltage of the output of the slurry processing system 1a. Additionally, controller 90 can be coupled to RF generator 40, impedance matching network 42, DC power supply 50, gas injection system (not shown), vacuum pump system 30, rear side gas delivery system (not shown), substrate / Substrate support temperature measurement system (not shown), and / or electronic steady state clamp system (not shown), and exchange information with it. In order to implement the method of etching the film, the program stored in the memory can activate the components of the plasma processing system described above in accordance with the teachings of the process. One case the controller 90 from Dell Corporation, Austin, Texas obtainable DELL PRECISION WOPKSTATION 610 TM.

控制器90可以位於電漿處理系統1a的相對近端,或是也能通過網路或是內部網路而位於電漿處理系統1a的相對遠端。因此,控制器90可以使用直接連結、內部網路、或是網路的其中至少一個與電漿處理系統1a交換資料。控制器90可以耦合於客戶端(亦即裝置製造商等者)的內部網路、或是耦合於販賣端(亦及設備製造商)。更進一步,另一台電腦(亦及控制器、伺服器等者)可以通過直接連結、內部網路、或是網路的其中至少一個來存取控制器90以交換資料。The controller 90 can be located at the relatively proximal end of the plasma processing system 1a or can be located at the opposite distal end of the plasma processing system 1a via a network or internal network. Thus, controller 90 can exchange data with plasma processing system 1a using at least one of a direct link, an internal network, or a network. Controller 90 can be coupled to the internal network of the client (i.e., device manufacturer, etc.) or to the vendor (and device manufacturer). Further, another computer (also a controller, a server, etc.) can access the controller 90 to exchange data through at least one of a direct connection, an internal network, or a network.

在圖4所示的實施例中,電漿處理系統1b類似於圖2或3所示之實施例,且為了要潛在地增加電漿密度及/或是改善電漿處理的均勻度,除了如參照圖2所述之元件之外,更包含靜止部、或是機械或是電力旋轉的磁場系統60。此外,為了要調整旋轉速度及場強度,控制器90可以耦合於磁場系統60。旋轉磁場的設計及應用是熟知本技藝者所廣知的。In the embodiment illustrated in Figure 4, the plasma processing system 1b is similar to the embodiment illustrated in Figures 2 or 3, and in order to potentially increase the plasma density and/or improve the uniformity of the plasma treatment, except In addition to the components described in FIG. 2, a stationary portion, or a mechanical or electrical rotating magnetic field system 60 is included. Additionally, controller 90 may be coupled to magnetic field system 60 in order to adjust rotational speed and field strength. The design and application of rotating magnetic fields are well known to those skilled in the art.

在圖5所示的實施例中,電漿處理系統1c類似於圖2及圖3所示之實施例,且更包含通過選用的阻抗匹配網路72耦合RF電源到上電極52的RF產生器70。典型應用在上電極52的RF電源頻率範圍在大約0.1 MHz到大約200 MHz。此外,典型應用在基板支座2O的電源頻率範圍在大約0.1 MHz到大約100 MHz。舉例而言,耦合於上電極52的RF頻率可以是相對高於耦合於基板支座20的RF頻率。更進一步,RF產生器70產生到上電極52的RF電源可以是振幅調變的、或是RF產生器40產生到基板支座20的RF電源可以是振幅調變的、或是二RF電源皆可是振幅調變的。所欲者為,較高RF頻率之RF電源為振幅調變的。此外,為了要控制RF電源施加於上電極70,控制器90耦合於RF產生器70及阻抗匹配網路72。上電極的設計及應用式熟知本技藝者所廣知的。In the embodiment illustrated in FIG. 5, the plasma processing system 1c is similar to the embodiment illustrated in FIGS. 2 and 3, and further includes an RF generator that couples RF power to the upper electrode 52 via an optional impedance matching network 72. 70. Typical RF power supply frequencies for the upper electrode 52 range from about 0.1 MHz to about 200 MHz. In addition, typical application power supply frequencies for the substrate support 2O range from about 0.1 MHz to about 100 MHz. For example, the RF frequency coupled to the upper electrode 52 can be relatively higher than the RF frequency coupled to the substrate support 20. Further, the RF power generated by the RF generator 70 to the upper electrode 52 may be amplitude-modulated, or the RF power generated by the RF generator 40 to the substrate holder 20 may be amplitude-modulated or both RF power supplies. However, the amplitude is modulated. As desired, the RF power supply at a higher RF frequency is amplitude modulated. Additionally, in order to control the application of RF power to the upper electrode 70, the controller 90 is coupled to the RF generator 70 and the impedance matching network 72. The design and application of the upper electrode are well known to those skilled in the art.

仍然參照圖5,DC電源供應器50可以直接耦合至上電極52、或也可以耦合至從阻抗匹配網路72之輸出端延伸出的RF傳輸線以連接至上電極52。可以用電濾波器來從DC電源供應器退耦RF電源。Still referring to FIG. 5, the DC power supply 50 can be coupled directly to the upper electrode 52, or can also be coupled to an RF transmission line extending from the output of the impedance matching network 72 to connect to the upper electrode 52. An electrical filter can be used to decouple the RF power from the DC power supply.

在圖6所示之實施例中,電漿處理系統1d可以類似於圖2、3、及4所示之實施例,且能更包含經由RF產生器82通過選用的阻抗匹配器84耦合RF電源的感應線圈80。RF電源係從感應線圈80通過介電窗(未顯示)感應地耦合於處理區域15。典型應用於感應線圈80的RF頻率範圍在大約10 MHz到大約100 MHz。相似地,典型應用於基板支座20的電源頻率範圍在大約0.1 MHz到大約100 MHz。此外,可以使用切槽式Faraday屏蔽(未顯示)以降低在感應線圈80及電漿之間的電容性耦合。此外,為了要控制施加至感應線圈80的電源,控制器90耦合於RF產生器82及阻抗匹配網路84。在替換性的實施例中,感應線圈80可以是如變壓器耦合電漿(TCP)反應器中之從上面與處理區域15連接的「螺線管形」線圈或是「薄餅狀」線圈。感應耦合電漿(ICP)源、或是電漿耦合變壓器(TCP)源的設計及應用式熟知本技藝者所廣知的。In the embodiment shown in FIG. 6, the plasma processing system 1d can be similar to the embodiment shown in FIGS. 2, 3, and 4, and can further include coupling RF power through the selected impedance matcher 84 via the RF generator 82. Induction coil 80. The RF power source is inductively coupled to the processing region 15 from the induction coil 80 through a dielectric window (not shown). The RF frequency typically applied to the induction coil 80 ranges from about 10 MHz to about 100 MHz. Similarly, power supply frequencies typically applied to substrate support 20 range from about 0.1 MHz to about 100 MHz. Additionally, a slotted Faraday shield (not shown) can be used to reduce capacitive coupling between the induction coil 80 and the plasma. Additionally, controller 90 is coupled to RF generator 82 and impedance matching network 84 in order to control the power applied to induction coil 80. In an alternative embodiment, the induction coil 80 can be a "spigot-shaped" coil or a "pancake-like" coil that is connected to the processing region 15 from above, such as in a transformer coupled plasma (TCP) reactor. The design and application of inductively coupled plasma (ICP) sources, or plasma coupled transformer (TCP) sources are well known to those skilled in the art.

或者,電漿可以用電子迴旋加速震盪器(ECR)形成。在又另一實施例中,電漿從發射Helicon波而形成。在又另一實施例中,電漿係從傳播表面波形成。上述之各個電漿源是熟知本技藝者所廣知的。Alternatively, the plasma can be formed using an electron cyclotron oscillating oscillator (ECR). In yet another embodiment, the plasma is formed by emitting a Helicon wave. In yet another embodiment, the plasma is formed from a propagating surface wave. Each of the above plasma sources is well known to those skilled in the art.

在圖7所示之實施例中,電漿處理系統1e可以,例如,類似於圖3、4、及5所示之實施例,且能更包含第二RF產生器44,通過另一個選用的阻抗匹配網路46耦合RF電源至基板支座20。不論是第一RF產生器40或是第二RF產生器44或是兩者同時,典型應用於基板固持20的RF電源頻率範圍在大約0.1 MHz到大約200 MHz。第二RF產生器44的RF頻率可以相對大於第一RF產生器40的頻率。更進一步,從RF產生器40施加於基板支座20的RF電源可以是振幅調變的,或是從RF產生器44施加於基板支座20的RF電源可以是振幅調變的,或是兩者RF電源皆是振幅調變的。所欲者為,較高RF頻率之RF電源為振幅調變的。此外,為了控制施加於基板支座20之RF電源,控制器90耦合於第二RF產生器44及阻抗匹配電路46。基板支座之RF系統的設計及應用是熟知本技藝者所廣知的。In the embodiment shown in FIG. 7, the plasma processing system 1e can, for example, be similar to the embodiment shown in Figures 3, 4, and 5, and can further include a second RF generator 44, through another optional The impedance matching network 46 couples the RF power to the substrate holder 20. Whether it is the first RF generator 40 or the second RF generator 44 or both, the RF power supply typically applied to the substrate holding 20 ranges from about 0.1 MHz to about 200 MHz. The RF frequency of the second RF generator 44 may be relatively greater than the frequency of the first RF generator 40. Further, the RF power source applied from the RF generator 40 to the substrate holder 20 may be amplitude-modulated, or the RF power source applied from the RF generator 44 to the substrate holder 20 may be amplitude-modulated or two The RF power supply is amplitude modulated. As desired, the RF power supply at a higher RF frequency is amplitude modulated. Further, to control the RF power applied to the substrate holder 20, the controller 90 is coupled to the second RF generator 44 and the impedance matching circuit 46. The design and application of RF systems for substrate holders are well known to those skilled in the art.

在以下的討論中,呈現利用具有彈道電子束的電漿處理系統來蝕刻薄膜的方法。舉例而言,電漿處理系統可以包含不同元件,例如圖1到圖7中之元件及其組合。In the following discussion, a method of etching a film using a plasma processing system having a ballistic electron beam is presented. For example, the plasma processing system can include various components, such as the components of Figures 1 through 7, and combinations thereof.

圖8顯示根據本發明一實施例之蝕刻薄膜方法之流程圖。步驟500以處理遮罩層的510作為開始,遮罩層具有圖案形成於其中,且位在基板上的一薄膜之上方。Figure 8 shows a flow chart of a method of etching a thin film in accordance with an embodiment of the present invention. Step 500 begins with processing 510 of the mask layer, the mask layer having a pattern formed therein and positioned over a film on the substrate.

遮罩層可以用任何前述的實施例來處理。舉例而言,遮罩層的處理包括暴露遮罩層於含氧電漿、或是含鹵素電漿、或是惰性氣體電漿、或是其中兩者或更多者的組合。或者,遮罩層的處理可以包括形成保護層在遮罩層上。又或是另外一者,遮罩層的處理可以包括暴露遮罩層於缺少原子狀態之鹵素物種的電子束中。又或是另外一者,遮罩層的處理包含上述任何處理之組合。The mask layer can be treated with any of the foregoing embodiments. For example, the treatment of the mask layer includes exposing the mask layer to an oxygen-containing plasma, or a halogen-containing plasma, or an inert gas plasma, or a combination of two or more thereof. Alternatively, the processing of the mask layer can include forming a protective layer over the mask layer. Alternatively or additionally, the processing of the mask layer can include exposing the mask layer to an electron beam of a halogen species lacking an atomic state. Alternatively or additionally, the processing of the mask layer comprises a combination of any of the above.

在520中,為了要把形成在遮罩層中的圖案轉移到底下的薄膜,具有處理過的遮罩層的基板暴露於由高能的(彈道)電子束輔助的乾式蝕刻電漿中,並同時減少圖案的異常,例如LER。在電漿處理系統中,(處理)電漿是藉由耦合電源至處理氣體(以導致處理氣體分子的離子化及解離)而從處理氣體形成的。藉由耦合DC電源到電漿處理系統中的電極及藉由形成電漿,可以製造具有能量位準取決於施加在電極之DC電壓大小的高能(彈道)電子束。In 520, in order to transfer the pattern formed in the mask layer to the underlying film, the substrate having the treated mask layer is exposed to a dry etching plasma assisted by a high energy (ballistic) electron beam, and simultaneously Reduce pattern anomalies, such as LER. In a plasma processing system, (process) plasma is formed from a process gas by coupling a power source to a process gas (to cause ionization and dissociation of process gas molecules). By coupling a DC power source to the electrodes in the plasma processing system and by forming a plasma, a high energy (ballistic) electron beam having an energy level dependent on the magnitude of the DC voltage applied to the electrodes can be fabricated.

DC電源是耦合至電漿處理系統。舉例而言,藉由DC電源供應器施加於電漿處理系統之DC電壓範圍在大約一2000伏特(V)到大約1000 V。所欲者為,DC電壓的絕對值等於或是大於大約100 V,更欲者為,DC電壓的絕對值等於或是大於大約500 V。此外,所欲者為,DC電壓具有負極性。更進一步,所欲者為DC電壓是具有絕對值大於由電漿處理系統之電極表面所產生的自身偏壓電壓的負電壓。The DC power source is coupled to the plasma processing system. For example, the DC voltage applied to the plasma processing system by the DC power supply ranges from about one 2,000 volts (V) to about 1000 volts. The desired value is that the absolute value of the DC voltage is equal to or greater than approximately 100 V. More preferably, the absolute value of the DC voltage is equal to or greater than approximately 500 V. Further, as desired, the DC voltage has a negative polarity. Further, the desired DC voltage is a negative voltage having an absolute value greater than the self-bias voltage generated by the electrode surface of the plasma processing system.

即使以上已經詳細描述某些特定實施例,熟知本技藝者當可輕易了解,在不脫離本發明之新穎教示及優點之內,仍能具有許多可能的改型。因此,全部的改型皆包含在本發明的範圍之中。Even though some specific embodiments have been described in detail above, it will be apparent to those skilled in the art that many modifications can be made without departing from the novel teachings and advantages of the invention. Accordingly, all modifications are intended to be included within the scope of the present invention.

1...電漿處理系統1. . . Plasma processing system

1a...電漿處理系統1a. . . Plasma processing system

1b...電漿處理系統1b. . . Plasma processing system

1c...電漿處理系統1c. . . Plasma processing system

1d...電漿處理系統1d. . . Plasma processing system

1e...電漿處理系統1e. . . Plasma processing system

2...基板支座2. . . Substrate support

3...基板3. . . Substrate

4...AC電源系統4. . . AC power system

5...DC電源系統5. . . DC power system

6...氣體分佈系統6. . . Gas distribution system

7...控制器7. . . Controller

8...電漿處理室8. . . Plasma processing room

9...電極9. . . electrode

10...電漿處理室10. . . Plasma processing room

15...電漿處理區域15. . . Plasma processing area

20...基板支座20. . . Substrate support

25...基板25. . . Substrate

30...真空幫浦系統30. . . Vacuum pump system

40...RF產生器40. . . RF generator

42...阻抗匹配網路42. . . Impedance matching network

44...第二RF產生器44. . . Second RF generator

46...阻抗匹配網路46. . . Impedance matching network

50...DC電源供應器50. . . DC power supply

52...上電極52. . . Upper electrode

60...磁場系統60. . . Magnetic field system

70...RF產生器70. . . RF generator

72...阻抗匹配網路72. . . Impedance matching network

80...感應線圈80. . . Induction coil

82...RF產生器82. . . RF generator

84...阻抗匹配網路84. . . Impedance matching network

90...控制器90. . . Controller

120...第一電極120. . . First electrode

125...基板125. . . Substrate

130...電漿130. . . Plasma

135...彈道電子束135. . . Ballistic electron beam

140...第一RF產生器140. . . First RF generator

150...DC電源供應器150. . . DC power supply

170...第二RF產生器170. . . Second RF generator

172...第二電極172. . . Second electrode

500...步驟500. . . step

510...處理在基板上之一遮罩層510. . . Processing a mask layer on the substrate

520...在處理該遮罩層之後,使用電子束輔助的電將來蝕刻該基板520. . . After processing the mask layer, the substrate is etched using electron beam-assisted electricity in the future.

在附圖中:圖1是根據本發明之實施例的電漿處理系統的概略表示圖;圖2是根據本發明之另一實施例的電漿處理系統的概略圖;圖3顯示根據本發明之另一實施例的電漿處理系統的概略圖;圖4顯示根據本發明之另一實施例的電漿處理系統的概略圖;圖5顯示根據本發明之另一實施例的電漿處理系統的概略圖;圖6顯示根據本發明之另一實施例的電漿處理系統的概略圖;圖7顯示根據本發明之另一實施例的電漿處理系統的概略圖;及圖8顯示使用根據本發明之一實施例的電漿的基板處理方法。In the drawings: Figure 1 is a schematic representation of a plasma processing system in accordance with an embodiment of the present invention; Figure 2 is a schematic illustration of a plasma processing system in accordance with another embodiment of the present invention; A schematic view of a plasma processing system of another embodiment; FIG. 4 shows a schematic view of a plasma processing system according to another embodiment of the present invention; and FIG. 5 shows a plasma processing system according to another embodiment of the present invention. FIG. 6 is a schematic view showing a plasma processing system according to another embodiment of the present invention; FIG. 7 is a schematic view showing a plasma processing system according to another embodiment of the present invention; and FIG. A substrate processing method for a plasma according to an embodiment of the present invention.

1...電漿處理系統1. . . Plasma processing system

2...基板支座2. . . Substrate support

3...基板3. . . Substrate

4...AC電源系統4. . . AC power system

5...DC電源系統5. . . DC power system

6...氣體分佈系統6. . . Gas distribution system

7...控制器7. . . Controller

8...電漿處理室8. . . Plasma processing room

9...電極9. . . electrode

Claims (67)

一種蝕刻方法,用以蝕刻形成在一基板上且於其上方具有圖案化遮罩層之一薄膜,該蝕刻方法包含:遮罩層處理步驟,藉由將該遮罩層暴露於一含氧電漿、一含鹵素電漿、或一惰性氣體電漿、或是其中兩者或更多者的組合之中來處理該遮罩層,該遮罩層處理步驟係執行於該遮罩層未暴露於直流(DC)電源加速電子束之狀態;及蝕刻步驟,在該遮罩層處理步驟之後,為了要轉移該遮罩層之一圖案到該薄膜,而蝕刻該薄膜,該蝕刻步驟包含:電漿形成步驟,在一電漿處理系統中從一處理氣體形成電漿;DC電源耦合步驟,耦合一直流(DC)電源到該電漿處理系統中的一電極以在該電漿處理系統中形成一電子束,俾於該蝕刻中輔助該電漿;及基板暴露步驟,將該基板暴露於該電漿及該電子束中。 An etching method for etching a film formed on a substrate and having a patterned mask layer thereon, the etching method comprising: a mask layer processing step by exposing the mask layer to an oxygen-containing electricity Treating the mask layer with a slurry, a halogen-containing plasma, or an inert gas plasma, or a combination of two or more thereof, the mask layer processing step is performed without exposing the mask layer a state in which a direct current (DC) power source accelerates an electron beam; and an etching step, after the mask layer processing step, etching the film in order to transfer a pattern of the mask layer to the film, the etching step comprising: a slurry forming step of forming a plasma from a processing gas in a plasma processing system; a DC power coupling step coupling a direct current (DC) power source to an electrode in the plasma processing system to form in the plasma processing system An electron beam assists the plasma in the etching; and a substrate exposure step exposing the substrate to the plasma and the electron beam. 如申請專利範圍第1項之蝕刻方法,其中該遮罩層處理步驟包含將該遮罩層暴露於利用O2 、CO、CO2 、NO、N2 O、NO2 、或是其中兩者或更多者所形成的電漿之中。The etching method of claim 1, wherein the mask layer processing step comprises exposing the mask layer to O 2 , CO, CO 2 , NO, N 2 O, NO 2 , or both or Among the plasma formed by more. 如申請專利範圍第2項之蝕刻方法,其中該遮罩層處理步驟更包含將該遮罩層暴露於N2 、H2 、CN、鈍氣、或是其中兩者或更多者的組合之中。The etching method of claim 2, wherein the mask layer processing step further comprises exposing the mask layer to N 2 , H 2 , CN, blunt gas, or a combination of two or more thereof. in. 如申請專利範圍第2項之蝕刻方法,其中該遮罩層處理步驟更包含將該遮罩層暴露於一含鹵素氣體中。 The etching method of claim 2, wherein the mask layer processing step further comprises exposing the mask layer to a halogen-containing gas. 如申請專利範圍第1項之蝕刻方法,其中該遮罩層處理步驟包含將該遮罩層暴露於利用Cl2 、Br2 、F2 、HBr、HCl、HF、C2 H4 Br2 、 SiCl4 、NF3 、SF6 、或是其中兩者或更多者的組合所形成的電漿之中。The etching method of claim 1, wherein the mask layer processing step comprises exposing the mask layer to using Cl 2 , Br 2 , F 2 , HBr, HCl, HF, C 2 H 4 Br 2 , SiCl 4 , NF 3 , SF 6 , or a combination of two or more of the plasma formed. 如申請專利範圍第5項之蝕刻方法,其中該遮罩層處理步驟更包含將該遮罩層暴露於N2 、H2 、CN、鈍氣、或是其中兩者或更多者的組合之中。The etching method of claim 5, wherein the mask layer processing step further comprises exposing the mask layer to N 2 , H 2 , CN, blunt gas, or a combination of two or more thereof. in. 如申請專利範圍第5項之蝕刻方法,其中該遮罩層處理步驟更包含將該遮罩層暴露於一含氧氣體中。 The etching method of claim 5, wherein the mask layer processing step further comprises exposing the mask layer to an oxygen-containing gas. 如申請專利範圍第1項之蝕刻方法,其中該遮罩層處理步驟包含將該遮罩層暴露於在該電漿處理系統中形成的電漿中,該電漿係藉由將AC電源耦合到該電極、或是耦合到該電極以外的另一電極、或是耦合到一基板支座、或是耦合到上述中之兩者或更多者的組合之中而形成。 The etching method of claim 1, wherein the mask layer processing step comprises exposing the mask layer to a plasma formed in the plasma processing system, the plasma being coupled to the AC power source The electrode is formed either by coupling to another electrode other than the electrode, or to a substrate holder, or to a combination of two or more of the foregoing. 如申請專利範圍第8項之蝕刻方法,其中該遮罩層處理步驟包含將該遮罩層暴露於利用功率位準低於或是等於500W所形成之一低功率電漿中。 The etching method of claim 8, wherein the mask layer processing step comprises exposing the mask layer to a low power plasma formed using a power level lower than or equal to 500 W. 如申請專利範圍第1項之蝕刻方法,其中該遮罩層處理步驟包含將該遮罩層暴露於形成在耦合至該電漿處理系統的一遠端電漿源中的電漿。 The etching method of claim 1, wherein the masking layer processing step comprises exposing the mask layer to a plasma formed in a remote plasma source coupled to the plasma processing system. 如申請專利範圍第1項之蝕刻方法,其中該DC電源耦合步驟包含電壓範圍在大約-2000V到大約1000V的DC電源之耦合。 The etching method of claim 1, wherein the DC power coupling step comprises coupling of a DC power source having a voltage ranging from about -2000V to about 1000V. 如申請專利範圍第1項之蝕刻方法,其中該DC電源耦合步驟 包含耦合具有負極性的DC電源,其中該DC電源之絕對值大於或等於大約500V。 The etching method of claim 1, wherein the DC power coupling step A DC power source having a negative polarity is coupled, wherein the absolute value of the DC power source is greater than or equal to about 500V. 如申請專利範圍第1項之蝕刻方法,其中該DC電源耦合步驟包含耦合DC電源到面對著設置在一基板支座上之該基板的一上電極。 The etching method of claim 1, wherein the DC power coupling step comprises coupling a DC power source to an upper electrode facing the substrate disposed on a substrate holder. 如申請專利範圍第13項之蝕刻方法,其中該電漿形成步驟包含射頻(RF)電源耦合步驟,其係將一射頻電源耦合到該電極、或是耦合到該電極以外的另一電極、或是耦合到該基板支座、或是耦合到上述中之兩者或更多者的組合之中。 The etching method of claim 13, wherein the plasma forming step comprises a radio frequency (RF) power coupling step of coupling an RF power source to the electrode or to another electrode other than the electrode, or It is coupled to the substrate holder or to a combination of two or more of the above. 如申請專利範圍第14項之蝕刻方法,其中該射頻(RF)電源耦合步驟包含以一第一RF頻率耦合第一RF電源到該上電極、及以低於該第一RF頻率的一第二RF頻率耦合一第二RF電源到該基板支座。 The etching method of claim 14, wherein the radio frequency (RF) power coupling step comprises coupling the first RF power to the upper electrode at a first RF frequency, and a second lower than the first RF frequency. The RF frequency couples a second RF power source to the substrate holder. 如申請專利範圍第14項之蝕刻方法,更包含:調變該RF電源之振幅,以調整該電子束之電子束通量的空間分佈。 The etching method of claim 14, further comprising: modulating the amplitude of the RF power source to adjust a spatial distribution of the electron beam flux of the electron beam. 如申請專利範圍第1項之蝕刻方法,其中在該蝕刻步驟之前,該將該遮罩層暴露於該含氧電漿或是該含鹵素電漿中使於該蝕刻步驟時形成在該遮罩層中的線緣粗度減小。 The etching method of claim 1, wherein the mask layer is exposed to the oxygen-containing plasma or the halogen-containing plasma before the etching step to form the mask during the etching step. The thickness of the line edge in the layer is reduced. 如申請專利範圍第1項之蝕刻方法,其中該遮罩層處理步驟實施了預定的時間,以在該蝕刻時使該圖案化的遮罩阻止線緣粗度形成於遮罩層中。 The etching method of claim 1, wherein the mask layer processing step is performed for a predetermined time to prevent the patterned mask from forming a line edge roughness in the mask layer during the etching. 如申請專利範圍第1項之蝕刻方法,其中該遮罩層處理步驟包含將該遮罩層暴露在以He、Ne、Ar、Xe、Kr、或是其中兩者或更多者的組合所形成的電漿中。 The etching method of claim 1, wherein the mask layer processing step comprises exposing the mask layer to a combination of He, Ne, Ar, Xe, Kr, or a combination of two or more thereof. In the plasma. 如申請專利範圍第1項之蝕刻方法,更包含:在該遮罩層處理步驟之前,為了要改質該遮罩層,而以缺少原子狀態的鹵素物種的一預先蝕刻電子束預先處理該遮罩層。 The etching method of claim 1, further comprising: pre-processing the mask with a pre-etched electron beam of a halogen species lacking an atomic state in order to modify the mask layer before the mask layer processing step Cover layer. 如申請專利範圍第1項之蝕刻方法,其中該遮罩層處理步驟包含以一第一RF頻率耦合一第一RF電源到該上電極、及以低於該第一RF頻率之一第二RF頻率耦合一第二RF電源到該基板支座,且其中該第二RF電源小於或等於大約100W。 The etching method of claim 1, wherein the mask layer processing step comprises coupling a first RF power source to the upper electrode at a first RF frequency, and a second RF lower than the first RF frequency. A second RF power source is coupled to the substrate support, and wherein the second RF power source is less than or equal to about 100W. 如申請專利範圍第21項之蝕刻方法,其中該第二RF電源實際上為零。 The etching method of claim 21, wherein the second RF power source is substantially zero. 一種蝕刻方法,用以蝕刻形成在一基板上且於其上方具有圖案化遮罩層之一薄膜,該蝕刻方法包含:基板設置步驟,將一基板設置在用來形成一電漿及一彈道電子束之一電漿處理系統中的一基板支座上;遮罩層處理步驟,藉由將該電漿處理系統中之該遮罩層暴露於一含氧電漿、一含鹵素電漿、或一惰性氣體電漿、或是其中兩者或更多者的組合之中來處理該遮罩層,且不形成一彈道電子束,該遮罩層處理步驟係執行於該遮罩層未暴露於直流電源加速電子束之狀態;及電漿及彈道電子束形成步驟,在該遮罩層處理步驟之後,為了要蝕刻該薄膜及轉移該圖案化遮罩之一圖案到該薄膜,而在該電漿處理系統中形成一電漿及一彈道電子束。 An etching method for etching a film formed on a substrate and having a patterned mask layer thereon, the etching method comprising: a substrate setting step of disposing a substrate for forming a plasma and a ballistic electron a substrate support in a plasma processing system; a mask layer processing step by exposing the mask layer in the plasma processing system to an oxygen-containing plasma, a halogen-containing plasma, or Treating the mask layer with an inert gas plasma, or a combination of two or more thereof, and not forming a ballistic electron beam, the mask layer processing step is performed when the mask layer is not exposed to The DC power source accelerates the state of the electron beam; and the plasma and ballistic electron beam forming step, after the mask layer processing step, in order to etch the film and transfer a pattern of the patterned mask to the film, A plasma and a ballistic electron beam are formed in the slurry processing system. 一種電漿處理系統,用來蝕刻一基板,包含:一處理室;一氣體供應系統,用來供應一氣體到該處理室中;一基板支座,耦合於該處理室且用來支撐該基板;一電極,設置於該處理室之內部;一AC電源系統,耦合於該處理室,且為了要在該處理室中形成一電漿,而耦合至少一個AC信號到該基板支座、或是到該電極或是到此二者;一DC電源系統,耦合於該處理室,且為了要形成通過該電漿之一彈道電子束,而將一DC電壓耦合到該電極;及一控制器,用來控制該氣體供應系統、該AC電源系統、及該DC電源系統以施行以下步驟:遮罩層處理步驟,藉由將該電漿處理系統中之該遮罩層暴露於一含氧電漿、一含鹵素電漿、或一惰性氣體電漿、或是其中兩者或更多者的組合之中來處理該遮罩層,且不形成一彈道電子束,該遮罩層處理步驟係執行於該遮罩層未暴露於直流電源加速電子束之狀態;及電漿及彈道電子束形成步驟,在該遮罩層處理步驟之後,為了要蝕刻該薄膜及轉移該圖案化遮罩之一圖案到該薄膜,而在該電漿處理系統中形成一電漿及一彈道電子束。 A plasma processing system for etching a substrate, comprising: a processing chamber; a gas supply system for supplying a gas into the processing chamber; a substrate holder coupled to the processing chamber and supporting the substrate An electrode disposed inside the processing chamber; an AC power system coupled to the processing chamber, and coupling at least one AC signal to the substrate holder for forming a plasma in the processing chamber, or To the electrode or both; a DC power system coupled to the processing chamber and coupling a DC voltage to the electrode for forming a ballistic electron beam through the plasma; and a controller, Used to control the gas supply system, the AC power system, and the DC power system to perform the following steps: a mask layer processing step by exposing the mask layer in the plasma processing system to an oxygen-containing plasma Treating the mask layer with a halogen-containing plasma, or an inert gas plasma, or a combination of two or more thereof, and not forming a ballistic electron beam, the mask layer processing step is performed The mask layer is not exposed to The flow source accelerates the state of the electron beam; and the plasma and ballistic electron beam forming step, after the mask layer processing step, in order to etch the film and transfer a pattern of the patterned mask to the film, A plasma and a ballistic electron beam are formed in the slurry processing system. 一種蝕刻方法,用以蝕刻形成在一基板上且於其上方具有圖案化遮罩層之一薄膜,該蝕刻方法包含:保護層形成步驟,在該遮罩層上形成一保護層以保護該遮罩層,該保護層形成步驟係執行於該保護層未暴露於直流電源加速電子束之狀態;及薄膜蝕刻步驟,在該保護層形成步驟之後,蝕刻該薄膜,以將該遮罩層之一圖案轉移到該薄膜;該薄膜蝕刻步驟包含:電漿形成步驟,在一電漿處理系統中從一處理氣體形成 電漿;直流(DC)電源耦合步驟,將一直流電源耦合到該電漿處理系統中之一電極,以在該電漿處理系統中形成一電子束,俾於該蝕刻時輔助該電漿;及基板暴露步驟,將該基板暴露於該電漿及該電子束中。 An etching method for etching a film formed on a substrate and having a patterned mask layer thereon, the etching method comprising: a protective layer forming step of forming a protective layer on the mask layer to protect the mask a cover layer, the protective layer forming step is performed in a state in which the protective layer is not exposed to a DC power source to accelerate an electron beam; and a thin film etching step, after the protective layer forming step, etching the thin film to one of the mask layers Transferring the pattern to the film; the film etching step includes: a plasma forming step of forming a process gas in a plasma processing system a plasma; direct current (DC) power coupling step of coupling a direct current source to one of the electrodes of the plasma processing system to form an electron beam in the plasma processing system to assist the plasma during the etching; And a substrate exposure step of exposing the substrate to the plasma and the electron beam. 如申請專利範圍第25項之蝕刻方法,其中該保護層形成步驟包含將該基板暴露於一沉積氣體電漿中。 The etching method of claim 25, wherein the protective layer forming step comprises exposing the substrate to a deposition gas plasma. 如申請專利範圍第26項之蝕刻方法,其中該保護層形成步驟包含將該遮罩層暴露於一含碳氫化合物電漿、一含氟碳化合物電漿、一含碳氟氫化物電漿、或是其中兩者或是更多者的組合中。 The etching method of claim 26, wherein the protective layer forming step comprises exposing the mask layer to a hydrocarbon-containing plasma, a fluorocarbon plasma, a fluorocarbon-containing plasma, Or a combination of two or more. 如申請專利範圍第26項之蝕刻方法,其中該保護層形成步驟包含將該遮罩層暴露於由C2 H4 、CH4 、C2 H2 、C2 H6 、C3 H4 、C3 H6 、C3 H8 、C4 H6 、C4 H8 、C4 H10 、C5 H8 、C5 H10 、C6 H6 、C6 H10 、C6 H12 、C2 F6 、CF4 、C3 F8 、C4 F8 、C5 F8 、C4 F6 、CH2 F2 、CHF3 、CH3 F、C2 HF5 、或是其中兩者或更多者所形成的電漿之中。The etching method of claim 26, wherein the protective layer forming step comprises exposing the mask layer to C 2 H 4 , CH 4 , C 2 H 2 , C 2 H 6 , C 3 H 4 , C 3 H 6 , C 3 H 8 , C 4 H 6 , C 4 H 8 , C 4 H 10 , C 5 H 8 , C 5 H 10 , C 6 H 6 , C 6 H 10 , C 6 H 12 , C 2 F 6 , CF 4 , C 3 F 8 , C 4 F 8 , C 5 F 8 , C 4 F 6 , CH 2 F 2 , CHF 3 , CH 3 F, C 2 HF 5 , or both Among the plasma formed by more. 如申請專利範圍第28項之蝕刻方法,其中該保護層形成步驟更包含將該遮罩層暴露於H2 、O2 、CO、CO2 、NO、N2 O、NO2 、N2 、CN、鈍氣或是其中兩者或更多者的組成中。The etching method of claim 28, wherein the protective layer forming step further comprises exposing the mask layer to H 2 , O 2 , CO, CO 2 , NO, N 2 O, NO 2 , N 2 , CN , blunt gas or a composition of two or more of them. 如申請專利範圍第26項之蝕刻方法,其中該保護層形成步驟包含將該遮罩層浸入醇類中。 The etching method of claim 26, wherein the protective layer forming step comprises immersing the mask layer in an alcohol. 如申請專利範圍第26項之蝕刻方法,其中該保護層形成步驟包含將該遮罩層浸入乙醇、或是甲醇、或此二者中。 The etching method of claim 26, wherein the protective layer forming step comprises immersing the mask layer in ethanol, or methanol, or both. 如申請專利範圍第26項之蝕刻方法,其中該保護層形成步驟包含將該遮罩層暴露於在該電漿處理系統中形成之電漿中,該電漿係藉由將AC電源耦合到該電極、或是耦合到該電極以外的另一電極、或是耦合到一基板支座、或是耦合到上述中之兩者或更多者的組合之中而形成。 The etching method of claim 26, wherein the protective layer forming step comprises exposing the mask layer to a plasma formed in the plasma processing system, the plasma being coupled to the AC power source The electrode is formed either by coupling to another electrode other than the electrode, or to a substrate holder, or to a combination of two or more of the foregoing. 如申請專利範圍第32項之蝕刻方法,其中該將該遮罩層暴露於電漿中包含將該遮罩層暴露於使用一功率位準大於或是等於大約500W之一電源所形成的一低功率電漿中。 The etching method of claim 32, wherein exposing the mask layer to the plasma comprises exposing the mask layer to a low voltage formed by using a power source having a power level greater than or equal to about 500 W. Power plasma. 如申請專利範圍第26項之蝕刻方法,其中該將該遮罩層暴露於電漿中包含將該遮罩層暴露於在耦合於該電漿處理系統的一遠端電漿源中形成的電漿中。 The etching method of claim 26, wherein exposing the mask layer to the plasma comprises exposing the mask layer to electricity formed in a remote plasma source coupled to the plasma processing system. In the pulp. 如申請專利範圍第25項之蝕刻方法,其中該直流(DC)電源耦合步驟包含電壓範圍在大約-2000V到大約1000V的DC電源之耦合。 The etching method of claim 25, wherein the direct current (DC) power coupling step comprises coupling of a DC power source having a voltage ranging from about -2000V to about 1000V. 如申請專利範圍第25項之蝕刻方法,其中該直流(DC)電源耦合步驟包含具有負極性的DC電源之耦合,其中該DC電源的絕對值大於或是等於大約500V。 The etching method of claim 25, wherein the direct current (DC) power coupling step comprises coupling of a DC power source having a negative polarity, wherein the absolute value of the DC power source is greater than or equal to about 500V. 如申請專利範圍第25項之蝕刻方法,其中該直流(DC)電源耦合到該電極之步驟包含將DC電源耦合到面對著一基板支座上之該基板之一上電極。 The etching method of claim 25, wherein the step of coupling the direct current (DC) power source to the electrode comprises coupling a DC power source to an upper electrode of the substrate facing a substrate holder. 如申請專利範圍第37項之蝕刻方法,其中該電漿形成步驟包含射頻(RF)電源耦合步驟,將射頻(RF)電源耦合到該電極、或是到除了該電極之外的另一電極、或是到該基板支座、 或是到上述其中之兩者或更多者的組合之中。 The etching method of claim 37, wherein the plasma forming step comprises a radio frequency (RF) power coupling step of coupling a radio frequency (RF) power source to the electrode or to another electrode other than the electrode, Or to the substrate support, Or to a combination of two or more of the above. 如申請專利範圍第38項之蝕刻方法,其中該射頻(RF)電源耦合步驟包含以一第一RF頻率耦合一第一RF電源到該上電極、及以低於該第一RF頻率之一第二RF頻率耦合一第二RF電源到該基板支座。 The etching method of claim 38, wherein the radio frequency (RF) power coupling step comprises coupling a first RF power source to the upper electrode at a first RF frequency, and lowering the first RF frequency The second RF frequency couples a second RF power source to the substrate holder. 如申請專利範圍第38項之蝕刻方法,更包含:調變該RF電源之振幅,以調整該電子束之電子束通量的空間分佈。 The etching method of claim 38, further comprising: modulating the amplitude of the RF power source to adjust a spatial distribution of the electron beam flux of the electron beam. 如申請專利範圍第25項之蝕刻方法,其中於該蝕刻之前,在該遮罩層上形成該保護層的步驟,減小蝕刻時在該遮罩層中的線緣粗度。 The etching method of claim 25, wherein the step of forming the protective layer on the mask layer before the etching reduces the thickness of the line edge in the mask layer during etching. 如申請專利範圍第25項之蝕刻方法,其中該保護層形成步驟包含藉由以一第一RF頻率耦合一第一RF電源到該上電極、及以低於該第一RF頻率之一第二RF頻率耦合一第二RF電源到該基板支座來形成一沉積電漿,且其中該第一RF電源大於或是等於大約500W,該第二RF電源小於或是等於100W。 The etching method of claim 25, wherein the protective layer forming step comprises: coupling a first RF power source to the upper electrode at a first RF frequency, and second to a second one lower than the first RF frequency The RF frequency couples a second RF power source to the substrate holder to form a deposition plasma, and wherein the first RF power source is greater than or equal to about 500 W, and the second RF power source is less than or equal to 100 W. 如申請專利範圍第42項之蝕刻方法,其中該第二RF電源實際上為零。 The etching method of claim 42, wherein the second RF power source is substantially zero. 一種蝕刻方法,用以蝕刻形成在一基板上且於其上方具有圖案化遮罩層之一薄膜,該蝕刻方法包含:在該圖案化的遮罩層上形成一保護層,該保護層具有在一彈道電子束輔助電漿蝕刻處理時用以保護該遮罩層的預定厚度,該形成步驟係執行於該保護層未暴露於直流電源加速電子 束之狀態;及在該形成該保護層之後,為了要蝕刻該薄膜及轉移該遮罩之一圖案至該薄膜,而在該基板上施行該彈道電子束輔助的電漿蝕刻處理,其中該預定的厚度範圍係在大約1nm到大約200nm。 An etching method for etching a film formed on a substrate and having a patterned mask layer thereon, the etching method comprising: forming a protective layer on the patterned mask layer, the protective layer having a ballistic electron beam assisted plasma etching process for protecting a predetermined thickness of the mask layer, the forming step being performed by the protective layer not being exposed to a DC power source for accelerating electrons a state of the beam; and after the forming of the protective layer, the ballistic electron beam-assisted plasma etching process is performed on the substrate in order to etch the film and transfer a pattern of the mask to the film, wherein the predetermined The thickness ranges from about 1 nm to about 200 nm. 如申請專利範圍第44項之蝕刻方法,其中該預定的厚度範圍從大約50nm到大約100nm。 The etching method of claim 44, wherein the predetermined thickness ranges from about 50 nm to about 100 nm. 一種電漿處理系統,用來蝕刻一基板,該電漿處理系統包含:一處理室;一氣體供應系統,用來供應一氣體到該處理室中;一基板支座,耦合於該處理室,且用以支撐該基板;一電極,設置於該處理室之內部;一AC電源系統,耦合於該處理室,且用來耦合至少一個AC信號到該基板支座、或該電極、或是此二者,以在該處理室中形成一電漿;一DC電源系統,耦合於該處理室,且用來耦合一DC電壓到該電極,以形成通過該電漿之一彈道電子束;及一控制器,用來控制該氣體供應系統、該AC電源系統、及該DC電源系統以施行以下步驟:在該遮罩層之上形成一保護層,以保護該遮罩層,該形成步驟係執行於該保護層未暴露於直流電源加速電子束之狀態;及於該形成該保護層之後,在該電漿處理系統中形成一電漿及一彈道電子束,以蝕刻該薄膜及轉移該圖案化遮罩之一圖案到該薄膜。 A plasma processing system for etching a substrate, the plasma processing system comprising: a processing chamber; a gas supply system for supplying a gas into the processing chamber; and a substrate holder coupled to the processing chamber And for supporting the substrate; an electrode disposed inside the processing chamber; an AC power system coupled to the processing chamber and configured to couple at least one AC signal to the substrate holder, or the electrode, or Both to form a plasma in the processing chamber; a DC power system coupled to the processing chamber and configured to couple a DC voltage to the electrode to form a ballistic electron beam through the plasma; and a controller for controlling the gas supply system, the AC power system, and the DC power system to perform the steps of: forming a protective layer over the mask layer to protect the mask layer, the forming step is performed After the protective layer is not exposed to the DC power source to accelerate the electron beam; and after the forming the protective layer, a plasma and a ballistic electron beam are formed in the plasma processing system to etch the film and transfer the pattern cover One pattern to the film. 一種蝕刻方法,用以蝕刻形成在一基板上且於其上方具有圖案 化遮罩層之一薄膜,該蝕刻方法包含:在該遮罩層上形成一圖案;遮罩層處理步驟,為了要改質該圖案化遮罩層,而以缺少原子狀態的鹵素物種的一預先蝕刻第一電子束處理該圖案化遮罩層,該預先蝕刻第一電子束係藉由耦合負極性直流電源至一電漿處理系統中的一電極而加以形成;及蝕刻步驟,在該遮罩層處理步驟之後,為了要轉移該遮罩之一圖案到該薄膜,而在該電漿處理系統中蝕刻該薄膜,該蝕刻步驟包含:從一蝕刻氣體中形成一蝕刻電漿;藉由在該電漿處理系統中耦合直流(DC)電源至一電極,形成一第二彈道電子束以於該蝕刻期間輔助該蝕刻電漿;及將該基板暴露於該蝕刻電漿及該第二彈道電子束中。 An etching method for etching on a substrate and having a pattern thereon Forming a film of one of the mask layers, the etching method comprising: forming a pattern on the mask layer; a mask layer processing step, in order to modify the patterned mask layer, to remove a halogen species in an atomic state Pre-etching the first electron beam to process the patterned mask layer, the pre-etched first electron beam is formed by coupling a negative DC power source to an electrode in a plasma processing system; and an etching step in the mask After the cap layer processing step, in order to transfer a pattern of the mask to the film, the film is etched in the plasma processing system, the etching step comprising: forming an etch plasma from an etching gas; The plasma processing system couples a direct current (DC) power source to an electrode to form a second ballistic electron beam to assist the etching plasma during the etching; and expose the substrate to the etching plasma and the second ballistic electron In the bundle. 如申請專利範圍第47項之蝕刻方法,其中該遮罩層處理步驟包含:將該基板配置於該電漿處理系統中,及利用耦合於該電漿處理系統之一電子束源處理該遮罩層。 The etching method of claim 47, wherein the mask layer processing step comprises: disposing the substrate in the plasma processing system, and processing the mask by using an electron beam source coupled to the plasma processing system Floor. 如申請專利範圍第47項之蝕刻方法,其中該遮罩層處理步驟包含:將該基板配置於該電漿處理系統以外的另一基板處理系統中,及利用耦合於該基板處理系統之一電子束源處理該遮罩層。 The etching method of claim 47, wherein the mask layer processing step comprises: disposing the substrate in another substrate processing system other than the plasma processing system, and using an electron coupled to the substrate processing system The beam source processes the mask layer. 如申請專利範圍第47項之蝕刻方法,其中該遮罩層處理步驟包含:基板配置步驟,將該基板配置於該電漿處理系統中之一基板支座之上;預先蝕刻電漿形成步驟,在該電漿處理系統中,從一預先蝕刻氣體形成一預先蝕刻電漿; 預先蝕刻電子束形成步驟,耦合DC電源至該電漿處理系統中之該電極,以形成該預先蝕刻電子束;及基板暴露步驟,將該基板暴露於該預先蝕刻電漿及該預先蝕刻電子束中。 The etching method of claim 47, wherein the mask layer processing step comprises: a substrate arranging step of disposing the substrate on one of the substrate holders of the plasma processing system; and etching the plasma forming step in advance, In the plasma processing system, a pre-etched plasma is formed from a pre-etched gas; Pre-etching an electron beam forming step of coupling a DC power source to the electrode in the plasma processing system to form the pre-etched electron beam; and a substrate exposing step of exposing the substrate to the pre-etched plasma and the pre-etched electron beam in. 如申請專利範圍第50項之蝕刻方法,其中該預先蝕刻電漿形成步驟包含從一或更多種惰性氣體形成該預先蝕刻電漿。 The etching method of claim 50, wherein the pre-etching plasma forming step comprises forming the pre-etched plasma from one or more inert gases. 如申請專利範圍第51項之蝕刻方法,其中該預先蝕刻電漿形成步驟包含從一或更多種惰性氣體及CHF3 的混合物形成該預先蝕刻電漿。The patentable scope of application of the etching method of 51, wherein the forming step comprises plasma etching in advance of the pre-formed from a plasma etch or more of an inert gas and a mixture of CHF 3. 如申請專利範圍第50項之蝕刻方法,其中該預先蝕刻電子束形成步驟包含將DC電源耦合到面對著該基板支座上之該基板之一上電極。 The etching method of claim 50, wherein the pre-etching electron beam forming step comprises coupling a DC power source to an upper electrode of the substrate facing the substrate holder. 如申請專利範圍第50項之蝕刻方法,其中該預先蝕刻電子束形成步驟包含具有負極性的DC電源之耦合,其中該DC電源的絕對值大於或是等於大約500V。 The etching method of claim 50, wherein the pre-etched electron beam forming step comprises coupling of a DC power source having a negative polarity, wherein the absolute value of the DC power source is greater than or equal to about 500V. 如申請專利範圍第50項之蝕刻方法,其中該預先蝕刻電漿形成步驟包含將射頻(RF)電源耦合到該電極、或是耦合到該電極以外的另一電極、或是耦合到該基板支座、或是耦合到上述中的兩者或是更多者的組合,該RF電源具有的總功率位準小於或是等於500W。 The etching method of claim 50, wherein the pre-etching plasma forming step comprises coupling a radio frequency (RF) power source to the electrode, or coupling to another electrode other than the electrode, or coupling to the substrate branch. The RF power supply has a total power level of less than or equal to 500 W, either coupled to a combination of two or more of the above. 如申請專利範圍第47項之蝕刻方法,其中該預先蝕刻電子束形成步驟包含電壓範圍從大約-2000V到大約1000V的DC電源之耦合。 The etching method of claim 47, wherein the pre-etched electron beam forming step comprises coupling of a DC power source having a voltage ranging from about -2000V to about 1000V. 如申請專利範圍第47項之蝕刻方法,其中該預先蝕刻電子束形成步驟包含具有負極性的DC電源之耦合,其中該DC電源的電壓之絕對值大於或是等於500V。 The etching method of claim 47, wherein the pre-etched electron beam forming step comprises coupling of a DC power source having a negative polarity, wherein an absolute value of the voltage of the DC power source is greater than or equal to 500V. 如申請專利範圍第47項之蝕刻方法,其中該預先蝕刻電子束形成步驟包含將DC電源耦合至面對著設置在一基板支座上之該基板的一上電極。 The etching method of claim 47, wherein the pre-etching electron beam forming step comprises coupling a DC power source to an upper electrode facing the substrate disposed on a substrate holder. 如申請專利範圍第58項之蝕刻方法,其中該預先蝕刻電漿形成步驟包含將射頻(RF)電源耦合到該電極、或是耦合到該電極以外的另一電極、或是耦合到該基板支座、或是耦合到上述中之兩者或是更多者的組合。 The etching method of claim 58, wherein the pre-etching plasma forming step comprises coupling a radio frequency (RF) power source to the electrode, or coupling to another electrode other than the electrode, or coupling to the substrate branch Block, or a combination of two or more of the above. 如申請專利範圍第59項之蝕刻方法,其中該RF電源之耦合步驟包含以一第一RF頻率耦合一第一RF電源至該上電極,及以低於該第一RF頻率的一第二RF頻率耦合一第二RF電源至該基板支座。 The etching method of claim 59, wherein the coupling step of the RF power source comprises coupling a first RF power source to the upper electrode at a first RF frequency, and a second RF lower than the first RF frequency. A second RF power source is coupled to the substrate support. 如申請專利範圍第59項之蝕刻方法,更包含:調變該RF電源之振幅,以調整該電子束之電子束通量的空間分佈。 The etching method of claim 59, further comprising: modulating the amplitude of the RF power source to adjust a spatial distribution of the electron beam flux of the electron beam. 如申請專利範圍第47項之蝕刻方法,其中在該蝕刻步驟之前使用該預先蝕刻電子束所施行的該遮罩層處理步驟,可減少在蝕刻時形成於該遮罩層中的線緣粗度。 The etching method of claim 47, wherein the mask layer processing step performed by the pre-etched electron beam before the etching step reduces the thickness of the line edge formed in the mask layer during etching . 如申請專利範圍第47項之蝕刻方法,其中該遮罩層處理步驟施行一段預定時間,以在該蝕刻時使該圖案化的遮罩阻止線緣粗度形成於遮罩層中。 The etching method of claim 47, wherein the mask layer processing step is performed for a predetermined period of time to prevent the patterned mask from forming a line edge roughness in the mask layer during the etching. 如申請專利範圍第47項之蝕刻方法,其中該預先蝕刻電子束的電子束能量小於該蝕刻電子束的電子束能量。 The etching method of claim 47, wherein the electron beam energy of the pre-etched electron beam is smaller than the electron beam energy of the etched electron beam. 如申請專利範圍第47項之蝕刻方法,其中該預先蝕刻電子束之該電子束能量在使用該預先蝕刻電子束處理該遮罩層時,成一或更多個梯級狀增大或是斜坡式增大。 The etching method of claim 47, wherein the electron beam energy of the pre-etched electron beam is increased by one or more steps or ramped when the mask layer is processed using the pre-etched electron beam Big. 一種蝕刻方法,利用具有一彈道電子束和一電漿的電漿處理系統來蝕刻在一基板上之一薄膜,該蝕刻方法包含:在該薄膜上形成包含一圖案的一遮罩層;藉由耦合負極性直流電源至該電漿中之一電極,形成缺少原子狀態的鹵素物種之一第一彈道電子束;將具有該遮罩層之該基板暴露於該第一彈道電子束中,以處理該遮罩層;在該電漿處理系統中,從一蝕刻氣體形成一蝕刻電漿;藉由耦合負極性直流電源至該電漿中之一電極,在該電漿處理系統中,形成一第二彈道電子束;及將該基板暴露於該蝕刻電漿及該第二彈道電子束中,以轉移該圖案至該薄膜。 An etching method for etching a film on a substrate by using a plasma processing system having a ballistic electron beam and a plasma, the etching method comprising: forming a mask layer including a pattern on the film; Coupling a negative DC power source to one of the electrodes to form a first ballistic electron beam of one of the halogen species lacking an atomic state; exposing the substrate having the mask layer to the first ballistic electron beam for processing The mask layer; in the plasma processing system, forming an etching plasma from an etching gas; forming a first in the plasma processing system by coupling a negative DC power source to one of the electrodes a second ballistic electron beam; and exposing the substrate to the etched plasma and the second ballistic electron beam to transfer the pattern to the film. 一種電漿處理系統,用以蝕刻在一基板上的具有一遮罩層之一薄膜,該電漿處理系統包含:一處理室;一氣體供應系統,用來供應一氣體至該處理室;一基板支座,耦合於該處理室,且用來支撐該基板;一電極,設置於該處理室內部;一AC電源系統,耦合於該處理室,用來將至少一個AC信號耦合至該基板支座、或是該電極、或是該二者,以在該處理室中形成一電漿; 一DC電源系統,耦合於該處理室,且用來將一DC電壓耦合至該電極,以形成通過該電漿之一彈道電子束;及一控制器,用來控制該氣體供應系統、該AC電源系統、及該DC電源系統以執行下列步驟:在該遮罩層形成一圖案;遮罩層處理步驟,利用缺少原子狀態的鹵素物種的一預先蝕刻第一電子束處理該圖案化遮罩層,以改質該圖案化遮罩層,該預先蝕刻第一電子束係藉由耦合負極性直流電源至該電漿處理系統中之該電極;及在該遮罩層處理步驟之後,於該電漿處理系統中形成一電漿及一第二彈道電子束,以蝕刻該薄膜並將該圖案化的遮罩之一圖案轉移至該薄膜。A plasma processing system for etching a film having a mask layer on a substrate, the plasma processing system comprising: a processing chamber; a gas supply system for supplying a gas to the processing chamber; a substrate holder coupled to the processing chamber and configured to support the substrate; an electrode disposed within the processing chamber; an AC power system coupled to the processing chamber for coupling at least one AC signal to the substrate a seat, or the electrode, or both, to form a plasma in the processing chamber; a DC power system coupled to the processing chamber and configured to couple a DC voltage to the electrode to form a ballistic electron beam through the plasma; and a controller for controlling the gas supply system, the AC a power supply system, and the DC power supply system to perform the steps of: forming a pattern in the mask layer; a mask layer processing step of processing the patterned mask layer with a pre-etched first electron beam of a halogen species lacking an atomic state To modify the patterned mask layer, the pre-etched first electron beam is coupled to the electrode in the plasma processing system by coupling a negative DC power source; and after the mask layer processing step, the electricity A plasma and a second ballistic electron beam are formed in the slurry processing system to etch the film and transfer a pattern of the patterned mask to the film.
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