TWI421957B - Manufacturing method for system in package and package structure thereof - Google Patents

Manufacturing method for system in package and package structure thereof Download PDF

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Publication number
TWI421957B
TWI421957B TW99125949A TW99125949A TWI421957B TW I421957 B TWI421957 B TW I421957B TW 99125949 A TW99125949 A TW 99125949A TW 99125949 A TW99125949 A TW 99125949A TW I421957 B TWI421957 B TW I421957B
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substrate
system package
conductive pads
package module
manufacturing
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TW99125949A
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TW201207963A (en
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Chien Cheng Lin
Yu Hsin Chen
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Universal Scient Ind Shanghai
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

系統封裝模組的製造方法及其封裝結構System package module manufacturing method and package structure thereof

本發明乃是關於一種系統封裝模組的製造方法及其封裝結構,特別是指一種在系統封裝模組的基板上以接地的導電墊(ground pads)配合錫膏代替接地過孔(ground via)的製造方法及其結構。The invention relates to a method for manufacturing a system package module and a package structure thereof, in particular to a ground pad on a substrate of a system package module, and a solder pad instead of a ground via. Manufacturing method and structure thereof.

隨著可攜式消費性電子產品市場快速成長,如何加速改善可攜式產品在輕薄短小、低耗電方面的性能,成為系統廠商面臨的重要課題。具備微型體積、低耗電特點的系統封裝模組(SiP Module,System in Package;或稱Module IC)被視為是最適合應用在可攜式產品上的解決方案。With the rapid growth of the portable consumer electronics market, how to accelerate the improvement of the performance of portable products in terms of lightness, thinness, and low power consumption has become an important issue for system manufacturers. The system package (SiP Module, System in Package; or Module IC) with micro-volume and low power consumption is considered to be the most suitable solution for portable products.

系統封裝模組將一些元件,包括IC或被動元件等利用特殊材料的基板及構裝技術封裝在一個模組內。The system package module encapsulates some components, including ICs or passive components, in a module using special materials and substrate technology.

系統封裝模組已應用於無線通訊模組,包括WLAN、Bluetooth、GPS、WiMAX和DVB-H/T-DMB等,都可以透過系統封裝模組導入可攜式裝置中。The system package module has been applied to wireless communication modules, including WLAN, Bluetooth, GPS, WiMAX, and DVB-H/T-DMB, and can be imported into the portable device through the system package module.

先前的系統封裝模組除了在基板鑽設電路孔以供零件設置之用,另外還沿著系統封裝模組的邊緣鑽設接地類型的過孔(VIA),接地過孔的作用是給信號提供一個最短的回流路徑。然而上述接地過孔使得基板的良率降低,另一面通常是以雷射鑽孔的方式而造成額外的成本。再者,接地過孔是以中心填孔的金屬導電,其導電面積小,因而導電性不是很理想。In the prior system package module, in addition to drilling the circuit hole in the substrate for component setting, a grounding type via (VIA) is drilled along the edge of the system package module, and the function of the ground via is to provide signals. One of the shortest return paths. However, the ground vias described above reduce the yield of the substrate, and the other side typically results in additional cost in the manner of laser drilling. Furthermore, the ground via is electrically conductive with a metal filled in the center, and its conductive area is small, so that the conductivity is not ideal.

緣是,本發明人有感上述問題之可改善,乃潛心研究並配合學理之運用,而提出一種設計合理且有效改善上述問題之本發明。The reason is that the present inventors have felt that the above problems can be improved, and that the present invention has been deliberately studied and used in conjunction with the theory, and a present invention which is reasonable in design and effective in improving the above problems has been proposed.

本發明所要解決的技術問題,在於提供一種系統封裝模組的製造方法及其封裝結構,其中以接地的導電墊(ground pads)配合錫膏代替接地過孔,以改善其導電性,提昇基板的良率。The technical problem to be solved by the present invention is to provide a method for manufacturing a system package module and a package structure thereof, wherein a grounded conductive pad is used in place of a solder paste instead of a ground via to improve conductivity and enhance the substrate. Yield.

為了解決上述技術問題,根據本發明之其中一種方案,提供一種系統封裝模組的製造方法,包括下列步驟:提供一基板,並設定多數切割線於該基板上,該多數切割線將該基板分成多個單元模組區,其中每一個單元模組區設置有至少一零件;沿著該切割線形成多個條狀的導電墊於該基板的上表面,該導電墊電性連接至接地電位,該多個導電墊延伸一預定的寬度至每一該單元模組區內部;塗佈錫膏於該多個導電墊上;固化該錫膏以形成接地錫塊;形成一包覆層以覆蓋該基板、該零件及該接地錫塊;沿著該切割線以區分出該多個單元模組區;及形成一金屬遮蔽層於每一分開的該單元模組區之該包覆層的外表面。In order to solve the above problems, according to one aspect of the present invention, a method for manufacturing a system package module includes the steps of: providing a substrate and setting a plurality of cutting lines on the substrate, the plurality of cutting lines dividing the substrate into a plurality of unit module areas, wherein each unit module area is provided with at least one component; a plurality of strip-shaped conductive pads are formed along the cutting line on the upper surface of the substrate, and the conductive pads are electrically connected to the ground potential The plurality of conductive pads extend a predetermined width to each of the unit module regions; applying solder paste to the plurality of conductive pads; curing the solder paste to form a ground tin block; forming a cladding layer to cover the a substrate, the part and the grounding tin block; along the cutting line to distinguish the plurality of unit module regions; and forming a metal shielding layer on an outer surface of the cladding layer of each of the separate unit module regions .

此外,根據本發明上述的製造方法,本發明提供一種系統封裝模組的封裝結構,包括有一基板、至少一零件、多個接地錫塊、一包覆層、及一金屬遮蔽層。該基板形成有多個條狀的導電墊係鄰近上表面的邊緣。該至少一零件設置於該基板上。該多個接地錫塊形成於該些導電墊上,其中該包覆層覆蓋該基板、該零件及該接地錫塊,其中該接地錫塊外露於該包覆層的側面。該金屬遮蔽層覆蓋該包覆層的外表面。In addition, according to the above manufacturing method of the present invention, the present invention provides a package structure of a system package module, comprising a substrate, at least one component, a plurality of ground tin blocks, a cladding layer, and a metal shielding layer. The substrate is formed with a plurality of strip-shaped conductive pads adjacent to the edges of the upper surface. The at least one component is disposed on the substrate. The plurality of grounding tin blocks are formed on the conductive pads, wherein the covering layer covers the substrate, the part and the grounding tin block, wherein the grounding tin block is exposed on a side of the covering layer. The metal shielding layer covers the outer surface of the cladding layer.

本發明至少具有以下有益效果:The invention has at least the following beneficial effects:

一、藉由接地的導電墊及接地錫塊可將靜電導出。1. The static electricity can be led out by the grounded conductive pad and the grounding tin block.

二、金屬遮蔽層可以避免電磁干擾,並且提供隔離電磁波的功能。Second, the metal shielding layer can avoid electromagnetic interference and provide the function of isolating electromagnetic waves.

三、節省鑽孔(接地過孔)成本,也提高基板的良率。Third, the cost of drilling (grounding via) is saved, and the yield of the substrate is also improved.

四、比較傳統的接地過孔,導電墊的導電性提昇,因此進一步改善系統封裝模組的塗佈時間,達到省時、省材料的經濟性。Fourth, compared with the traditional grounding via, the conductivity of the conductive pad is improved, so the coating time of the system package module is further improved, and the economics of saving time and materials are achieved.

為了能更進一步瞭解本發明為達成既定目的所採取之技術、方法及功效,請參閱以下有關本發明之詳細說明、圖式,相信本發明之目的、特徵與特點,當可由此得以深入且具體之瞭解,然而所附圖式與附件僅提供參考與說明用,並非用來對本發明加以限制者。In order to further understand the technology, method and effect of the present invention in order to achieve the intended purpose, reference should be made to the detailed description and drawings of the present invention. The drawings and the annexed drawings are intended to be illustrative and not to limit the invention.

請參考第一圖至第五圖,為本發明之系統封裝模組的製造方法的步驟示意圖。本發明之系統封裝模組的製造方法,包括下列步驟:首先,提供一基板10。該基板10為一多層疊合(multi-stack)的電路板。該基板10可以是BT(Bismaleimide Triazine Resin)樹脂基板(內嵌玻纖布)、環氧玻璃纖維板(FR4、FR5)、或LTCC基板(Low Temperature Co-fired Ceramic,低溫共燒陶瓷基板)等材質所構成。例如,利用低溫共燒的陶瓷基板(LTCC)整合IC與被動元件,以多層堆疊的方式成為一個模組。Please refer to the first to fifth figures, which are schematic diagrams of the steps of the method for manufacturing the system package module of the present invention. The method for manufacturing a system package module of the present invention comprises the following steps: First, a substrate 10 is provided. The substrate 10 is a multi-stack circuit board. The substrate 10 may be a BT (Bismaleimide Triazine Resin) resin substrate (embedded fiberglass cloth), an epoxy glass fiber board (FR4, FR5), or a LTCC substrate (Low Temperature Co-fired Ceramic). Composition. For example, a low temperature co-fired ceramic substrate (LTCC) is used to integrate an IC and a passive component into a module in a multi-layer stack.

該基板10設有多條切割線C1、C2、C3。該切割線的數目視基板的大小而定。第一圖中,由側視觀之,該切割線C1、C2、C3將該基板10分成二個單元模組區D1、D2。The substrate 10 is provided with a plurality of cutting lines C1, C2, and C3. The number of the cutting lines depends on the size of the substrate. In the first figure, the cutting lines C1, C2, C3 divide the substrate 10 into two unit module areas D1, D2 from the side view.

該基板10的上表面沿著該切割線C1、C2、C3形成多個條狀的導電墊101、103、105。該些導電墊的形狀可以是連續或者是片段狀的條狀,後續將舉例說明。該導電墊101、103、105電性連接至接地電位,亦即導接於該基板10的接地電路。該多個導電墊101、103、105延伸一預定的寬度至每一該單元模組區D1、D2內部。舉例來說,該導電墊101、103、105延伸至每一該單元模組區D1、D2內部的寬度可以為4密耳(mil),亦即每一導電墊的寬度為8密耳(mil)。在該基板10的外框部份,該導電墊101、105也由該切割線C1、C3向外延伸。上述導電墊101、103、105較佳的形成方式,可以是在該基板10的上表面鍍一金屬層而形成,例如鍍金。A plurality of strip-shaped conductive pads 101, 103, and 105 are formed on the upper surface of the substrate 10 along the dicing lines C1, C2, and C3. The shape of the conductive pads may be continuous or strip-shaped strips, which will be exemplified later. The conductive pads 101, 103, and 105 are electrically connected to a ground potential, that is, to a ground circuit of the substrate 10. The plurality of conductive pads 101, 103, 105 extend a predetermined width to the inside of each of the unit module regions D1, D2. For example, the conductive pads 101, 103, 105 may extend to a width of 4 mils inside each of the unit module regions D1, D2, that is, each conductive pad has a width of 8 mils (mil). ). In the outer frame portion of the substrate 10, the conductive pads 101, 105 also extend outward from the cutting lines C1, C3. Preferably, the conductive pads 101, 103, and 105 are formed by plating a metal layer on the upper surface of the substrate 10, for example, gold plating.

如第二圖所示,每一個單元模組區D1、D2各形成多個線路102、104以供設置至少一電子零件,如積體電路晶片或被動元件…等。上述提到導電墊由鍍金屬層的順序,可以在製作該基板10的線路102、104時,一同完成。如圖所示,該單元模組區D1、D2各設置有一零件21、22,例如IC及被動元件。該零件21、22可以是以表面黏著技術設置於該基板10上。然而各零件設於基板10的方式並不限於上述表面黏著技術。As shown in the second figure, each of the unit module areas D1, D2 forms a plurality of lines 102, 104 for providing at least one electronic component, such as an integrated circuit chip or a passive component. The above mentioned order of the conductive pads by the metallization layer can be completed together when the lines 102, 104 of the substrate 10 are fabricated. As shown, the unit module areas D1, D2 are each provided with a part 21, 22, such as an IC and a passive component. The parts 21, 22 may be disposed on the substrate 10 in a surface mount technique. However, the manner in which the respective components are provided on the substrate 10 is not limited to the above surface adhesion technique.

接著,塗佈錫膏於該多個導電墊101、103、105上,並固化該錫膏使之硬化後以形成接地錫塊(以標號S1、S3、S5表示)。因為該導電墊101、103、105電性連接至接地電位,該些接地錫塊S1、S3、S5也電性連接至接地電位。關於上述塗佈錫膏於導電墊101、103、105的方式,較佳地可以是以鋼板印刷的方式以塗佈錫膏於該些導電墊101、103、105上。再者,固化該錫膏以形成接地錫塊S1、S3、S5的步驟與設置該零件21、22於該基板10上的步驟可以同時進行。亦即在表面黏著以設置零件21、22的過程中,該基板10通過錫爐(未圖示)時,也同時硬化該錫膏。如此可節省時間。Next, a solder paste is applied onto the plurality of conductive pads 101, 103, 105, and the solder paste is cured to be hardened to form a ground tin block (indicated by reference numerals S1, S3, and S5). Because the conductive pads 101, 103, and 105 are electrically connected to the ground potential, the grounding tin blocks S1, S3, and S5 are also electrically connected to the ground potential. Regarding the manner in which the solder paste is applied to the conductive pads 101, 103, and 105, it is preferable to apply a solder paste to the conductive pads 101, 103, and 105 by means of a steel plate. Furthermore, the step of curing the solder paste to form the ground pads S1, S3, S5 and the step of providing the parts 21, 22 on the substrate 10 can be performed simultaneously. That is, in the process of attaching the parts 21, 22 to the surface, when the substrate 10 passes through a tin furnace (not shown), the solder paste is simultaneously hardened. This saves time.

然後,形成一包覆層30以覆蓋該基板10、該零件21、22及該接地錫塊S1、S3、S5。形成上述包覆層30的步驟,可以用鑄模方式(molding)將絕緣材質覆蓋於該基本10的表面,以提供各零件之間絕緣作用。該包覆層30可以用包覆化合物(molding compound)等材質所構成。Then, a cladding layer 30 is formed to cover the substrate 10, the parts 21, 22, and the ground tin blocks S1, S3, S5. In the step of forming the above-mentioned cladding layer 30, an insulating material may be coated on the surface of the base 10 by molding to provide insulation between the parts. The coating layer 30 can be made of a material such as a molding compound.

請參考第四圖,為本發明之系統封裝模組的製造方法中切割步驟後的示意圖。此圖顯示,沿著第三圖中該切割線C1、C2、C3以區分出該多個單元模組區。以單元模組區D1描述的話,切割後,該接地錫塊S1、S3連同該導電墊101、103外露於該單元模組區D1的側面。Please refer to the fourth figure, which is a schematic diagram of the manufacturing method of the system package module of the present invention after the cutting step. This figure shows that along the cutting lines C1, C2, C3 in the third figure to distinguish the plurality of unit module areas. As described in the unit module area D1, after the cutting, the grounding tin blocks S1, S3 together with the conductive pads 101, 103 are exposed on the side of the unit module area D1.

請參考第五圖及第六圖,為本發明之系統封裝模組的製造方法完成一系統封裝模組的剖視圖及立體圖。此圖顯示一金屬遮蔽層40形成於該包覆層30的外表面,而完成一系統封裝模組的封裝結構100。上述金屬遮蔽層40可一併覆蓋該基板10,或不覆蓋該基板10。金屬遮蔽層40可以是導電塑膠、導電油墨、導電碳粉…等,其形成的方式可以是噴鍍(spraying)、濺鍍(sputtering)、蒸鍍(evaporation)、沈積(deposition)、塗佈(coating)、或印刷(printing)等方式。Please refer to FIG. 5 and FIG. 6 for a cross-sectional view and a perspective view of a system package module according to the method for manufacturing the system package module of the present invention. This figure shows a metal shielding layer 40 formed on the outer surface of the cladding layer 30 to complete the package structure 100 of a system package module. The metal shielding layer 40 may cover the substrate 10 together or not. The metal shielding layer 40 may be a conductive plastic, a conductive ink, a conductive carbon powder, or the like, which may be formed by spraying, sputtering, evaporation, deposition, coating ( Coating), or printing (printing).

如第六圖所示,依據本發明製造方法所完成之系統封裝模組的封裝結構100,在基板10上表面的邊緣形成有多個條狀的導電墊101、103。此外,還有多個接地錫塊S1、S3形成於該些導電墊101、103上。覆蓋該包覆層30後露出接地錫塊S1、S3而與金屬遮蔽層40電性接觸。由於上述導電墊101、103連接於接地電位,藉此本發明可將靜電導出。再者,金屬遮蔽層40全面地覆蓋該包覆層30,作為避免電磁干擾的屏蔽層,提供隔離電磁波的功能。As shown in the sixth figure, in the package structure 100 of the system package module completed by the manufacturing method of the present invention, a plurality of strip-shaped conductive pads 101, 103 are formed on the edge of the upper surface of the substrate 10. In addition, a plurality of grounding tin blocks S1 and S3 are formed on the conductive pads 101 and 103. After covering the cladding layer 30, the ground tin blocks S1 and S3 are exposed to be in electrical contact with the metal shielding layer 40. Since the above-mentioned conductive pads 101, 103 are connected to the ground potential, the present invention can derive the static electricity. Furthermore, the metal shielding layer 40 covers the cladding layer 30 in its entirety as a shielding layer for avoiding electromagnetic interference, and provides a function of isolating electromagnetic waves.

本發明的結構,是利用接地的導電墊(Ground pads)的接觸面作為導電之用,不需要如先前技術在基板的外圍鑽設過孔(via)。再者,鑽設過孔很容易增加基板的損壞率。因此本發明,不僅一面節省鑽孔的成本,另一面也提高基板的良率。The structure of the present invention utilizes a contact surface of a grounded conductive pad as a conductive material, and does not require a via to be drilled on the periphery of the substrate as in the prior art. Furthermore, drilling a via hole can easily increase the damage rate of the substrate. Therefore, the present invention not only saves the cost of drilling, but also improves the yield of the substrate.

本發明除了上述的優點以外,由於以接地的導電墊(ground pads)代替接地過孔(VIA),導電墊的接觸面較大,因而提昇了導電性。導電性的提昇進一步改善系統封裝模組的塗佈時間,達到省時、省材料的經濟性。In addition to the above advantages, the present invention has a large contact surface of the conductive pad because of a grounded conductive pad instead of a ground via (VIA), thereby improving conductivity. The improvement of conductivity further improves the coating time of the system package module, achieving time-saving and material-saving economy.

請參考第七圖至第九圖,分別為本發明中佈設導電墊不同實施例之立體圖。本發明上述的導電墊及接地錫塊的佈置可以有不同的實施方式,在第七圖中,導電墊完全覆蓋切割線,然後再沿著導電墊塗佈錫膏。至終形成如同田字狀的接地錫塊S1、S2、S3、S4、S5、S6。第六圖中的實施例即依據第七圖的佈置方式所得到的。Please refer to the seventh to ninth drawings, which are respectively perspective views of different embodiments of the conductive pads disposed in the present invention. The above-mentioned arrangement of the conductive pad and the grounding tin block of the present invention may have different embodiments. In the seventh figure, the conductive pad completely covers the cutting line, and then the solder paste is applied along the conductive pad. At the end, the grounding tin blocks S1, S2, S3, S4, S5, and S6 are formed in the shape of a field. The embodiment in the sixth figure is obtained in accordance with the arrangement of the seventh figure.

第八圖及第九圖所示的導電墊乃是局部覆蓋該切割線,然後再沿著導電墊塗佈錫膏。第八圖形成如同川字狀的接地錫塊S1、S3、S5,第九圖則是形成局部段落的接地錫塊S11、S21、S22、S23、S30、S51、S61、S62、S63。依上述各實施例依切割線切開後,每一單元模組區均有多個接地錫塊外露且透過導電墊電連接於接地電位,藉此同樣可達到本發明的目的。其中第八圖及第九圖的實施例的優點在於,在不同的系統封裝模組中,可因應零件的擺設方式而靈活地變化其導電墊的佈置方式,使各零件以最佳化的導電線路達成接地連接。The conductive pads shown in the eighth and ninth views partially cover the cutting line, and then apply the solder paste along the conductive pads. The eighth figure forms a grounded tin block S1, S3, S5 like a zigzag shape, and the ninth figure is a ground tin block S11, S21, S22, S23, S30, S51, S61, S62, S63 which form a partial segment. After the cutting according to the above embodiments, each unit module area has a plurality of grounding tin blocks exposed and electrically connected to the ground potential through the conductive pads, thereby achieving the object of the present invention. The eighth embodiment and the ninth embodiment have the advantages that in different system package modules, the arrangement of the conductive pads can be flexibly changed according to the arrangement manner of the parts, so that the parts are optimally conductive. The line is connected to the ground.

惟以上所述僅為本發明之較佳可行實施例,非因此即侷限本發明之專利範圍,故舉凡運用本發明說明書及圖式內容所為之等效技術變化,均同理皆包含於本發明之範圍內,合予陳明。However, the above description is only a preferred embodiment of the present invention, and thus the scope of the present invention is not limited thereto, and the equivalent technical changes of the present specification and the contents of the drawings are all included in the present invention. Within the scope of the agreement, Chen Ming.

10...基板10. . . Substrate

C1、C2、C3...切割線C1, C2, C3. . . Cutting line

S1、S2、S3、S4、S5、S6、S11、S21、S22、S23、S30、S51、S61、S62、S63...接地錫塊S1, S2, S3, S4, S5, S6, S11, S21, S22, S23, S30, S51, S61, S62, S63. . . Grounding tin block

D1、D2...單元模組區D1, D2. . . Unit module area

101、103、105...導電墊101, 103, 105. . . Conductive pad

102、104...線路102, 104. . . line

21、22...零件21, 22. . . Components

30...包覆層30. . . Coating

40...金屬遮蔽層40. . . Metal shielding layer

100...封裝結構100. . . Package structure

第一圖,為本發明之系統封裝模組的製造方法中形成導電墊及線路的示意圖;The first figure is a schematic diagram of forming a conductive pad and a line in the manufacturing method of the system package module of the present invention;

第二圖,為本發明之系統封裝模組的製造方法中塗佈錫膏及擺置零件的示意圖;The second figure is a schematic diagram of applying solder paste and placing parts in the manufacturing method of the system package module of the present invention;

第三圖,為本發明之系統封裝模組的製造方法中鑄模的示意圖;The third figure is a schematic view of a mold in a method of manufacturing a system package module of the present invention;

第四圖,為本發明之系統封裝模組的製造方法中切割步驟後的示意圖;The fourth figure is a schematic view of the manufacturing method of the system package module of the present invention after the cutting step;

第五圖,為本發明之系統封裝模組的製造方法完成一系統封裝模組的剖視圖;FIG. 5 is a cross-sectional view showing a system package module of the present invention;

第六圖,為本發明之系統封裝模組的製造方法完成一系統封裝模組的剖視圖;FIG. 6 is a cross-sectional view showing a system package module of the method for manufacturing a system package module of the present invention;

第七圖,本發明佈設導電墊第一實施例之立體圖;7 is a perspective view showing a first embodiment of the conductive pad of the present invention;

第八圖,本發明佈設導電墊第一實施例之立體圖;及Figure 8 is a perspective view showing the first embodiment of the conductive pad of the present invention; and

第九圖,本發明佈設導電墊第一實施例之立體圖。In a ninth view, a perspective view of a first embodiment of a conductive pad of the present invention is provided.

100...封裝結構100. . . Package structure

101、103...導電墊101, 103. . . Conductive pad

102...線路102. . . line

S1、S3...接地錫塊S1, S3. . . Grounding tin block

D1...單元模組區D1. . . Unit module area

21...零件twenty one. . . Components

30...包覆層30. . . Coating

40...金屬遮蔽層40. . . Metal shielding layer

Claims (9)

一種系統封裝模組的製造方法,包括下列步驟:提供一基板,並設定多數切割線於該基板上,該多數切割線將該基板分成多個單元模組區,其中每一個單元模組區設置有至少一零件;沿著該切割線形成多個條狀的導電墊於該基板的上表面,該導電墊電性連接至接地電位,該多個導電墊延伸一預定的寬度至每一該單元模組區內部;塗佈錫膏於該多個導電墊上;固化該錫膏以形成接地錫塊;形成一包覆層以覆蓋該基板、該零件及該接地錫塊;沿著該切割線分開該多個單元模組區;及形成一金屬遮蔽層於每一分開的該單元模組區之該包覆層的外表面。A method for manufacturing a system package module includes the steps of: providing a substrate and setting a plurality of cutting lines on the substrate, the plurality of cutting lines dividing the substrate into a plurality of unit module areas, wherein each unit module area is set Having at least one part; forming a plurality of strip-shaped conductive pads on the upper surface of the substrate along the cutting line, the conductive pads are electrically connected to a ground potential, and the plurality of conductive pads extend a predetermined width to each of the Inside the unit module area; applying solder paste on the plurality of conductive pads; curing the solder paste to form a ground tin block; forming a cladding layer to cover the substrate, the part and the grounding tin block; along the cutting line Separating the plurality of unit module regions; and forming a metal shielding layer on an outer surface of the cladding layer of each of the separate unit module regions. 如申請專利範圍第1項所述之系統封裝模組的製造方法,其中該基板為一多層疊合(multi-stack)的電路板,該基板的上表面鍍一金屬層而形成該導電墊,並且該零件是以表面黏著技術設置於該基板上。The method of manufacturing a system package module according to claim 1, wherein the substrate is a multi-stack circuit board, and the upper surface of the substrate is plated with a metal layer to form the conductive pad. And the part is placed on the substrate by surface adhesion technology. 如申請專利範圍第2項所述之系統封裝模組的製造方法,其中以鋼板印刷的方式以塗佈錫膏於該多個導電墊上,並且加熱該錫膏以形成接地錫塊的步驟與設置該零件於該基板上的步驟同時進行。The method for manufacturing a system package module according to claim 2, wherein the step of coating the solder paste on the plurality of conductive pads by using a steel plate printing method and heating the solder paste to form a ground tin block The steps of the part on the substrate are performed simultaneously. 如申請專利範圍第1項所述之系統封裝模組的製造方法,其中該導電墊延伸至每一該單元模組區內部的寬度為4密耳(mil)。The method of manufacturing a system package module according to claim 1, wherein the conductive pad extends to a width of 4 mils inside each of the unit module regions. 如申請專利範圍第1項所述之系統封裝模組的製造方法,其中該多個導電墊局部覆蓋該切割線。The method of manufacturing a system package module according to claim 1, wherein the plurality of conductive pads partially cover the cutting line. 一種系統封裝模組的封裝結構,包括:一基板,其形成有多個的導電墊係鄰近上表面的邊緣;至少一零件,設置於該基板上;多個接地錫塊形成於該些導電墊上;一包覆層,覆蓋該基板、該零件及該接地錫塊,其中每一該接地錫塊局部外露於該包覆層的側面;及一金屬遮蔽層,覆蓋該包覆層的外表面。A package structure of a system package module includes: a substrate formed with a plurality of conductive pads adjacent to an edge of the upper surface; at least one component disposed on the substrate; and a plurality of ground tin blocks formed on the conductive a cover layer covering the substrate, the part and the grounding tin block, wherein each of the grounding tin blocks is partially exposed on a side of the cladding layer; and a metal shielding layer covering the outer surface of the cladding layer . 如申請專利範圍第6項所述之系統封裝模組的封裝結構,其中上述基板保留一預定的寬度供該導電墊設置於其上,該預定的寬度為4密耳(mil)。The package structure of the system package module of claim 6, wherein the substrate retains a predetermined width for the conductive pad to be disposed thereon, the predetermined width being 4 mils. 如申請專利範圍第6項所述之系統封裝模組的封裝結構,其中該導電墊的形狀為連續或片段狀的條狀。The package structure of the system package module according to claim 6, wherein the conductive pad has a continuous or segment-like strip shape. 如申請專利範圍第6項所述之系統封裝模組的封裝結構,其中該基板為一多層疊合(multi-stack)的電路板。The package structure of the system package module according to claim 6, wherein the substrate is a multi-stack circuit board.
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