1252405 九、發明說明： 【發明所屬之技術領域】 本發明係有關於用來連接一個pc卡至電腦系統的一個 PC卡控制器和一個PC卡電源開關，特別是一個具有較少接 腳（pin)數的PC卡控制器，以較佳的成本效益製造PC卡控制 器和PC卡電源開關。 【先前技術】 PC卡（16位元PCMCIA卡和32位元CardBus卡）被廣泛地安 裝於電腦系統中，特別是在筆記型電腦或膝上型電腦。PC 卡允許用戶使用一可交換的方法，將不同的功能，例如數 據機和資料儲存，介接到一個電腦系統。PC卡標準公佈了 卡的外型參數、電源需求、電性介面等的規範以確保許多 電腦系統製造商之間的互通性。通過遵守PC卡標準，一個 電腦系統製造商可經由PC卡的連接性在他們的裝置上啟用 這些模組化功能。 現今已經有許多製造商提供了基於PCI的類似產品以橋 接或連接一個電腦系統中的一個PCI匯流排至一個PC卡控 制器。例如，由德州儀器（Texas Instrument Inc.)所製造名 稱為PCI1410的商品、英屬開曼群島凹凸科技國際有限公司 (02Micro International Limited)所製造名稱為 OZ6912 的商 品、臺灣迅杰科技有限公司（EnE Technology Inc· in Taiwan) 所製造名稱為CB 1410的商品以及理光有限公司（Ricoh Co·) 名稱為R5C475的商品，皆包括最基礎的版本。 即使在PC卡控制器最基礎的版本中，仍需要大量的訊號 03 23-spec+claims (C) (replacement) 1252405 以滿足PCI和PC卡的規範，以及一些其他傳統訊號以滿足普 遍採行之系統級介面準則和實際標準（de-facto standards)。提供這些大量訊號的PC卡控制器被封裝在一實 際標準（de-facto standards)的144接腳方型扁平式（QFP)封 裝、144/145球狀格柵陣列（BGA)封裝以及128接腳方型扁 平式（QFP)封裝中。 應當注意的是增加訊號將佔用晶片面積以及增加封裝的 成本。晶片面積與晶片的成本成比例’特別係在一個非線 性且是連續的成本尺寸曲線上。關於封裝，成本相對接腳 數的曲線通常是一個位階函數，因為並沒有工業標準封裝 可用於每種接腳數。舉例來說，某些QFP類型封裝的工業 標準封裝例子有：80接腳、100接腳、120接腳、128接腳和 144接腳。封裝的尺寸和接腳數在封裝成本中是很大的因 素。進一步說，減少PC卡控制器的接腳數同樣能降低PC卡 控制器之印刷電路板的電路板面積。 傳統的PC卡控制器終端 即使在PC卡控制器最基礎的版本中，仍需要大量的訊號 以滿足PCI和PC卡的規範，以及一些其他傳統訊號以滿足普 遍採行的系統級介面準則和實際標準（de-facto standards) 之。 當今市場上的PC卡控制器都遵照PCI規範v2.3。該PCI規 範包括對超過6 0種訊號的一定義說明，包括通訊協定和輸 入/輸出電性規格之說明。PC卡控制器通常執行下列傳統的 PCI輸入和/或輸出終端（terminal): 03 23-spec+claims (C) (replacement) 1252405 a) PCI仲裁訊號：REQ#和GNT# ； b) PCI 控制訊號：FRAME#，IRDY#, TRDY#，STOP#， DEVSEL#, PERR#, SERR# ； c) PCI位址/資料訊號：八〇31:0; d) PCI指令和位元組啟動訊號：C/BE3:0# ; e) PCI配置週期選擇：IDSEL ; f) PCI中斷：INTA# ;以及 g) PCI 時鐘：CLK。 當今市場上的PC卡控制器亦遵照PC卡版本8.0之標準。該 PC卡標準包括對超過60種訊號的一定義，包括協定和輸入/ 輸出電性規格之說明。一個PCMCIA卡的16位元模型的訊號 可與32位元CardBus的定義多工使用（Multiplexed)。PC卡控 制器通常執行下列傳統的PC卡輸入和/或輸出終端： a) CardBus仲裁訊號：CREQ# 和 CGNT# ； b) CardBus控制訊號：CFRAME#，CIRDY#，CTRDY#， CSTOP#，CDEVSEL# ; c) CardBus 位址 / 資料訊號：CAD31:0 ; d) CardBus指令和位元組啟動訊號：CC/BE3:0# ; e) CardBus 中斷：CINT# ; f) CardBus時鐘：CCLK ; g) 不與CardBus訊號多工使用的PCMCIA 16位元訊號： D2，D14,A18 ;以及 h) PC卡檢測和電壓感應訊號：CD1#、CD2#、VS1及VS2。 某些傳統的PC卡控制器終端功能係用來滿足普遍採行的 03 23-spec+claims (C) (replacement) 1252405 系統級介面準則和實際標準（de-facto standards)。於目前實 務上，這些傳統PC卡控制器終端功能有些多工在同一個終 端上’並且通常可為一或另一功能而配置之，以減少接腳 數。這些訊號如下所列： a) PC卡音頻輸出，其控制一個來自一個PC卡訊號源的 音頻驅動器：這裏命名為SPKR# ; b) PC卡活動指示器輸出，其一般控制一個LED :這裏命 名為 SKT_LED ; _ c) PCI重置（reset)輸入：這裏命名為PRST# ; d) PCI時鐘控制，經由”時鐘運行協定”終端，實際標準 (de-facto standards):這裏命名為 CLKRUN# ; e) 電源管理内容值重置：這裏命名為GRST# ; f) ACPI電源管理事件：這裏命名為PME# ; g) PCMCIA振鈴訊號指示器，使PCMCIA數據機能喚醒 系統：這裏命名為RI_〇UT ; h) 串列化保留的IRQ協定終端：這裏命名為IRQSER ; ® i)平行化電源開關通信終端：這裏命名為VCCD0#、 VCCD1#、VPPD0及 VPPD1 ; j)串聯電源開關通信終端：這裏命名為CLOCK 、DATA 及LATCH。 特殊功能終端 在目前的實務中，很多新的功能已經被集成到pc卡控制 器中；例如，IEEE1394鏈路層（IEEE1394 Link)或者鏈路+ 實體層（Link+PHY)電路、智慧卡讀取器、快閃媒體讀取器 03 23-spec+claims (C) (replacement) -10- 1252405 和安全數位輸入/輸出（SDIO)讀取器。其他，例如將IrDA控 制為和網路控制器集成到pc卡控制器的構想已經形成。在 很夕的案例中，當一個新功能被集成到PC卡控制器中，就 需要新的終端去實現新功能的應用，本文中稱為特殊功能 終端。 特殊功能終端的例子如下： a) 由IS07816定義的智慧卡介面； b) 由 SDA(Secure Digital Association)定義的 SD記憶體 卡介面； c) 由SSFDC論壇定義的智慧媒體卡介面； 旬由富士（FujiFilm)和奥林巴斯（〇lympus)定義的 xD-Picture卡介面； e) 由IEEE1394標準定義的高速串列匯流排電性介面；以 及 f) 由IEEE1394_2000標準定義的實體層/鏈路層 (PHY/Link)介面。 特殊功能終端之加入特別增加了 pc卡控制器的接腳數。 在八他木例中，特殊功能終端是由一個典型的PC卡控制器 中保留的和/或未使用的終端功能所提供的。然而，PC卡控 制器的製造商不斷去除經保留及未使用的終端功能，因此 在不增加PC卡控㈣㈣數的情況下為特殊魏終端尋找 位置變得很困難。 本文所述的特殊功能終端與集成到_個以卡控制器的功 能有關。例如，如果一個PC卡控制器增強為含有智慧卡讀 03 23-spec+claims (C) (replacement) -11 · 1252405 取器邏輯，那麼除了傳統的pc卡控制器終端，任何包括在 PC卡控制器且與智慧卡邏輯的使用有關的新終端都將歸類 為特殊功能終端。在這個例子中，智慧卡檢測所用到的終 端即為一個特殊功能終端。 傳統PC卡電源開關 當一個PC卡被插入PC卡連接器時，藉由卡檢測和電壓感 應訊號（亦稱為CD/VS訊號）而被傳統PC卡控制器檢測其連 接。CD/VS訊號指示電性介面和PC卡的電壓需求。PC卡控 制器啟動卡上合適的電性介面，並且經由電控制訊號與PC 卡電源開關通信指示卡的電壓需求。PC卡電源開關將基於 控制資訊為PC卡啟動/提供VCC和VPP電源，所述兩個電源 已在PC卡標準中說明。 控制資訊是由PC卡控制器根據系統所用的開關，藉由一 個電源開關通信協定，提供給PC卡電源開關。當今用到兩 種實際標準（de-facto standard)電源開關控制介面和相應的 通信協定：一個使用串列通信協定之串列控制介面，以及 一個使用一個平行通信協定之平行控制介面。例如，串列 PC卡電源開關可從德州儀器（Texas Instruments Inc.)所製 造之商品名稱為TPS2206以及英屬開曼群島凹凸科技國際 有限公司（〇2Micro International Limited)所製造之商品名 稱為OZ2206中得出。平行PC卡電源開關可從德州儀器 (Texas Instruments Inc·)所製造之商品名稱為TPS2211以及 英屬開曼群島凹凸科技國際有限公司（〇2Micro International Limited)所製造之商品名稱為OZ2211中得 03 23-spec+claims (C) (replacement) -12- 1252405 出。TPS2206和TPS2211的資料表詳細說明了串列和平行控 制協定。 傳統PC卡電源開關終端包括： a) 電源供應終端，其輸入來自系統的電源，以及一個參 考地； b) 插槽源終端，其輸出電源給PC卡的VCC和VPP電源 執； c) PC卡電源控制終端（例如，平行協定，串列協定，關 閉控制訊號）；以及 d) 可選PC卡電源狀態終端。 可選電源狀態終端的例子係過電流指示器，過溫指示 器’以及電壓準位指示器（例如，VCC和/或VPP是在預定的 電壓範圍内）。 先前技術說明 圖1所不為先前技術中一個電腦系統丨02中典型的PC卡子 系統150。PC卡子系統15〇包括用於接收一個pc卡1〇6的一 個pc卡連接器105,以及一個連接至該pc卡連接器1〇5的 卡控制器100。PC卡控制器1〇〇亦連接至一主匯流排1〇1及一 主匯流排控制器114 1為系統CPU和電腦系統102的其他 70件提供連接。PC卡控制器100包括PC卡邏輯l〇〇a，其使 用pc卡通信協定而與主匯流排1()1通信，並且為對％卡⑽ 之連接而提t、PC卡電性介面輸入/輸出訊號1〇8。卡控制 的100同樣提供傳統終端功能11〇用以滿足普遍採用的系統 級介面準則和實際標準（de-facto standards)。 03 23-spec+claims (C) (replacement) •13- I252405 通常將特殊功能邏輯l〇〇b集成到一個PC卡控制器100中 來提供更多的功能，且特別是這個特殊功能邏輯提供輸入/ 輸出訊號11 5用以為與特殊集成功能相關的控制和資料元 件提供連接。 當一個PC卡106被插入PC卡連接器1〇5時，藉由卡檢測和 笔壓感應訊號1〇7(同樣稱為CD/VS訊號）而被傳統PC卡控 制器100檢測其連接。CD/VS訊號指示PC卡106的電性介面 1U，例如，CardBus或者16位元R2電性介面，以及pC卡1〇6 的電壓需求。PC卡控制器100啟動卡上合適的電性介面，並 且輸出電性控制訊號103至PC卡電源開關1〇4從而指示Pc 卡106的電壓需求。 PC卡電源開關104根據控制訊號103轉換PC卡的vcc和 VPP電源109至PC卡106 ’所述兩個電源已在pc卡標準中說 明。轉換到插槽的電源係由輸入112提供給PC卡電源開關 104。PC卡電源開關1〇4可以提供一個或多個插槽電源狀態 輸出113用以指示卡電源相關資訊，諸如過電流情況、過溫 情況以及電壓情況，例如VCC和/或VPP在預定電壓範圍之 内或之外。 圖2所示為先前技術中另一個電腦系統202中典型的ρ。卡 子糸統250的構想。PC卡子系統250與圖1所示的pc卡子系 統150相似，其中同樣的標號表示同樣的内容。pC卡控制哭 200連接至一個PCI主匯流排，並且藉由pci規範中已經定義 的PCI匯流排REQ#223和GNT#228仲裁訊號、一 pci匯流排 中斷訊號225以及其他傳統pci匯流排訊號224而與一 ？(：：1主 03 23-spec+claims (C) (replacement) -14- 1252405 =流排控制器214相連接。在這個較未普及的例子中，此被 集成到PC卡控制器的特殊功能邏輯係智慧卡讀取器邏輯 H ’且智慧卡輸入/輸出訊號2 2 7提供與智慧卡相關的 4工制§fl號。 圖种的控制器200同樣提供傳統終端功能，包括一個用 抗卡音頻之輸出訊號SPKR#226’以及其他用來滿足普遍 ^丁的系統級介面準則和實際標準（de_faetQ伽如他）的 訊號221，例如PCI時鐘控制（：1^汉1^#協定。 旦綜上所述’對於—個％卡控制器來說，儘量將終端的數 !最少化是有必要的。本發明提供了方法以及其他優勢。 【發明内容】 本發明的目的在於提供_個能將終端數目最少化的^卡 控制器。 為了能達到上述目的，本發明提供了-個用於連接-個 pc卡至一個電腦系統並且包括一個pc卡控制器和一個ρ。 卡電源開關的P c卡子系、统。p c卡控制器連接並操作p c卡。 PC卡電源開關用以為Pc卡提供電源並且為操作pc卡提供 至少一個控制訊號。 【實施方式】 —圖3所示為一個基於本發明實施例的電腦系統3〇2。在本 =施例中，電腦系統3G2包括PC卡子系統35G、記憶體控制 為380連接至主匯流排控制器314、記憶體384連接至記憶體 控制器380以及中央處理單元382連接至記憶體控制器 380。在本實施例中，顯示控制器藉由一個介面，例如 03 23-spec+claims (C) (replacement) -15- 1252405 加速圖形埠（AGP)388，連接至記憶體控制器380，從而輸出 顯示器訊號至顯示器389，例如一個LCD(液晶顯示器）。 在本實施例中，PC卡子系統350包括PC卡控制器300、PC 卡連接器305、主匯流排控制器314以及PC卡電源開關304。 PC卡控制器300經由通信介面332和通信協定與PC卡電源 開關304進行通信。 在不希望被所舉範例所局限的同時，下述具體實施例將 參考一個PCI匯流排作為主匯流排的情況進行描述；然而， 本發明並不受限於此。在此例子中，PC卡子系統350遵守PCI 規範ν2·3和PC卡標準8.0版本。 PC卡子系統350包括一個用來接收PC卡306的PC卡連接 器305。PC卡控制器300連接至PC卡連接器305，並且為PC 卡306的連接提供PC卡電性介面輸入/輸出訊號308。另外， PC卡控制器300連接至PCI主匯流排以及PCI主匯流排控制 器314，使用PC卡通信協定為系統CPU和其他電腦系統302 中的元件提供連接。PC卡控制器300除了 PCI匯流排REQ# 仲裁訊號323、PCI匯流排GNT#仲裁訊號328以及一個PCI 匯流排中斷訊號325以外（如圖4所示），還藉由PCI規範中定 義的PCI匯流排訊號324而與PCI主匯流排控制器314通信。 依照本發明的一個實施例，圖3中被集成到PC卡控制器 300的特殊功能邏輯係智慧卡讀取器邏輯300b，同時智慧卡 輸入/輸出訊號327提供與智慧卡有關的資料和控制訊號。 PC卡控制器300亦提供傳統終端功能，包括用來滿足普遍採 行的系統級介面準則和實際標準（de-facto standards)的訊 03 23-spec+claims (C) (replacement) -16- 1252405 號321，例如？(：：1時鐘控制clKRUN#協定。 當一個PC卡306被插入PC卡連接器305時，其連接就會藉 由卡檢測和電壓感應訊號307,即CD/VS訊號，而被PC卡電 源開關304檢測出來。CD/VS訊號指示PC卡3 06的電性介面 311，例如CardBus或16位元R2電性介面，以及PC卡306的 電壓需求。PC卡電源開關304經由通信介面332和通信協定 與PC卡控制器3〇〇通信，用以指示pc卡306的存在以及其他 資訊。 PC卡電源開關3〇4根據卡檢測和電壓感應訊號3〇7轉換 PC卡的VCC和VPP電源309，所述兩個電源已在PC卡標準中 說明。轉換到插槽的電源係由輸入3 12提供給PC卡電源開關 304的。PC卡電源開關304可以提供一個或多個插槽電源狀 態輸出313，用以指示卡電源相關資訊，諸如過流情況、過 溢情況以及電壓情況（例如VCC和/或VPP在預定電壓範圍 之内或之外）。 操作於通信介面332上的通信協定包括關於對Pc卡插入/ 拔出狀態以及卡識別為目的的CD/VS訊號307之狀態資 訊。PC卡電源開關304接收來自pc卡連接器305的CD/VS訊 號307’同時藉由操作於通信介面332上的通信協定傳遞 CD/VS訊號的狀態資訊至pc卡控制器3〇〇。 在本發明的實施例中，操作於通信介面332的通信協定包 括有關PC卡音頻SPKR#訊號（如圖6所示）的狀態資訊。 SPKR#訊號的狀態資訊通過使用通信介面332由pc卡控制 裔300傳遞至PC卡電源開關3〇4。pc卡電源開關304包括一 03 23-spec+claims (C) (replacement) -17- 1252405 個SPKR#輸出326a，此訊號係根據所傳輸的狀態資訊而被 判定。在一個實施例中，通信協定是一個被稱為基於框 (frame-based)的協定，而且通信協定的一個框包含幾個週 期。因此，操作於通信介面332上的通信協定提供SPKR#狀 態資訊的低延遲通信，這樣結構性的固有延遲就可以忽略 不计。所述通信協定將會在下文中作進一步具體的描述（參 見圖6)。 圖3中’為了與一個pci匯流排通信，操作於通信介面332 上的通化協定亦包括INTA#訊號（如圖6所示）和req#訊號 (如圖6所示）的狀態資訊。INTA#和req#訊號的狀態資訊經 由使用通信介面332由PC卡控制器300傳輸至Pc卡電源開 關304。PC卡電源開關304包括一個INTA#輸出325a和一個 REQ#輸出323a，此兩個訊號係根據所傳輸的狀態資訊而被 判定。操作於通信介面332上的通信協定提供inta_〇req# 狀態資訊的低延遲通信。 圖3中，操作於通^介面332上的通信協定包括供pci匯流 排通#之GNT#訊號（如圖7所示）的狀態資訊。pc卡電源開 關304包括一個GNT#輸入328a，其連接至ρα主匯流排控制 益314’並且經由通信協定和介面332而將有關訊號的 狀態資訊傳輸至PC卡控制器3〇〇。pc卡控制器3〇〇在如同其 係由一個專用的GNT#終端被取得的情況下使用這些狀態 資訊。 為了取樣新的輸入和冑時輸出’圖3所示的pc卡電源開關 3〇4包括-個新的時鐘參考334，且ρα時鐘為較佳時鐘，因 〇3 23.Spec+claims(C) (replacement) ·18_ 1252405 為匕與PC卡控制器300的終端同步。假如當本發明被使用於 傳輸高速特殊功能終端或者那些對於電源開關有低延遲要 求的終端時，那麼一個較高速時鐘將被採用，例如一個3〇 毫微秒（ns)時鐘。如果對延遲要求不嚴格，亦可考慮使用一 個較低速時鐘以節約電源。 圖4所示為基於本發明實施例的一個PC卡控制器300的方 塊圖。GNT#328、REQ#323、INTA#325、SPKRJ326 以及 CD/VS訊號307被轉移至pc卡電源開關304或由其提供。對 於本領域的技術人員來說顯而易見可知其他終端，例如特 殊功能終端327可被轉移至pc卡電源開關304中。 除此之外’ P C卡控制斋3 0 0可以提供一個可選的傳統模 式，其中PC卡控制器300的終端或終端映對（map)與傳統Pc 卡控制為相付。當增強模式被禁止或傳統模式被啟動，終 端提供給傳統PC卡訊號409，包括GNT#328、REQ#323、 INTA#325、SPKR#326以及CD/VS訊號307。在這樣一個傳 統模式中，一個先前技術類型或傳統類型的PC卡電源開關 電性介面103以及通信協定可以被使用，例如一個傳統平行 電源開關控制介面403或者一個傳統串列電源開關控制介 面404。串列電源開關控制介面404和平行電源開關控制介 面403兩者皆被提供’並且是多工在相同的終端上。 當增強模式被啟動’那些用於傳統PC卡訊號409的終端被 提供給其他的訊號和功能，並且PC卡電源開關304的終端被 提供給那些訊號和功能。換句話說，當增強模式被啟動， 那些為傳統PC卡訊號409提供的終端將被轉移至pc卡電源 03 23-spec+claims (C) (replacement) -19- 1252405 開關304 °協疋將與電源開關電性介面332共同運作，此電 性介面可以與電源開關電性介面103多工使用相同的終 端。本文描述的協定與兩個訊號共同運作：epsi_a訊號405 和EPSI—B訊號406。協定提供轉移至Pc卡電源開關304之所 有訊號的狀態資訊。 圖4描述了中斷訊號4〇7的幾個來源，這些來源連接至 卡電源開關304和PC卡控制器300，並且能引起INTA#訊號 325的判定。此INTA#訊號的狀態資訊經由一個内部連接 413提供給電源開關控制區塊4〇〇。類似的，音頻訊號4〇8 的幾個來源係連接PC卡電源開關3〇4和PC卡控制器3〇〇，且 能引起SPKR#訊號326的判定。此SPKR#訊號的狀態資訊經 由一個内部連接414提供給電源開關控制區塊4〇〇。由内部 連接413和414提供的狀態資訊使用協定和電性介面332與 電源開關通訊。 PCI仲裁區塊401請求對主（例如PCI)匯流排進行資料存 取’通常引起REQ#訊號3 23的判定。在PC卡控制器300中， 此請求將經由一個内部連接416提供給電源開關控制區塊 400 ’且PCI匯流排資料存取請求的狀態經由通信協定和通 "ίτ=τ "面332與PC卡電源開關304通訊。 傳統上，主PCI匯流排控制器314將經由判定GNT#訊號 328，來准許對PCI匯流排的資料存取，GNT#訊號328傳統 上為PC卡控制器中的一個終端。在基於本發明實施例中的 PC卡控制器300，此匯流排准許將通過一個内部連接416由 電源開關控制區塊400提供至PCI仲裁區塊401。pci匯流排 03 23-spec+claims (C) (replacement) -20- 1252405 貧料存取准許的狀態使用通信協定和通信介面332由pc卡 電源開關304進行通訊。 CD/VS訊號 3 07 包括四個訊號：CD1#、CD2#、VS1* VS2。 卡感應區塊402使用這些訊號以確定卡的存在、介面需求以 及電壓需求。一般而言，一個傳統pc卡控制器在感應過程 中判定VS1和/或VS2。因此，VS1和/或VS2訊號被視為輸入 /輸出，CD 1和CD2通常僅僅被當作輸入。根據本發明，引 起VS1和/或VS2判定的訊號的狀態資訊經由一個内部連接 41 5被提供給電源開關控制區塊4〇〇，同時這個狀態資訊使 用通信協定和通信介面332與PC卡電源開關304通訊。 CD/VS輸入狀態經由一個内部連接415由電源開關控制 區塊400提供至卡感應區塊4〇2。CD/VS輸入3〇7的取樣值使 用協定和通信介面332與PC卡電源開關304通訊。 在另一個實施例中，一個完整的卡感應狀態裝置實現於 電源開關304中，同時一個提供至pc卡控制器3〇〇的訊號通 k將提供所有需要的資訊，例如卡的存在、介面需求以及 電壓需求。 圖5所不描述了一個基於本發明實施例中pc卡電源開關 PC卡304的方塊圖。PC卡電源開關304包括幾個PC卡終端 5〇5。為輸出之PC卡終端5〇5係由在通信區塊500和輸入/輸 出區塊501之間的内部介面5〇2控制所判定的。内部介面5〇2 基於由操作在電性介面332上的通信協定所提供的每個輸 出的狀悲資訊來控制輸出。為輸入之PC卡終端505係由輸入 /輸出區塊501所取樣。取樣資訊經由一個内部介面502提供 03 23-spec+claims (C) (replacement) -21 - 1252405 給通信區塊500，且該狀態資訊經由操作在電性介面332上 的通化協定傳輸給PC卡控制器3〇〇。基於本發明實施例中的 PC卡電源開關3〇4實施一個pci時鐘輸入334作為一參考時 鐘，其係被用以取樣輸入和定時輸出。 PC卡電源開關304包括若干終端，例如電源終端3丨2、 vcc/vpp電源輸出終端309以及狀態指示器313。協定包括 用來控制PC卡電源狀態的傳統資訊，且該資訊經由一個内 部介面503提供至PC卡電源開關區塊5〇4。 圖6所示為本發明實施例中Epsi—a訊號的pc卡電源開關 通#協定。通信協定係用於由PC卡控制器300至pC卡電源 開關3 04間的資訊通信。圖6中所示的24個時鐘組成了 _個 通信框，且根據本發明實施例，1>(：：1時鐘源被作為一個參考 時鐘。在EPSI—A框中，PC卡控制器3〇〇判定Epsi—A終端為 一低電位。 所有EPSI一A框中的24個時鐘為輸出週期，其間pC卡控制 器300以與圖6中給出的協定資訊一致的值來判定Epsi—A終 端。本協定中未將確認（acknowledgement)相位設計進來， 就是指電源開關無法確認收到每個框所通信之資訊。本發 明通4協疋中的EPSI一A元件係一個單向資料協定，其中資 料僅以一個方向傳輸。一個單向資料協定可以包括一個確 認相位，因為確認本身不被看作資料本身。 EPSI_A框中有幾個通信REQ#訊號狀態的週期（圖中列出 了 8個週期）。這樣做是為了減少向開關傳輸此資訊時的延 遲，因為過多的REQ#延遲會產生重大的負面影響，例如性 03 23-spec+claims (C) (replacement) -22- 1252405 能退化。此外，在本實施例中，REQ#訊號的狀態資訊在時 鐘1以及在其後的每第4個時鐘被傳輸。如果時鐘訊號週期 為30毫微秒（ns)，那麼REq#訊號狀態的延遲就是12〇毫微 秒。INTA#訊號以及SPKR#訊號狀態的延遲為24*3〇毫微 秒，亦即720毫微秒。 除此之外’一保留的週期可以用來輕易地擴充轉移至電 源開關的終端數，或者可以作為測試之用。通信先前技術 PC卡電源控制資訊的週期通常發送插槽vCc和插槽vpp請 求至電源開關，或者完全將電源開關除能。 圖7所示為基於本發明實施例中epsi—b訊號的Pc卡電源 開關通信協定。EPSI一B的通信協定係用於由PC卡電源開關 304向PC卡控制器300通訊資訊。圖7中所示的26個時鐘組成 了一個通信框，且根據本發明的一個實施例，pci時鐘源被 作為參考時鐘。在EPSI 一B框中，PC卡控制器300以及PC卡 電源開關304將EPSI一B置為一個高阻抗（例如，Hi_z)狀態。 EPSI一B框包括幾個由pC卡電源開關3〇4判定的週期，以 及一些由PC卡控制器300判定的週期。通信協定中的 EPSI-B元件是一個雙向資料協定，其中資料可以雙向傳 輸。PC卡電源開關304啟動框並且在框中的整個週期裏傳輸 CD1#、CD2#、VS1、VS2和GNT#的狀態資訊。PC卡控制器 300僅僅通信是否判定VS1*/或VS2訊號。VS1和/或VS2訊 號的判定在當感應已插入的PC卡之介面以及電源需求時執 行。EPSI-B協定中保留的通信週期為能輕易地擴充轉移至 電源開關的終端數提供了一個方法，或者可以作為測試之 03 23-spec+claims (C) (replacement) -23- 1252405 用。 EPSI-Β框中有幾個通信GNT#訊號狀態的週期。這樣做是 為了減少向開關傳輸此資訊時的延遲，因為過多的延 遲會產生重大的負面影響，例如性能退化。 被提供的反向週期係用以避免在設備間切換時判定 EPSI_B終端之匯流排爭用。對於雙向協定，包括含有一個 雙向確認相位的單向資料協定係為普遍，通常會在附有協 定訊號的設備處於一個高阻抗狀態的情況下，實現一個帶 • 有處於邏輯高電位協定訊號的上拉電阻。更進一步說，對 於最後的設備來說，驅動協定訊號使其在釋放到一個Hi_z 狀態前驅動其至一個邏輯高電位係為普遍。這種通用的方 法被用於我們的關於EPSI-B的優先協定中，如圖7所描述。 參考本發明的一個實施例，當沒有時鐘運行時，電源開 關可以非同步判定EPSI一B終端，以起始一個框（例如表示第 一個起始週期）。在先前技術中，電源開關通信協定沒有非 ，同步路徑。然而，添加此項特徵是為了滿足當一個使用者 在系統處於一個低電源狀態且P c〗時鐘停止工作時，插入一 PC卡的情況。一般而言，當此種情況發生，卡感應區塊々Μ 將非同步判疋一個訊號以起始PCI時鐘。如果終端被 轉移至電源開關，那麼電源開關必須執行一類似功能。在 協定中，由電源開關主張的EPSI—B非同步判定將促使pc卡 控制器經由傳統的方式來起始PCI時鐘。 如上所述，8個pc卡控制器訊號，例如訊號 307(CD1#、CD2#、VS1#、以及 VS2#)、SPKR#訊號的狀態 〇3 23-spec-fclaims(C) (replacement) - 24 - 1252405 資訊、INTA#以及REQ#訊號的狀態資訊以及GNT#的狀態， 皆被轉移至PC卡電源開關304。與傳統PC卡控制器相比， 基於本發明實施例中之PC卡控制器300的接腳數或終端可 以被減少。因此，PC卡控制器300可以被封裝於一低接腳數 的封裝内，這樣可以有利於封裝成本和/或面積。此外，基 於本發明的另一個實施例中的PC卡控制器可以在對接腳數 和/或封裝最小影響的情況下增強新的特徵且提供特殊功 能終端，因為一些終端是由一個PC卡控制器轉移至一個PC 卡電源開關。 除此之外，圖8所示為基於本發明的另一個實施例中EPSI 訊號的一 PC卡電源開關通信協定。EPSI的通信協定係用以 將資訊由PC卡電源開關304傳輸至PC卡控制器300。在此實 施例中，智慧卡讀取器邏輯和快閃媒體卡讀取器邏輯被作 為特殊功能邏輯而集成到PC卡控制器300中。如圖所示， EPSI 訊號協定包括 SC_RST、SCCDN、SCIO_IN、 SCIO_OEN、SCIO—OUT、SCPSB等與智慧卡10訊號有關的 訊號，以及MC3VN、MC_LED、MCWPN、MSCDN等與媒 體卡10訊號有關的訊號。因此，這些訊號的終端可以由PC 卡控制器300轉移至PC卡電源開關304。 圖9所示基於本發明的一個實施例的一個方法900，其用 以控制或操作一個連接或耦接至一電腦系統之PC卡。在方 法900的步驟910中，一個PC卡被連接或耦接至電腦系統。 電腦系統可以包括一個主匯流排，例如一個PCI匯流排和一 個PCI快速匯流排（Express Bus)，以與電腦系統的其他元件 03 23-spec+claims (C) (replacement) -25- 1252405 進行通信，例如CPU以及記憶體。電腦系統包括一個用於 接收該PC卡以及連接該PC卡至主匯流排的一個PC卡連接 器。 在步驟920中，一個PC卡電源開關係用以檢測PC卡的存 在。基於本發明的一個實施例，PC卡的存在係經由卡檢測 和電壓感應訊號，例如CD/VS訊號（CD1#、CD2#、VS1#以 及VS2#)被檢測出。一旦PC卡存在，例如被插入PC卡連接 器中，電源就將由PC卡電源開關提供至PC卡中。 籲 在步驟93 0中，一個通信介面和一個操作於其上的通信協 定係用於PC卡控制器和PC卡電源開關之間的通信。基於本 發明的一個實施例，三個控制訊號的狀態資訊（例如INTA# 的狀態資訊、REQ#的狀態資訊以及GNT#的狀態資訊）、 SPKR#的狀態資訊以及CD/VS訊號的狀態資訊係於PC卡控 制器和PC卡電源開關之間通信。 在步驟940中，PC卡被連接至電腦系統的主匯流排上。基 於本發明的一個實施例，主匯流排遵守PCI規範。PCI規範 • 中定義的訊號，包括INTA#的狀態資訊、REQ#的狀態資訊 以及GNT#的狀態資訊，係於PC卡電源開關和主匯流排之間 通信，其餘被定義於PCI規範中的訊號則於PC卡控制器和主 匯流排之間通信。換句話說，PC卡電源開關的訊號以及PC 卡控制器的訊號共同運作，以連接PC卡至電腦系統之主匯 流排而。 雖然上面的描述和附圖是作為本發明的一個較佳的實施 例，應當注意的是各種不同的補充、修改以及替換，在不 03 23-spec+claims (C) (replacement) -26- 1252405 脫離本發明原理的精神和範圍的情況下皆可被採用，如同 下述專利範圍請求項㈣義的。本領域的技術人員將會瞭 解在本發明使用中，許多外型、結構、排列、比例、材料、 几件以及70件和其他方面的修改皆可被使用，這點在不脫 離本發明原理的愔況下，Μ %丨、吞A 、 Θ况下特別適合於特殊環境和實施需 求。所以本文揭示的實施例是作為例證性而非限制性而被 面考慮❸纟發明的權利要求範圍是由附加權利要求以 及他們的法律等效物來說明的，並且不限於前文的描述。 【圖式簡單說明】 本發明其他的目的、優點以及新穎特徵，將會在下述結 合附圖的詳細說明中表現得更為明顯。 圖1所示為先前技術裏一個電腦系統中典型的p C卡子系 統的方塊圖。 圖2所不為先前技術裏另一個電腦系統中典型的卡子 系統的方塊圖。 圖3所示為基於本發明實施例的一個電腦系統中pc卡子 系統的方塊圖。 圖4所不為一在第三圖中所示的pc卡控制器的方塊圖。 圖5所不為一在第三圖中所示的pc卡電源開關的方塊圖。 圖6所示係根據本發明實施例用於epsi—a訊號的一 pc卡 電源開關的通信協定。 圖7所示係根據本發明實施例用於Epsi—B訊號的—pc卡 電源開關的通信協定。 03 23-spec+claims (C) (replacement) -27- 1252405 圖8所示係根據本發明實施例用於EPSI訊號的一 PC卡電 源開關的通信協定。 圖9所示係根據本發明的一實施例操作一 pc卡的一種方 法的流程圖。 【主要元件符號說明】 100 PC卡控制器 100a PC卡邏輯 100b特殊功能邏輯 101主匯流排 102電腦系統 103控制訊號（電性介面） 104 PC卡電源開關 105 PC卡連接器 106 PC 卡 107卡檢測和電壓感應（CD/VS)訊號 108輸入/輸出訊號 109電源 110傳統終端功能 111 電性介面 112 輸入 113輸出 114主匯流排控制器 115輸入/輸出訊號 150 PC卡子系統 03 23-spec+claims (C) (replacement) 28- 1252405 200 PC卡控制器 200b智慧卡讀取器邏輯 202電腦系統 214主匯流排控制器 2 21 訊遗 223仲裁訊號REQ# 224 訊遗 225中斷訊號 226_訊號 SPKR# 227輸入/輸出訊號 228仲裁訊號GNT# 250 PC卡子系統 300 PC卡控制器 300b智慧卡讀取器邏輯 302電腦系統 304 PC卡電源開關 305 PC卡連接器 306 PC 卡 3 07卡檢測和電壓感應（CD/VS)訊號 308輸入/輸出訊號 309 VCC/VPP電源輸出終端 311 電性介面 312輸入/電源終端 313輸出/狀態指示器 03 23-spec+claims (C) (replacement) -29- 1252405 314主匯流排控制器 321實際標準訊號 323仲裁訊號REQ# 323a REQ#輸出 324 PCI匯流排訊號 325中斷訊號INTA# 325a INTA#輸出 326 SPKR# 訊號 326a SPKR#輸出 3 27輸入/輸出訊號/特殊功能終端 328仲裁訊號GNT# 328a GNT#輸入 332通信（電性）介面 3 3 4 時鐘參考 350 PC卡子系統 380記憶體控制器 382中央處理單元 384記憶體 386顯示控制器 388加速圖形埠（AGP) 389顯示器 4 0 0電源開關控制區塊 401 PCI仲裁區塊 402卡感應區塊 03 23-spec+claims (C) (replacement) -30- 1252405 403 電源開關控制介面 404 電源開關控制介面 405 訊號 406 訊遗 407 訊遗 408 訊號 409 傳統PC卡訊號 413 內部連接 414 內部連接 415 內部連接 416 內部連接 500 通信區塊 501 輸入/輸出區塊 502 內部介面 503 內部介面 504 PC卡電源開關區塊 505 PC卡終端 900 方法 910 步驟 920 步驟 930 步驟 940 終端 03 23-spec+claims (C) (replacement) -311252405 IX. Description of the Invention: [Technical Field] The present invention relates to a PC card controller and a PC card power switch for connecting a PC card to a computer system, in particular, having a pin (pin) The number of PC card controllers to manufacture PC card controllers and PC card power switches with better cost-effectiveness. [Prior Art] PC cards (16-bit PCMCIA cards and 32-bit CardBus cards) are widely installed in computer systems, especially in notebook computers or laptop computers. PC Cards allow users to interface different functions, such as data and data storage, to a computer system using an interchangeable method. The PC Card standard publishes specifications for card appearance parameters, power requirements, and electrical interfaces to ensure interoperability between many computer system manufacturers. By complying with PC Card standards, a computer system manufacturer can enable these modular functions on their devices via the connectivity of the PC card. Many manufacturers today offer similar PCI-based products to bridge or connect a PCI bus in a computer system to a PC card controller. For example, by Texas Instruments Inc. (Texas Instrument Inc. The product name is PCI1410, the name of OZ6912 manufactured by 02Micro International Limited, and the name of EnE Technology Inc. in Taiwan. The goods of CB 1410 and Ricoh Co., which are named R5C475, include the most basic version. Even in the most basic version of the PC Card Controller, a large number of signals 03 23-spec+claims (C) (replacement) 1252405 are required to meet PCI and PC card specifications, as well as some other traditional signals to meet the general adoption. System level interface guidelines and de-facto standards. PC card controllers that provide these large amounts of signals are packaged in a de-facto standards 144-pin square flat (QFP) package, 144/145 ball grid array (BGA) package, and 128-pin In a square flat (QFP) package. It should be noted that increasing the signal will take up the area of the chip and increase the cost of the package. The wafer area is proportional to the cost of the wafer' in particular on a non-linear and continuous cost dimension curve. Regarding packaging, the curve of cost versus pin count is usually a level function because there is no industry standard package available for each pin count. For example, some industry standard package examples for QFP type packages are: 80-pin, 100-pin, 120-pin, 128-pin, and 144-pin. The size of the package and the number of pins are a large factor in the cost of the package. Further, reducing the number of pins of the PC card controller can also reduce the board area of the printed circuit board of the PC card controller. Traditional PC card controller terminals, even in the most basic version of the PC Card controller, still require a large number of signals to meet the specifications of PCI and PC cards, as well as some other traditional signals to meet the commonly adopted system level interface criteria and actual De-facto standards. PC card controllers on the market today follow the PCI specification v2. 3. The PCI specification includes a definition of more than 60 signals, including descriptions of communication protocols and input/output specifications. The PC Card Controller typically performs the following traditional PCI input and/or output terminals: 03 23-spec+claims (C) (replacement) 1252405 a) PCI Arbitration Signals: REQ# and GNT#; b) PCI Control Signals :FRAME#,IRDY#, TRDY#,STOP#, DEVSEL#, PERR#, SERR# ; c) PCI address/data signal: gossip 31:0; d) PCI command and byte start signal: C/ BE3:0# ; e) PCI configuration cycle selection: IDSEL; f) PCI interrupt: INTA#; and g) PCI clock: CLK. The PC card controller on the market today also complies with the PC card version 8. 0 standard. The PC Card standard includes a definition of over 60 signals, including a description of the protocol and input/output specifications. The 16-bit model of a PCMCIA card can be multiplexed with the definition of 32-bit CardBus. PC Card Controllers typically perform the following traditional PC Card input and/or output terminals: a) CardBus Arbitration Signals: CREQ# and CGNT#; b) CardBus Control Signals: CFRAME#, CIRDY#, CTRDY#, CSTOP#, CDEVSEL# c) CardBus address/information signal: CAD31:0; d) CardBus instruction and byte start signal: CC/BE3:0#; e) CardBus interrupt: CINT#; f) CardBus clock: CCLK; g) No PCMCIA 16-bit signals for multiplex use with CardBus signals: D2, D14, A18; and h) PC card detection and voltage sensing signals: CD1#, CD2#, VS1 and VS2. Some traditional PC Card Controller terminal functions are used to meet the commonly adopted 03 23-spec+claims (C) (replacement) 1252405 system level interface guidelines and de-facto standards. In the current practice, these legacy PC Card controller terminal functions are somewhat multiplexed on the same terminal' and can typically be configured for one or the other function to reduce the number of pins. These signals are listed below: a) PC card audio output, which controls an audio driver from a PC card source: named SPKR#; b) PC card activity indicator output, which typically controls an LED: named here SKT_LED ; _ c) PCI reset input: here named PRST#; d) PCI clock control, via "clock running protocol" terminal, de-facto standards: named CLKRUN#; e) Power Management Content Value Reset: Named here as GRST#; f) ACPI Power Management Event: Named PME# here; g) PCMCIA Ringing Signal Indicator, which enables the PCMCIA data function to wake up the system: here named RI_〇UT; h Serialized reserved IRQ protocol terminal: Named IRQSER here; ® i) Parallel power switch communication terminal: Named here VCCD0#, VCCD1#, VPPD0, and VPPD1; j) Series power switch communication terminal: Named CLOCK here , DATA and LATCH. Special Function Terminals In the current practice, many new functions have been integrated into the PC Card Controller; for example, IEEE1394 Link Layer (IEEE1394 Link) or Link + Physical Layer (Link+PHY) circuits, smart card reading , Flash Media Reader 03 23-spec+claims (C) (replacement) -10- 1252405 and Secure Digital Input/Output (SDIO) Reader. Others, such as the idea of controlling IrDA to integrate with a network controller to a PC card controller, have been formed. In the case of a good night, when a new function is integrated into the PC card controller, a new terminal is needed to implement the application of the new function. This article is called a special function terminal. Examples of special function terminals are as follows: a) smart card interface defined by IS07816; b) SD memory card interface defined by SDA (Secure Digital Association); c) smart media card interface defined by SSFDC Forum; FujiFilm) and the xD-Picture card interface defined by 〇lympus; e) a high-speed serial bus interface defined by the IEEE 1394 standard; and f) a physical layer/link layer defined by the IEEE 1394_2000 standard ( PHY/Link) interface. The addition of the special function terminal specifically increases the number of pins of the pc card controller. In the eight-wood example, the special function terminal is provided by a terminal function that is reserved and/or unused in a typical PC card controller. However, manufacturers of PC card controllers continue to remove reserved and unused terminal functions, so it becomes difficult to find a location for a particular Wei terminal without increasing the number of PC card controls (4) (4). The special function terminals described in this article are related to the integration of the functions of the card controller. For example, if a PC Card controller is enhanced to include a smart card read 03 23-spec+claims (C) (replacement) -11 · 1252405 fetch logic, then in addition to the traditional pc card controller terminal, any included in the PC card control New terminals related to the use of smart card logic will be classified as special function terminals. In this example, the terminal used for smart card detection is a special function terminal. Traditional PC Card Power Switch When a PC card is inserted into the PC Card connector, it is detected by the traditional PC Card Controller by card detection and voltage sensing signals (also known as CD/VS signals). The CD/VS signal indicates the voltage requirements of the electrical interface and the PC card. The PC Card Controller activates the appropriate electrical interface on the card and communicates with the PC Card Power Switch via the electrical control signal to indicate the voltage requirements of the card. The PC Card Power Switch will initiate/provide VCC and VPP power for the PC Card based on control information, which is described in the PC Card Standard. The control information is provided by the PC card controller according to the switch used by the system, and is supplied to the PC card power switch by a power switch communication protocol. Two de-facto standard power switch control interfaces and corresponding communication protocols are used today: a serial control interface using a serial communication protocol, and a parallel control interface using a parallel communication protocol. For example, a serial PC card power switch is available from Texas Instruments (Texas Instruments Inc.) The product name is TPS2206 and the trade name of OZ2206 is produced by British Microsystems International Limited (〇2Micro International Limited). The parallel PC card power switch can be manufactured from Texas Instruments Inc. under the trade name TPS2211 and the British company Catech 2Micro International Limited under the trade name OZ2211. 03 23 -spec+claims (C) (replacement) -12- 1252405. The data sheets for the TPS2206 and TPS2211 detail the serial and parallel control protocols. The traditional PC card power switch terminal includes: a) a power supply terminal, which inputs power from the system, and a reference ground; b) a slot source terminal whose output power is supplied to the VCC and VPP power supply of the PC card; c) the PC card Power control terminals (eg, parallel protocols, serial protocols, shutdown control signals); and d) optional PC card power state terminals. Examples of optional power state terminals are over current indicators, over temperature indicators' and voltage level indicators (e.g., VCC and/or VPP are within a predetermined voltage range). Description of the Prior Art Figure 1 is not a typical PC card subsystem 150 of a prior art computer system. The PC Card Subsystem 15A includes a pc card connector 105 for receiving a PC Card 1〇6, and a card controller 100 connected to the PC Card Connector 1〇5. The PC Card Controller 1 is also coupled to a main bus 1 1 and a main bus controller 114 1 to provide a connection between the system CPU and the other 70 of the computer system 102. The PC card controller 100 includes a PC card logic 10a, which communicates with the main bus 1()1 using a pc card communication protocol, and provides a connection to the % card (10), and a PC card electrical interface input/ The output signal is 1〇8. The card-controlled 100 also provides traditional terminal functions 11 to meet commonly used system-level interface standards and de-facto standards. 03 23-spec+claims (C) (replacement) • 13- I252405 The special function logic l〇〇b is usually integrated into a PC Card Controller 100 to provide more functionality, and in particular this special function logic provides input. / Output signal 11 5 is used to provide connectivity for control and data components associated with special integrated functions. When a PC card 106 is inserted into the PC card connector 1〇5, its connection is detected by the conventional PC card controller 100 by card detection and pen pressure sensing signal 1〇7 (also referred to as CD/VS signal). The CD/VS signal indicates the electrical interface 1U of the PC card 106, for example, the CardBus or 16-bit R2 electrical interface, and the voltage requirements of the pC card 1〇6. The PC Card Controller 100 activates the appropriate electrical interface on the card and outputs an electrical control signal 103 to the PC Card Power Switch 1〇4 to indicate the voltage demand of the Pc Card 106. The PC card power switch 104 converts the vcc and VPP power 109 of the PC card to the PC card 106' based on the control signal 103. The two power supplies have been described in the PC card standard. The power source that is converted to the slot is provided by input 112 to the PC card power switch 104. The PC Card Power Switch 1〇4 can provide one or more slot power status outputs 113 for indicating card power related information such as over current conditions, over temperature conditions, and voltage conditions, such as VCC and/or VPP being within a predetermined voltage range. Inside or outside. Figure 2 shows a typical ρ in another computer system 202 of the prior art. The concept of the card. The PC Card Subsystem 250 is similar to the PC Card Subsystem 150 shown in Figure 1, in which like reference numerals indicate like elements. The pC card controls the crying 200 to connect to a PCI main bus, and the PCI bus REQ#223 and GNT#228 arbitration signals, a pci bus interrupt signal 225, and other conventional pci bus signals 224 have been defined by the pci specification. And one? (::1 main 03 23-spec+claims (C) (replacement) -14- 1252405 = The row controller 214 is connected. In this less popular example, this is a special function integrated into the PC card controller. The logic system smart card reader logic H 'and the smart card input/output signal 2 2 7 provides the 4 working system §fl number related to the smart card. The controller 200 of the figure also provides the traditional terminal function, including an anti-card The audio output signal SPKR#226' and other signals 221 used to satisfy the general system level interface standard and the actual standard (de_faetQ), such as PCI clock control (: 1^汉1^# agreement. As described above, it is necessary to minimize the number of terminals! For the % card controller, the present invention provides a method and other advantages. [The present invention] It is an object of the present invention to provide The card controller with the minimum number of terminals. In order to achieve the above object, the present invention provides a PC for connecting a pc card to a computer system and including a pc card controller and a p. card power switch. Card system, system. pc card The PC card power switch is used to supply power to the Pc card and to provide at least one control signal for operating the PC card. [Embodiment] - Figure 3 shows a computer system based on an embodiment of the present invention. 2. In this embodiment, computer system 3G2 includes PC card subsystem 35G, memory control 380 is connected to main bus controller 314, memory 384 is connected to memory controller 380, and central processing unit 382 is connected to memory. The body controller 380. In this embodiment, the display controller is connected to the memory controller by an interface, such as 03 23-spec+claims (C) (replacement) -15- 1252405 accelerated graphics (AGP) 388. 380, thereby outputting a display signal to the display 389, such as an LCD (Liquid Crystal Display). In the present embodiment, the PC Card Subsystem 350 includes a PC Card Controller 300, a PC Card Connector 305, a Main Busbar Controller 314, and a PC Card. Power switch 304. PC Card Controller 300 communicates with PC Card Power Switch 304 via communication interface 332 and communication protocol. While not wishing to be limited by the examples, the following specific embodiments The description will be made with reference to a PCI bus as the main bus; however, the present invention is not limited thereto. In this example, the PC card subsystem 350 complies with the PCI specification ν2.3 and the PC card standard. 0 version. The PC Card Subsystem 350 includes a PC Card Connector 305 for receiving a PC Card 306. The PC Card Controller 300 is coupled to the PC Card Connector 305 and provides a PC Card electrical interface input/output signal 308 for the connection of the PC Card 306. In addition, PC Card Controller 300 is coupled to the PCI main bus and PCI main bus controller 314 to provide connections to components in the system CPU and other computer systems 302 using PC Card communication protocols. The PC card controller 300 has a PCI bus defined by the PCI specification in addition to the PCI bus REQ# arbitration signal 323, the PCI bus GNT# arbitration signal 328, and a PCI bus interrupt signal 325 (as shown in FIG. 4). The signal number 324 is communicated with the PCI main bus controller 314. In accordance with an embodiment of the present invention, the special function logic integrated into the PC Card Controller 300 of FIG. 3 is the smart card reader logic 300b, while the smart card input/output signal 327 provides data and control signals associated with the smart card. . The PC Card Controller 300 also provides legacy terminal functions, including system level interface criteria and de-facto standards for general adoption. 03 23-spec+claims (C) (replacement) -16- 1252405 No. 321, for example? (:: 1 clock control clKRUN# protocol. When a PC card 306 is inserted into the PC card connector 305, its connection is detected by the card detection and voltage sensing signal 307, that is, the CD/VS signal, and the PC card power switch The CD/VS signal indicates the electrical interface 311 of the PC card 306, such as the CardBus or 16-bit R2 electrical interface, and the voltage requirement of the PC card 306. The PC card power switch 304 is via the communication interface 332 and the communication protocol. Communicate with the PC card controller 3 to indicate the presence of the PC card 306 and other information. The PC card power switch 3〇4 converts the VCC and VPP power 309 of the PC card according to the card detection and the voltage sensing signal 3〇7. The two power supplies are described in the PC Card standard. The power converted to the slot is provided to the PC Card Power Switch 304 by input 3 12. The PC Card Power Switch 304 can provide one or more slot power status outputs 313, Used to indicate card power related information, such as overcurrent conditions, overflow conditions, and voltage conditions (eg, VCC and/or VPP are within or outside a predetermined voltage range). The communication protocol operating on communication interface 332 includes information about Pc Card insertion / pullout And the status information of the CD/VS signal 307 for which the card is recognized. The PC card power switch 304 receives the CD/VS signal 307' from the pc card connector 305 while passing the CD/VS through the communication protocol operating on the communication interface 332. The status information of the signal is sent to the pc card controller 3. In an embodiment of the invention, the communication protocol operating in the communication interface 332 includes status information about the PC card audio SPKR# signal (shown in Figure 6). SPKR# The status information of the signal is transmitted to the PC card power switch 3〇4 by the PC card controller 300 through the communication interface 332. The PC card power switch 304 includes a 03 23-spec+claims (C) (replacement) -17- 1252405 SPKR #output 326a, the signal is determined based on the transmitted status information. In one embodiment, the communication protocol is a frame-based protocol, and a box of the communication protocol includes several cycles. Thus, the communication protocol operating on communication interface 332 provides low latency communication of SPKR# status information such that the structural inherent delay is negligible. The communication protocol will be further developed below. Description (see Figure 6). In Figure 3, 'in order to communicate with a pci bus, the communication protocol operating on communication interface 332 also includes the INTA# signal (shown in Figure 6) and the req# signal (Figure 6 The status information of the INTA# and req# signals is transmitted from the PC card controller 300 to the Pc card power switch 304 via the communication interface 332. The PC card power switch 304 includes an INTA# output 325a and a REQ# output 323a, which are determined based on the transmitted status information. The communication protocol operating on communication interface 332 provides low latency communication of inta_〇req# status information. In Figure 3, the communication protocol operating on interface 332 includes status information for the GNT# signal (shown in Figure 7) for the pci bus. The pc card power switch 304 includes a GNT# input 328a that is coupled to the ρα main bus control 314' and transmits status information about the signal to the PC card controller 3 via the communication protocol and interface 332. The pc card controller 3 uses these status information as if it were acquired by a dedicated GNT# terminal. In order to sample the new input and output, the pc card power switch shown in Figure 3 includes a new clock reference 334, and the ρα clock is the preferred clock, since 〇3 23. Spec+claims(C) (replacement) ·18_ 1252405 is synchronized with the terminal of the PC Card Controller 300. If the present invention is used to transmit high speed special function terminals or those having low delay requirements for power switches, then a higher speed clock will be employed, such as a 3 毫 nanosecond (ns) clock. If the delay requirements are not critical, consider using a lower speed clock to save power. Fig. 4 is a block diagram showing a PC card controller 300 based on an embodiment of the present invention. GNT #328, REQ #323, INTA #325, SPKRJ 326, and CD/VS signal 307 are transferred to or provided by the PC Card Power Switch 304. It will be apparent to those skilled in the art that other terminals, such as special function terminal 327, can be transferred to pc card power switch 304. In addition to this, the 'P C Card Control 300' can provide an optional legacy mode in which the terminal or terminal map of the PC Card Controller 300 is compared to the conventional Pc card control. When the enhanced mode is disabled or the legacy mode is enabled, the terminal provides the legacy PC card signal 409, including GNT#328, REQ#323, INTA#325, SPKR#326, and CD/VS signal 307. In such a conventional mode, a prior art type or a conventional type of PC card power switch electrical interface 103 and communication protocol can be used, such as a conventional parallel power switch control interface 403 or a conventional serial power switch control interface 404. Both the serial power switch control interface 404 and the parallel power switch control interface 403 are provided & are multiplexed on the same terminal. When the enhanced mode is activated, those terminals for the conventional PC card signal 409 are provided to other signals and functions, and the terminals of the PC card power switch 304 are provided to those signals and functions. In other words, when the enhanced mode is activated, those terminals provided for the traditional PC card signal 409 will be transferred to the pc card power supply. 03 23-spec+claims (C) (replacement) -19- 1252405 Switch 304 ° The power switch electrical interface 332 operates in conjunction, and the electrical interface can be used in the same terminal as the power switch electrical interface 103. The protocol described herein works in conjunction with two signals: epsi_a signal 405 and EPSI-B signal 406. The agreement provides status information for all signals transferred to the Pc card power switch 304. Figure 4 depicts several sources of interrupt signals 4〇7 that are coupled to card power switch 304 and PC card controller 300 and can cause the INTA# signal 325 to be asserted. Status information for this INTA# signal is provided to the power switch control block 4 via an internal connection 413. Similarly, several sources of the audio signal 4〇8 are connected to the PC card power switch 3〇4 and the PC card controller 3〇〇, and can cause the determination of the SPKR# signal 326. Status information for this SPKR# signal is provided to the power switch control block 4 via an internal connection 414. The status information provided by internal connections 413 and 414 communicates with the power switch using protocol and electrical interface 332. The PCI arbitration block 401 requests data access to the primary (e.g., PCI) bus', typically causing a determination of the REQ# signal 3 23. In the PC Card Controller 300, this request will be provided to the power switch control block 400' via an internal connection 416 and the status of the PCI bus data access request via the communication protocol and the "ίτ=τ " PC card power switch 304 communication. Traditionally, the primary PCI bus controller 314 will permit access to the data of the PCI bus via the decision GNT# signal 328, which is traditionally a terminal in the PC card controller. In the PC Card Controller 300 in accordance with an embodiment of the present invention, this bus bar is permitted to be provided by the power switch control block 400 to the PCI arbitration block 401 via an internal connection 416. Pci bus 03 23-spec+claims (C) (replacement) -20- 1252405 The state of the lean access grant is communicated by the pc card power switch 304 using the communication protocol and communication interface 332. CD/VS signal 3 07 includes four signals: CD1#, CD2#, VS1* VS2. Card sensing block 402 uses these signals to determine card presence, interface requirements, and voltage requirements. In general, a conventional PC card controller determines VS1 and/or VS2 during the sensing process. Therefore, the VS1 and / or VS2 signals are considered input/output, and CD 1 and CD2 are usually only taken as inputs. According to the present invention, status information of the signal causing the VS1 and/or VS2 decision is provided to the power switch control block 4 via an internal connection 41 5 while the status information uses the communication protocol and communication interface 332 and the PC card power switch. 304 communication. The CD/VS input state is provided by the power switch control block 400 to the card sensing block 4〇2 via an internal connection 415. The sample value of the CD/VS input 3〇7 communicates with the PC card power switch 304 using the protocol and communication interface 332. In another embodiment, a complete card sensing state device is implemented in the power switch 304, and a signal to the pc card controller 3 provides all the required information, such as card presence, interface requirements. And voltage requirements. FIG. 5 does not describe a block diagram of a PC card power switch PC card 304 in accordance with an embodiment of the present invention. The PC card power switch 304 includes several PC card terminals 5〇5. The PC card terminal 5〇5 for output is determined by the internal interface 5〇2 between the communication block 500 and the input/output block 501. The internal interface 5〇2 controls the output based on the tragic information of each output provided by the communication protocol operating on the electrical interface 332. The PC card terminal 505 for input is sampled by the input/output block 501. The sampling information is provided to the communication block 500 via an internal interface 502, 03 23-spec+claims (C) (replacement) -21 - 1252405, and the status information is transmitted to the PC card control via a communication protocol operating on the electrical interface 332. 3 〇〇. The PC card power switch 3〇4 in accordance with an embodiment of the present invention implements a pci clock input 334 as a reference clock for sampling input and timing output. The PC card power switch 304 includes a number of terminals, such as a power terminal 3丨2, a vcc/vpp power output terminal 309, and a status indicator 313. The protocol includes traditional information used to control the power state of the PC card, and this information is provided via an internal interface 503 to the PC Card power switch block 5〇4. FIG. 6 is a diagram showing the PC card power switch of the Epsi-a signal in the embodiment of the present invention. The communication protocol is used for information communication between the PC Card Controller 300 and the pC Card Power Switch 304. The 24 clocks shown in Fig. 6 constitute a communication box, and according to an embodiment of the present invention, 1> (:: 1 clock source is used as a reference clock. In the EPSI-A box, the PC card controller 3〇 〇 Determine that the Epsi-A terminal is at a low potential. The 24 clocks in all EPSI-A frames are output cycles during which the pC card controller 300 determines the Epsi-A terminal with a value consistent with the protocol information given in Figure 6. The absence of an acknowledgement phase in this Agreement means that the power switch cannot acknowledge receipt of the information communicated by each frame. The EPSI-A component of the present invention is a one-way data protocol, wherein Data is transmitted in only one direction. A one-way data protocol can include an acknowledgement phase because the acknowledgement itself is not considered to be the data itself. There are several cycles in the EPSI_A box that communicate with the REQ# signal state (8 cycles are listed in the figure) This is done to reduce the delay in transmitting this information to the switch, as excessive REQ# delay can have a significant negative impact, such as the property 03 23-spec+claims (C) (replacement) -22- 1252405 can degrade. this In this embodiment, the status information of the REQ# signal is transmitted on the clock 1 and every fourth clock thereafter. If the clock signal period is 30 nanoseconds (ns), then the delay of the REq# signal state is 12〇 nanoseconds. The delay of the INTA# signal and the SPKR# signal state is 24*3〇 nanoseconds, or 720 nanoseconds. In addition, a reserved period can be used to easily expand the transfer to the power supply. The number of terminals in the switch, or can be used for testing. The cycle of communicating the previous technology of the PC card power control information usually sends the slot vCc and slot vpp request to the power switch, or completely disables the power switch. Figure 7 is based on The Pc card power switch communication protocol of the epsi-b signal in the embodiment of the present invention. The EPSI-B communication protocol is used for communication information from the PC card power switch 304 to the PC card controller 300. The 26 clocks shown in FIG. A communication box is formed, and according to an embodiment of the present invention, the pci clock source is used as a reference clock. In the EPSI-B frame, the PC card controller 300 and the PC card power switch 304 set the EPSI-B to a high impedance. (for example, Hi_z The EPSI-B frame includes several cycles determined by the pC card power switch 3〇4, and some cycles determined by the PC card controller 300. The EPSI-B component in the communication protocol is a two-way data protocol in which data It can be transmitted in both directions. The PC Card Power Switch 304 activates the box and transmits status information of CD1#, CD2#, VS1, VS2, and GNT# throughout the entire period of the frame. The PC Card Controller 300 only communicates whether to determine VS1*/ or VS2. Signal. The determination of the VS1 and/or VS2 signals is performed when sensing the interface of the inserted PC card and the power requirements. The communication cycle reserved in the EPSI-B protocol provides a way to easily expand the number of terminals transferred to the power switch, or it can be used as a test 03 23-spec+claims (C) (replacement) -23- 1252405. There are several cycles in the EPSI-frame that communicate the status of the GNT# signal. This is done to reduce the delay in transmitting this information to the switch, as excessive delay can have significant negative effects, such as performance degradation. The reverse period provided is used to avoid the bus contention of the EPSI_B terminal when switching between devices. For two-way agreements, including one-way data protocols with a two-way acknowledgement phase is common, usually with a signal with a protocol signal in a high-impedance state, a band with a logic high-potential agreement signal Pull resistance. Furthermore, for the last device, it is common to drive the protocol signal to drive it to a logic high before releasing it to a Hi_z state. This versatile method is used in our prior agreement on EPSI-B, as depicted in Figure 7. Referring to one embodiment of the present invention, when no clock is running, the power switch can asynchronously determine the EPSI-B terminal to initiate a block (e.g., to indicate the first start period). In the prior art, the power switch communication protocol has no, synchronous paths. However, this feature is added to satisfy the situation when a user inserts a PC card while the system is in a low power state and the clock is stopped. In general, when this happens, the card sensing block 疋 will asynchronously determine a signal to start the PCI clock. If the terminal is transferred to the power switch, the power switch must perform a similar function. In the agreement, the EPSI-B asynchronous decision asserted by the power switch will cause the pc card controller to initiate the PCI clock via conventional means. As mentioned above, 8 pc card controller signals, such as signal 307 (CD1#, CD2#, VS1#, and VS2#), SPKR# signal status 〇 3 23-spec-fclaims(C) (replacement) - 24 - 1252405 The status information of the information, INTA# and REQ# signals and the status of GNT# are transferred to the PC card power switch 304. The number of pins or terminals of the PC card controller 300 based on the embodiment of the present invention can be reduced as compared with the conventional PC card controller. Thus, the PC Card Controller 300 can be packaged in a low pin count package, which can facilitate package cost and/or area. In addition, the PC card controller in another embodiment of the present invention can enhance new features and provide special function terminals with minimal impact on the number of pins and/or packages, since some terminals are controlled by a PC card. Transfer to a PC Card power switch. In addition, FIG. 8 shows a PC card power switch communication protocol for an EPSI signal in accordance with another embodiment of the present invention. The EPSI communication protocol is used to transfer information from the PC Card power switch 304 to the PC Card Controller 300. In this embodiment, smart card reader logic and flash media card reader logic are integrated into PC card controller 300 as special function logic. As shown in the figure, the EPSI signal protocol includes signals related to the smart card 10 signal such as SC_RST, SCCDN, SCIO_IN, SCIO_OEN, SCIO_OUT, SCPSB, and signals related to the media card 10 signals such as MC3VN, MC_LED, MCWPN, and MSCDN. Therefore, the terminals of these signals can be transferred from the PC card controller 300 to the PC card power switch 304. Figure 9 illustrates a method 900 for controlling or operating a PC card connected or coupled to a computer system, in accordance with one embodiment of the present invention. In step 910 of method 900, a PC card is connected or coupled to the computer system. The computer system can include a main bus, such as a PCI bus and a PCI Express Bus to communicate with other components of the computer system 03 23-spec+claims (C) (replacement) -25- 1252405 , such as CPU and memory. The computer system includes a PC card connector for receiving the PC card and connecting the PC card to the main bus. In step 920, a PC card power-on relationship is used to detect the presence of the PC card. In accordance with an embodiment of the present invention, the presence of the PC card is detected via card detection and voltage sensing signals, such as CD/VS signals (CD1#, CD2#, VS1#, and VS2#). Once the PC card is present, for example, inserted into the PC Card connector, the power will be supplied to the PC Card by the PC Card Power Switch. In step 930, a communication interface and a communication protocol operating thereon are used for communication between the PC Card controller and the PC Card power switch. According to an embodiment of the present invention, status information of three control signals (for example, status information of INTA#, status information of REQ#, and status information of GNT#), status information of SPKR#, and status information of CD/VS signals Communicate between the PC Card controller and the PC Card power switch. In step 940, the PC card is connected to the main bus of the computer system. In accordance with an embodiment of the present invention, the main bus is compliant with the PCI specification. The signals defined in the PCI specification include the status information of INTA#, the status information of REQ#, and the status information of GNT#, which are communicated between the PC card power switch and the main bus, and the rest are defined in the PCI specification. Then communicate between the PC card controller and the main bus. In other words, the signal of the PC card power switch and the signal of the PC card controller work together to connect the PC card to the main bus of the computer system. Although the above description and drawings are a preferred embodiment of the present invention, it should be noted that various additions, modifications, and substitutions are made to 03 23-spec+claims (C) (replacement) -26- 1252405 It can be used without departing from the spirit and scope of the principles of the invention, as claimed in the appended claims. Those skilled in the art will appreciate that many variations, configurations, arrangements, ratios, materials, several pieces, and 70 and other modifications can be used in the practice of the present invention without departing from the principles of the invention. Under the circumstance, Μ %丨, swallow A, and under the circumstances are especially suitable for special environment and implementation needs. The present invention is to be considered as illustrative and not restrictive, and the scope of the claims of the invention is defined by the appended claims and their legal equivalents. BRIEF DESCRIPTION OF THE DRAWINGS Other objects, advantages and novel features of the invention will become more apparent from the description of the appended claims. Figure 1 is a block diagram of a typical p C card subsystem in a prior art computer system. Figure 2 is a block diagram of a typical clip system in another computer system of the prior art. Fig. 3 is a block diagram showing a pc card subsystem in a computer system based on an embodiment of the present invention. Figure 4 is a block diagram of a pc card controller shown in the third figure. Figure 5 is a block diagram of a pc card power switch shown in the third figure. Figure 6 shows a communication protocol for a pc card power switch for an epsi-a signal in accordance with an embodiment of the present invention. Figure 7 is a communication protocol for a -pc card power switch for an Epsi-B signal in accordance with an embodiment of the present invention. 03 23-spec+claims (C) (replacement) -27- 1252405 Figure 8 shows a communication protocol for a PC card power switch for an EPSI signal in accordance with an embodiment of the present invention. Figure 9 is a flow diagram of a method of operating a pc card in accordance with an embodiment of the present invention. [Main component symbol description] 100 PC card controller 100a PC card logic 100b special function logic 101 main bus 102 computer system 103 control signal (electrical interface) 104 PC card power switch 105 PC card connector 106 PC card 107 card detection And voltage sensing (CD/VS) signal 108 input/output signal 109 power supply 110 traditional terminal function 111 electrical interface 112 input 113 output 114 main bus controller 115 input/output signal 150 PC card subsystem 03 23-spec+claims ( C) (replacement) 28- 1252405 200 PC Card Controller 200b Smart Card Reader Logic 202 Computer System 214 Main Busbar Controller 2 21 Newsletter 223 Arbitration Signal REQ# 224 Newsletter 225 Interrupt Signal 226_Sign SPKR# 227 Input/output signal 228 Arbitration signal GNT# 250 PC Card Subsystem 300 PC Card Controller 300b Smart Card Reader Logic 302 Computer System 304 PC Card Power Switch 305 PC Card Connector 306 PC Card 3 07 Card Detection and Voltage Sensing (CD /VS) Signal 308 Input/Output Signal 309 VCC/VPP Power Output Terminal 311 Electrical Interface 312 Input/Power Terminal 313 Output/Status Indicator 03 23-spec+claims (C) (replacement) -29- 1252405 314 main bus controller 321 actual standard signal 323 arbitration signal REQ# 323a REQ# output 324 PCI bus signal 325 interrupt signal INTA# 325a INTA# output 326 SPKR# signal 326a SPKR# output 3 27 input / output Signal/Special Function Terminal 328 Arbitration Signal GNT# 328a GNT# Input 332 Communication (Electrical) Interface 3 3 4 Clock Reference 350 PC Card Subsystem 380 Memory Controller 382 Central Processing Unit 384 Memory 386 Display Controller 388 Acceleration Graph 埠(AGP) 389 Display 4 0 0 Power Switch Control Block 401 PCI Arbitration Block 402 Card Sensing Block 03 23-spec+claims (C) (replacement) -30- 1252405 403 Power Switch Control Interface 404 Power Switch Control Interface 405 Signal 406 Message 407 Message 408 Signal 409 Traditional PC Card Signal 413 Internal Connection 414 Internal Connection 415 Internal Connection 416 Internal Connection 500 Communication Block 501 Input/Output Block 502 Internal Interface 503 Internal Interface 504 PC Card Power Switch Block 505 PC Card Terminal 900 Method 910 Step 920 Step 930 Step 940 Terminal 03 23-spec+claims (C) (replacement) -31