TW280019B - - Google Patents

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Publication number
TW280019B
TW280019B TW084111039A TW84111039A TW280019B TW 280019 B TW280019 B TW 280019B TW 084111039 A TW084111039 A TW 084111039A TW 84111039 A TW84111039 A TW 84111039A TW 280019 B TW280019 B TW 280019B
Authority
TW
Taiwan
Application number
TW084111039A
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23371679&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=TW280019(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW280019B publication Critical patent/TW280019B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • H01L21/481—Insulating layers on insulating parts, with or without metallisation
    • H—ELECTRICITY
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
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    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49204—Contact or terminal manufacturing
    • Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
    • Y10T29/49222—Contact or terminal manufacturing by assembling plural parts forming array of contacts or terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Combinations Of Printed Boards (AREA)
  • Wire Bonding (AREA)
TW084111039A 1994-12-05 1995-10-19 TW280019B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/349,281 US6465743B1 (en) 1994-12-05 1994-12-05 Multi-strand substrate for ball-grid array assemblies and method

Publications (1)

Publication Number Publication Date
TW280019B true TW280019B (zh) 1996-07-01

Family

ID=23371679

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084111039A TW280019B (zh) 1994-12-05 1995-10-19

Country Status (6)

Country Link
US (5) US6465743B1 (zh)
JP (1) JP3493088B2 (zh)
KR (1) KR100400949B1 (zh)
CN (1) CN1155080C (zh)
MY (1) MY119990A (zh)
TW (1) TW280019B (zh)

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6465743B1 (en) * 1994-12-05 2002-10-15 Motorola, Inc. Multi-strand substrate for ball-grid array assemblies and method
US5776798A (en) * 1996-09-04 1998-07-07 Motorola, Inc. Semiconductor package and method thereof
JP4311774B2 (ja) * 1998-03-11 2009-08-12 富士通株式会社 電子部品パッケージおよびプリント配線板
US6501157B1 (en) * 1998-04-15 2002-12-31 Micron Technology, Inc. Substrate for accepting wire bonded or flip-chip components
KR100365054B1 (ko) * 1999-09-07 2002-12-16 앰코 테크놀로지 코리아 주식회사 반도체패키지용 섭스트레이트 및 이를 이용한 반도체패키지의 제조방법
DE10010979A1 (de) * 2000-03-07 2001-09-13 Bosch Gmbh Robert Elektrische Schaltung und Substrat hierzu
KR100456817B1 (ko) * 2000-06-13 2004-11-11 앰코 테크놀로지 코리아 주식회사 반도체 패키지 제조용 부재와 이것을 이용한 반도체패키지 제조방법
US6931298B1 (en) 2001-02-27 2005-08-16 Cypress Semiconductor Corporation Integrated back-end integrated circuit manufacturing assembly
US6901984B1 (en) 2001-02-27 2005-06-07 Cypress Semiconductor Corporation Method and system for controlling the processing of an integrated circuit chip assembly line using a central computer system and a common communication protocol
JP4626919B2 (ja) * 2001-03-27 2011-02-09 ルネサスエレクトロニクス株式会社 半導体装置
US20020170897A1 (en) * 2001-05-21 2002-11-21 Hall Frank L. Methods for preparing ball grid array substrates via use of a laser
US7276802B2 (en) * 2002-04-15 2007-10-02 Micron Technology, Inc. Semiconductor integrated circuit package having electrically disconnected solder balls for mounting
JP4283514B2 (ja) 2002-09-24 2009-06-24 株式会社日立製作所 電子回路装置
TW575931B (en) * 2002-10-07 2004-02-11 Advanced Semiconductor Eng Bridge connection type of chip package and process thereof
JP4079874B2 (ja) * 2003-12-25 2008-04-23 沖電気工業株式会社 半導体装置の製造方法
DE102004015091B4 (de) * 2004-03-25 2006-05-04 Infineon Technologies Ag Flächenhafter Verdrahtungsträger
US7105377B1 (en) * 2004-04-13 2006-09-12 Cypress Semiconductor Corporation Method and system for universal packaging in conjunction with a back-end integrated circuit manufacturing process
EP1778759B1 (en) * 2004-07-07 2008-11-12 Promerus, LLC Photosensitive dielectric resin compositions and their uses
US7223923B2 (en) * 2004-10-26 2007-05-29 Hannstar Display Corporation PCB capable of releasing thermal stress
TWI256694B (en) * 2004-11-19 2006-06-11 Ind Tech Res Inst Structure with embedded active components and manufacturing method thereof
US20090008792A1 (en) * 2004-11-19 2009-01-08 Industrial Technology Research Institute Three-dimensional chip-stack package and active component on a substrate
US7148560B2 (en) * 2005-01-25 2006-12-12 Taiwan Semiconductor Manufacturing Co., Ltd. IC chip package structure and underfill process
US7656172B2 (en) 2005-01-31 2010-02-02 Cascade Microtech, Inc. System for testing semiconductors
JP2006278610A (ja) * 2005-03-29 2006-10-12 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US7521781B2 (en) * 2005-04-25 2009-04-21 Stats Chippac Ltd. Integrated circuit package system with mold clamp line critical area having widened conductive traces
KR100695065B1 (ko) 2006-03-27 2007-03-14 삼성전기주식회사 기판의 표면 평탄도 측정용 쿠폰 및 이를 이용한 기판의표면 평탄도 측정방법
US20070253179A1 (en) * 2006-04-27 2007-11-01 Briggs Randall D Method and apparatus for removing surface mount device from printed circuit board
KR100728989B1 (ko) 2006-06-30 2007-06-15 주식회사 하이닉스반도체 Ｆｂｇａ 패키지 제조용 기판
RU2009117638A (ru) * 2006-10-10 2010-11-20 ТиАйАр ТЕКНОЛОДЖИ ЭлПи (CA) Монтажная плата с местной гибкостью
JP5194471B2 (ja) * 2007-02-06 2013-05-08 パナソニック株式会社 半導体装置
JP4569683B2 (ja) 2007-10-16 2010-10-27 東芝ライテック株式会社 発光素子ランプ及び照明器具
JP2010010428A (ja) * 2008-06-27 2010-01-14 Fujitsu Ltd プリント基板及び電子機器
JP5223571B2 (ja) * 2008-09-30 2013-06-26 富士通株式会社 半導体装置、基板設計方法、基板設計装置
JP2010141295A (ja) * 2008-10-20 2010-06-24 United Test & Assembly Center Ltd 基板上シュリンクパッケージ
JP5333758B2 (ja) 2009-02-27 2013-11-06 東芝ライテック株式会社 照明装置および照明器具
US8159830B2 (en) * 2009-04-17 2012-04-17 Atmel Corporation Surface mounting chip carrier module
JP5354191B2 (ja) * 2009-06-30 2013-11-27 東芝ライテック株式会社 電球形ランプおよび照明器具
JP5348410B2 (ja) 2009-06-30 2013-11-20 東芝ライテック株式会社 口金付ランプおよび照明器具
JP2011049527A (ja) 2009-07-29 2011-03-10 Toshiba Lighting & Technology Corp Ｌｅｄ照明装置
JP2011071242A (ja) * 2009-09-24 2011-04-07 Toshiba Lighting & Technology Corp 発光装置及び照明装置
CN102032479B (zh) * 2009-09-25 2014-05-07 东芝照明技术株式会社 灯泡型灯以及照明器具
CN102032480B (zh) 2009-09-25 2013-07-31 东芝照明技术株式会社 灯泡型灯以及照明器具
CN102032481B (zh) 2009-09-25 2014-01-08 东芝照明技术株式会社 附带灯口的照明灯及照明器具
JP2011091033A (ja) 2009-09-25 2011-05-06 Toshiba Lighting & Technology Corp 発光モジュール、電球形ランプおよび照明器具
JP5257622B2 (ja) 2010-02-26 2013-08-07 東芝ライテック株式会社 電球形ランプおよび照明器具
CN102881804B (zh) * 2011-07-15 2015-06-10 光宝电子(广州)有限公司 基板结构、半导体装置阵列及其半导体装置
US8884427B2 (en) * 2013-03-14 2014-11-11 Invensas Corporation Low CTE interposer without TSV structure
US9099363B1 (en) 2014-02-12 2015-08-04 Freescale Semiconductor, Inc. Substrate with corner cut-outs and semiconductor device assembled therewith
US20190259731A1 (en) * 2016-11-09 2019-08-22 Unisem (M) Berhad Substrate based fan-out wafer level packaging
US20180130768A1 (en) * 2016-11-09 2018-05-10 Unisem (M) Berhad Substrate Based Fan-Out Wafer Level Packaging
US10181447B2 (en) 2017-04-21 2019-01-15 Invensas Corporation 3D-interconnect
US10880995B2 (en) * 2017-12-15 2020-12-29 2449049 Ontario Inc. Printed circuit board with stress relief zones for component and solder joint protection
CN111465312A (zh) * 2020-04-14 2020-07-28 杭州洛微科技有限公司 基于周期性阵列排布的光电产品封装生产方法
US20220254763A1 (en) * 2021-02-09 2022-08-11 Innolux Corporation Electronic device
US20230126272A1 (en) * 2021-10-25 2023-04-27 Nanya Technology Corporation Semiconductor device with interface structure

Family Cites Families (102)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US500689A (en) * 1893-07-04 Lifting-jack
US3444441A (en) 1965-06-18 1969-05-13 Motorola Inc Semiconductor devices including lead and plastic housing structure suitable for automated process construction
US3413713A (en) 1965-06-18 1968-12-03 Motorola Inc Plastic encapsulated transistor and method of making same
US3606673A (en) 1968-08-15 1971-09-21 Texas Instruments Inc Plastic encapsulated semiconductor devices
JPS5218069B2 (zh) * 1972-08-09 1977-05-19
FR2524707B1 (fr) 1982-04-01 1985-05-31 Cit Alcatel Procede d'encapsulation de composants semi-conducteurs, et composants encapsules obtenus
US4508758A (en) * 1982-12-27 1985-04-02 At&T Technologies, Inc. Encapsulated electronic circuit
US4808990A (en) * 1983-11-11 1989-02-28 Sharp Kabushiki Kaisha Liquid crystal display assembly
US4518631A (en) * 1983-11-14 1985-05-21 Dow Corning Corporation Thixotropic curable coating compositions
JPS60116191A (ja) 1983-11-29 1985-06-22 イビデン株式会社 電子部品搭載用基板の製造方法
US4595647A (en) * 1985-02-01 1986-06-17 Motorola, Inc. Method for encapsulating and marking electronic devices
US4654290A (en) * 1985-02-01 1987-03-31 Motorola, Inc. Laser markable molding compound, method of use and device therefrom
JPS61222151A (ja) * 1985-03-27 1986-10-02 Ibiden Co Ltd 半導体搭載用プリント配線板の製造方法
DE3606283A1 (de) * 1985-07-31 1987-02-12 Mtu Muenchen Gmbh Buerstendichtung
US4703984A (en) 1985-10-28 1987-11-03 Burroughs Corporation Flexible access connector with miniature slotted pads
US4674811A (en) 1986-07-10 1987-06-23 Honeywell Inc. Apparatus for connecting pin grid array devices to printed wiring boards
EP0261324A1 (en) 1986-09-26 1988-03-30 Texas Instruments Incorporated Plastic package for large chip size integrated circuit
JPS63148670A (ja) 1986-12-12 1988-06-21 Texas Instr Japan Ltd リ−ドフレ−ム材
JPS63169752A (ja) * 1986-12-31 1988-07-13 テキサス　インスツルメンツ　インコーポレイテッド 多段ｉｃパッケージを製造するためのマトリクスリードフレーム
US4821007A (en) * 1987-02-06 1989-04-11 Tektronix, Inc. Strip line circuit component and method of manufacture
KR960006710B1 (ko) * 1987-02-25 1996-05-22 가부시기가이샤 히다찌세이사꾸쇼 면실장형 반도체집적회로장치 및 그 제조방법과 그 실장방법
US4734820A (en) 1987-04-16 1988-03-29 Ncr Corporation Cryogenic packaging scheme
JPH0834264B2 (ja) 1987-04-21 1996-03-29 住友電気工業株式会社 半導体装置およびその製造方法
GB2209867B (en) 1987-09-16 1990-12-19 Advanced Semiconductor Package Method of forming an integrated circuit chip carrier
US4871317A (en) * 1987-12-02 1989-10-03 A. O. Smith Corporation Surface mounted component adaptor for interconnecting of surface mounted circuit components
US4890383A (en) 1988-01-15 1990-01-02 Simens Corporate Research & Support, Inc. Method for producing displays and modular components
JPH0247855A (ja) 1988-08-10 1990-02-16 Nec Corp 半導体装置
JPH0710496Y2 (ja) 1989-01-30 1995-03-08 日本航空電子工業株式会社 Ｉｃパッケージ用コネクタ
US4930216A (en) * 1989-03-10 1990-06-05 Microelectronics And Computer Technology Corporation Process for preparing integrated circuit dies for mounting
US4999700A (en) 1989-04-20 1991-03-12 Honeywell Inc. Package to board variable pitch tab
JPH02301155A (ja) 1989-05-16 1990-12-13 Citizen Watch Co Ltd Ｉｃモジュールの固定方法
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
US4961821A (en) 1989-11-22 1990-10-09 Xerox Corporation Ode through holes and butt edges without edge dicing
US5006673A (en) 1989-12-07 1991-04-09 Motorola, Inc. Fabrication of pad array carriers from a universal interconnect structure
US5071375A (en) 1990-01-22 1991-12-10 Savage John Jun Electrical contact and multiple contact assembly
US4994936A (en) 1990-02-12 1991-02-19 Rogers Corporation Molded integrated circuit package incorporating decoupling capacitor
US5061657A (en) 1990-07-18 1991-10-29 The United States Of America As Represented By The Secretary Of The Navy Method of making integrated circuit to package electrical connections after encapsulation with an organic polymer
US5148266A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies having interposer and flexible lead
US5679977A (en) * 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5148265A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
JP2967215B2 (ja) 1990-10-12 1999-10-25 株式会社村田製作所 チップ型電子部品の製造方法
US5136366A (en) 1990-11-05 1992-08-04 Motorola, Inc. Overmolded semiconductor package with anchoring means
JPH04196253A (ja) 1990-11-28 1992-07-16 Mitsubishi Electric Corp 半導体装置用パッケージ
US5216278A (en) * 1990-12-04 1993-06-01 Motorola, Inc. Semiconductor device having a pad array carrier package
JP2564707B2 (ja) * 1991-01-09 1996-12-18 ローム株式会社 電子部品用リードフレームにおけるモールド部のマルチ式成形方法及び成形装置
JPH04254363A (ja) 1991-02-06 1992-09-09 Hitachi Ltd リードフレーム及びそれを用いた半導体集積回路装置
US5172214A (en) * 1991-02-06 1992-12-15 Motorola, Inc. Leadless semiconductor device and method for making the same
US5153385A (en) * 1991-03-18 1992-10-06 Motorola, Inc. Transfer molded semiconductor package with improved adhesion
US5341039A (en) * 1991-04-19 1994-08-23 Mitsubishi Denki Kabushiki Kaisha High frequency integrated circuit device including a circuit for decreasing reflected signals in wiring formed on a semiconductor substrate
WO1992020097A1 (en) * 1991-04-26 1992-11-12 Citizen Watch Co., Ltd. Semiconductor device and manufacturing method therefor
KR940003560B1 (ko) 1991-05-11 1994-04-23 금성일렉트론 주식회사 적층형 반도체 패키지 및 그 제조방법.
JPH04362091A (ja) * 1991-06-05 1992-12-15 Mitsubishi Heavy Ind Ltd プラズマ化学気相成長装置
US5164817A (en) * 1991-08-14 1992-11-17 Vlsi Technology, Inc. Distributed clock tree scheme in semiconductor packages
JPH05190737A (ja) 1992-01-13 1993-07-30 Ngk Insulators Ltd リードフレーム
US5334857A (en) * 1992-04-06 1994-08-02 Motorola, Inc. Semiconductor device with test-only contacts and method for making the same
US5280193A (en) 1992-05-04 1994-01-18 Lin Paul T Repairable semiconductor multi-package module having individualized package bodies on a PC board substrate
JPH05315515A (ja) 1992-05-07 1993-11-26 Nec Corp 半導体装置
JP2617402B2 (ja) 1992-06-10 1997-06-04 オリジン電気株式会社 半導体装置、電子回路装置、およびそれらの製造方法
US5248903A (en) * 1992-09-18 1993-09-28 Lsi Logic Corporation Composite bond pads for semiconductor devices
US5729894A (en) * 1992-07-21 1998-03-24 Lsi Logic Corporation Method of assembling ball bump grid array semiconductor packages
US5592025A (en) 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
JP3046151B2 (ja) 1992-08-10 2000-05-29 ローム株式会社 リードフレーム
US5612576A (en) * 1992-10-13 1997-03-18 Motorola Self-opening vent hole in an overmolded semiconductor device
JPH06132423A (ja) 1992-10-19 1994-05-13 Sharp Corp 半導体装置の製造方法
US5535101A (en) * 1992-11-03 1996-07-09 Motorola, Inc. Leadless integrated circuit package
KR100280762B1 (ko) 1992-11-03 2001-03-02 비센트 비.인그라시아 노출 후부를 갖는 열적 강화된 반도체 장치 및 그 제조방법
JPH06169051A (ja) 1992-11-27 1994-06-14 Sumitomo Special Metals Co Ltd リードフレームとその製造方法並びに半導体パッケージ
US5363075A (en) 1992-12-03 1994-11-08 Hughes Aircraft Company Multiple layer microwave integrated circuit module connector assembly
JPH06216179A (ja) 1993-01-21 1994-08-05 Hitachi Ltd 半導体装置の製造方法およびその製造に用いるリードフレームならびにトランスファモールド型
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5355283A (en) * 1993-04-14 1994-10-11 Amkor Electronics, Inc. Ball grid array with via interconnection
US5316965A (en) * 1993-07-29 1994-05-31 Digital Equipment Corporation Method of decreasing the field oxide etch rate in isolation technology
US5336931A (en) * 1993-09-03 1994-08-09 Motorola, Inc. Anchoring method for flow formed integrated circuit covers
US5346118A (en) * 1993-09-28 1994-09-13 At&T Bell Laboratories Surface mount solder assembly of leadless integrated circuit packages to substrates
JPH07111254A (ja) * 1993-10-12 1995-04-25 Sumitomo Electric Ind Ltd 半導体装置の製造方法
US5467252A (en) * 1993-10-18 1995-11-14 Motorola, Inc. Method for plating using nested plating buses and semiconductor device having the same
US5446625A (en) * 1993-11-10 1995-08-29 Motorola, Inc. Chip carrier having copper pattern plated with gold on one surface and devoid of gold on another surface
GB2283863A (en) * 1993-11-16 1995-05-17 Ibm Direct chip attach module
US5462636A (en) 1993-12-28 1995-10-31 International Business Machines Corporation Method for chemically scribing wafers
TW272311B (zh) * 1994-01-12 1996-03-11 At & T Corp
US5435482A (en) * 1994-02-04 1995-07-25 Lsi Logic Corporation Integrated circuit having a coplanar solder ball contact array
FR2716555B1 (fr) 1994-02-24 1996-05-15 Gemplus Card Int Procédé de fabrication d'une carte sans contact.
US5635671A (en) * 1994-03-16 1997-06-03 Amkor Electronics, Inc. Mold runner removal from a substrate-based packaged electronic device
EP1213754A3 (en) * 1994-03-18 2005-05-25 Hitachi Chemical Co., Ltd. Fabrication process of semiconductor package and semiconductor package
US5468999A (en) * 1994-05-26 1995-11-21 Motorola, Inc. Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding
JP3541491B2 (ja) 1994-06-22 2004-07-14 セイコーエプソン株式会社 電子部品
US5467253A (en) * 1994-06-30 1995-11-14 Motorola, Inc. Semiconductor chip package and method of forming
US5436203A (en) * 1994-07-05 1995-07-25 Motorola, Inc. Shielded liquid encapsulated semiconductor device and method for making the same
US5525834A (en) * 1994-10-17 1996-06-11 W. L. Gore & Associates, Inc. Integrated circuit package
US5491111A (en) 1994-10-26 1996-02-13 Tai; George Method of making a semiconductor diode
US5541450A (en) * 1994-11-02 1996-07-30 Motorola, Inc. Low-profile ball-grid array semiconductor package
US6465743B1 (en) * 1994-12-05 2002-10-15 Motorola, Inc. Multi-strand substrate for ball-grid array assemblies and method
JP3438369B2 (ja) 1995-01-17 2003-08-18 ソニー株式会社 部材の製造方法
US5652185A (en) 1995-04-07 1997-07-29 National Semiconductor Corporation Maximized substrate design for grid array based assemblies
US5612513A (en) 1995-09-19 1997-03-18 Micron Communications, Inc. Article and method of manufacturing an enclosed electrical circuit using an encapsulant
US5700981A (en) * 1996-02-08 1997-12-23 Micron Communications, Inc. Encapsulated electronic component and method for encapsulating an electronic component
US5604160A (en) 1996-07-29 1997-02-18 Motorola, Inc. Method for packaging semiconductor devices
US5776798A (en) 1996-09-04 1998-07-07 Motorola, Inc. Semiconductor package and method thereof
US5981314A (en) 1996-10-31 1999-11-09 Amkor Technology, Inc. Near chip size integrated circuit package
US6172419B1 (en) * 1998-02-24 2001-01-09 Micron Technology, Inc. Low profile ball grid array package
US6302101B1 (en) * 1999-12-14 2001-10-16 Daniel Py System and method for application of medicament into the nasal passage

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US20070137889A1 (en) 2007-06-21
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CN1155080C (zh) 2004-06-23
US7199306B2 (en) 2007-04-03
US6465743B1 (en) 2002-10-15
US20030027377A1 (en) 2003-02-06
US7397001B2 (en) 2008-07-08
JP3493088B2 (ja) 2004-02-03
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US20080289867A1 (en) 2008-11-27
JPH08222654A (ja) 1996-08-30
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US20040129452A1 (en) 2004-07-08
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