201230141 六、發明說明： . 【相關發明之交互參照】 • 本申請案係基於專利法主張在20 1 0年1 1月5曰申請 之美國臨時專利申請案第61/41〇,599號的優先權，該美 國臨時專利中請案之内容係本巾請之基礎，且藉由弓I用 形式而併入本文。 【發明所屬之技術領域】 本發明係與玻璃晶圓有關，該玻璃晶圓可於半導體組 裝製程中（包括在用以製造積體電路與電子元件之自動 設備中）作為矽晶圓之替代。 【先前技術】 對於較不昂貴的石夕晶圓處理方法（用以產生積體電路 (icS)、MEMsm、邏輯ICs、電源裝置以及現代電子 :置中所使用之其他電子元件)存有漸增之需求。在目 月，J，石夕晶圓不只是用於主動積體電路與其他電路元件 中’也可使用作為不含電子裝置中所用之電路或其他特 徵部的载體、中間物與機械元件。高度需要找出 用石夕晶圓作為載體、中間物與其他元件的替代方式，以 進-步降低最終封裝部件之成本。然而，要找出一種較 不昂貴的石夕晶圓替代方式並非簡單任 其他裂置的製程中所使用的組裝工具包括了自動裝:: 201230141 卸載設備（例如匣盒自動裝載考 ㉟褒載15，㈣ε盒自動裝載器係 裝載至微影狄備、蝕刻設備等及自該 外 備等卸載）。該等匣盒自動裝載„ ^衫"又 '蝕刻設 i自動裝载益係與各種感測器相關， 以於晶圓移進及移出工具時決 义從罝、位置、以及位置 之確認；此舉係藉由晶圓平台、切痕或位於晶圓邊緣處 的其他類似機制的使用來完成’此必須在卫具内正確定 向問題在於許多感測器都是為感測石夕半導體晶圓而設 計，現有的感測器在本質上為機械式、光學式及/或電感 /電容式。機械式感測器可與其他材料運作，而電氣式或 光學式感測器則非總是可與其他材料運作。雖可改變工 具上的每一個感測器來感測其他材料（亦即非矽）所製成 之晶圓，但此舉在製造環境中是不需要的。除了翻新工 具的成本與心力之外，還需要各種程度的製造重新認可 來確保未改變標準產品規格，此需要大量的作業。另一 種類型的晶圓夾具（統稱為靜電夾具）係使用靜電電場來 使日a圓固疋定位，但該等晶圓夾具無法與不受靜電電場 影響的晶圓材料一起運作，像是如玻璃晶圓之介電材 料。玻璃的不同介電性質會導致僅為矽晶圓能適當運作 而設計之靜電夾具故障。 矽是現有材料中作為載體、中間物與其他應用之選 擇’然需要找出較不昂貴的材料、以及在現有設備中使 用β亥等材料而不進行耗費成本之修改的方法。因此本發 明係關於在現有設備中之玻璃材料的使用，此無耗費成 本與時間之設備修改。 201230141 【發明内容】 本發明係關於使用玻璃晶圓作為載體、中間物或使用 於其他選擇應用中，其中電子電路或運作元件（例如電晶 體）係於產生電子裝置時形成。在該玻璃晶圓所欲使用 中特別重要的疋该玻璃具有之熱膨脹係數（「cte」） 係實質上等於半導體矽的CTE(亦即在約1〇%内，且在某 些情況下為約5%内）。 可使用於此類應用之一示例玻璃為鹼土族硼鋁矽酸鹽 玻璃，該鹼土族硼鋁矽酸鹽玻璃係市售為康寧eagle XG®(下稱「EXG」）玻璃。EXG玻璃晶圓可用於封裝體中 間物，用以構成電流隔離元件，或作為當附接矽晶圓為 了最終封裝而被薄化時所使用之製程載體。在所有的該 等實例中，玻璃晶圓必須被載進與載出自動設備。然而， 使用玻璃的一個問題在於，許多感測器都是為感測矽半 導體晶圓而設計。 根據本發明，對選擇玻璃施用選擇材料層、薄膜或塗 層，該玻璃具有之CTE係等於或實質上等於可包含電路 與其他層之半導體矽複合物的CTE。舉例而言，矽晶圓 的CTE約為3.2xl0'6/°C。玻璃載體的CTE應經選擇，使 該CTE與最終矽複合物實質匹配。舉例而言，若在cTE 為3.2x10，^：的矽晶圓上放置最小電路與其他層，則 CTE約為3.1x1〇-6/〇c之玻璃（例如康寧Eagle XG)為合適 201230141 玻璃。然而，若晶圓是一種具有積體電路（例如具有多層 (例如5層至20層）金屬與絕緣體）、非常薄（例如約1〇微 米）之晶圓，則此複合裝置的CTE將比3.2xl〇-6/°C (單獨 之矽晶圓的CTE)咼出許多。因此，將選擇具有較高 之載體，亦即具有CTE約為最終複合物之CTE的一種載 體，以避免例如複合物的翹曲（該翹曲會對裝置產生無法 摘測之破壞）。具有較高CTE之載體的實例為含驗之銘石夕 酸鹽玻璃，該铭碎酸鹽玻璃係市售為康寧g〇rilla^$ 璃，該玻璃具有之CTE為約9.0χ1〇·6Γ(：。 進一步根據本發明’該層、薄膜或塗層係-種改變玻 璃晶圓之介電性質的膜層、薄膜或塗層’且/或利用非真 空技術而施用至玻璃晶圓。該層、薄膜或塗層也是一種 可由自動裝載感測器加以偵測的膜層、薄膜或塗層，且 可增進功能性以將晶圓抓取於現有的靜電央具中。該201230141 VI. Description of invention: . [Reciprocal reference of related inventions] • This application is based on the US Patent Provisional No. 61/41〇, No. 599, which is filed on January 5, 2010. The content of the application in the U.S. Provisional Patent is the basis of the present invention and is incorporated herein by way of the use of the bow. FIELD OF THE INVENTION The present invention relates to glass wafers that can be used as a replacement for germanium wafers in semiconductor assembly processes, including in automated devices used to fabricate integrated circuits and electronic components. [Prior Art] There is an increasing number of less expensive Shi Xi wafer processing methods (used to produce integrated circuits (icS), MEMsm, logic ICs, power supply devices, and modern electronics: other electronic components used in the center) Demand. In the month of the month, J, Shi Xi Wafer is not only used in active integrated circuits and other circuit components. It can also be used as a carrier, intermediate and mechanical components that do not contain circuits or other features used in electronic devices. It is highly desirable to find alternatives to the use of Shi Xi wafers as carriers, intermediates and other components to further reduce the cost of the final packaged components. However, finding a less expensive alternative to the Shixi wafer is not a simple assembly process used in other cracking processes including automatic loading: 201230141 Unloading equipment (eg cassette automatic loading test 35 褒 15 (4) The ε box autoloader is loaded to the lithography apparatus, the etching apparatus, and the like, and is unloaded from the external equipment. The cassettes are automatically loaded with „ 衫 & 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 This is done by the use of wafer platforms, cuts, or other similar mechanisms at the edge of the wafer. 'There must be a proper orientation within the fixture. The problem is that many sensors are sensing the Shih Semiconductor wafer. Designed, existing sensors are mechanical, optical, and/or inductive/capacitive in nature. Mechanical sensors can operate with other materials, while electrical or optical sensors are not always available. Works with other materials. Although each sensor on the tool can be changed to sense wafers made from other materials (ie, non-twisted), this is not required in a manufacturing environment. In addition to cost and effort, various levels of manufacturing re-approval are required to ensure that standard product specifications are not changed, which requires a lot of work. Another type of wafer fixture (collectively called electrostatic fixture) uses an electrostatic field to make the day a round. solid Positioning, but these wafer fixtures cannot operate with wafer materials that are not affected by electrostatic fields, such as dielectric materials such as glass wafers. The different dielectric properties of glass can result in proper operation of the wafer. Designed electrostatic fixture failures. 矽 is the choice of carriers, intermediates, and other applications in existing materials. Of course, it is necessary to find less expensive materials, and to use materials such as βHai in existing equipment without costly modifications. The present invention relates to the use of glass materials in existing equipment, which is cost-free and time-independent. 201230141 SUMMARY OF THE INVENTION The present invention relates to the use of glass wafers as carriers, intermediates or other options. In applications where an electronic circuit or operational component (eg, a transistor) is formed when an electronic device is produced. The glass has a coefficient of thermal expansion ("cte") that is substantially important in the intended use of the glass wafer. The CTE of the semiconductor germanium (i.e., within about 1%, and in some cases within about 5%). An exemplary glass that can be used in such applications is an alkaline earth boroaluminosilicate glass commercially available as Corning eagle XG® (hereinafter referred to as "EXG") glass. The EXG glass wafer can be used as a package intermediate to form a galvanic isolation element or as a process carrier for use when the attached wafer is thinned for final packaging. In all of these examples, the glass wafer must be loaded into and out of the automated equipment. One problem with glass, however, is that many sensors are designed to sense germanium semiconductor wafers. In accordance with the present invention, a selective material layer, film or coating is applied to the selective glass having a CTE which is equal to or substantially equal to the CTE of the semiconductor germanium complex which may comprise circuitry and other layers. For example, the CTE of a germanium wafer is approximately 3.2 x 10'6/°C. The CTE of the glass carrier should be selected such that the CTE substantially matches the final ruthenium complex. For example, if a minimum circuit and other layers are placed on a crucible with a cTE of 3.2x10, ^:, a glass with a CTE of approximately 3.1x1〇-6/〇c (eg, Corning Eagle XG) is suitable for 201230141 glass. However, if the wafer is a wafer with integrated circuitry (eg, with multiple layers (eg, 5 to 20 layers of metal and insulator), very thin (eg, about 1 μm), the CTE of this composite device will be 3.2. The xl〇-6/°C (the CTE of the individual wafers) is much more. Therefore, a carrier having a higher carrier, i.e., having a CTE of about the CTE of the final composite, will be selected to avoid, for example, warpage of the composite which would cause undetectable damage to the device. An example of a carrier having a higher CTE is a glass containing the test, which is commercially available as Corning g〇rilla^$, which has a CTE of about 9.0 χ 1 〇 6 Γ ( Further applying according to the invention 'the layer, film or coating system - a film, film or coating that changes the dielectric properties of the glass wafer' and/or to the glass wafer using non-vacuum techniques. The film or coating is also a film, film or coating that can be detected by an automated loading sensor and can enhance functionality to capture the wafer into an existing electrostatic centering device.
層、薄膜或塗層係設畔在Im t Q 你又。t為可施用至晶圓的側部，以不影 響在晶圓的前側部上組裝電路。後側部為該層、薄膜或 塗層之較佳表面，此狀況使得感㈣可自動t載於目前 使用的設備中，以於該等感測器之目前配置中適當作 :’而不需替換感測器或對設備進行花f成本之改變。 =的是在裝載與卸載工具，之光學感測器時，改變的 且 次疋田標的疋可允許靜電晶圓夾 -“ ’改變的介電性質可為靜電域。 兄=成如”程末端處時’後側部之薄媒係可視情 …’藉由短暫的化學機械研磨程序或該領域 201230141 技術人士習知的其他移除程序）。 有許多方式可在晶圓背部加入特徵部，以作為對齊與 感測之用。最直接的方、本β 敢罝祓的方去-在後側部加入薄膜金屬圖 =膜金屬在製程相容性上有強健性，可存留於高温 步驟中，且在組裝工具之間 之間產生之父又污染為最低。然 而’装載及卸載沉積薄膜金屬圖案用之真空塗佈腔 Γ週期時間是很長的，且此真空製程也會增加成本。' 更甚者，圖案化金屬舍止 Μ米孟/蜀霄需要先阻、遮罩與微影步驟，此 =會增加另外的成本。除此之外，金屬並無法被插入 =行的某些後續處理步驟中’例如，當前側的銘層被 “式银刻時，在載體背側上的紹金屬會被餘刻。該領域 技術人士可考量其他類型的真空沉積薄膜，但永遠备有 =花費時間來將晶圓裝載於真空沉積系統以及自該真空 沉積系統卸載之相關成本。 、、因此’-種更需要的解決方式為找出一種圖案化方 法’此圖案化方法不需要真空沉積但仍具有用於致動自 動裝載感測器之圖案化層所需之貢獻。舉例而言，可對 玻璃晶圓施用標準光阻薄膜，以改變光域中的介電性 質’使得塗有光阻的晶圓可致動光學感測器。此舉係藉 由使光阻加熱至高於該光阻正常使用溫度之溫度以增加 ^阻之光學吸收而行。使光阻加熱至320-400t之溫度範 (例如35〇t)將使光阻變成不透光。在一替代實施例 ’可選擇含有碳粒子之光阻、或可在光阻中加入碳粒 。光阻中的碳會改變光學性質與靜電性質兩者。 201230141 在一實施例中’本發明係與適合半導體組裝製程加工 以產生電子電路元件的玻璃晶圓有關。該玻璃晶圓具有 之CTE係實質上等於半導體矽的ctE、指向特徵部（例 如切痕或平台）、以及在晶圓的一表面之至少一部分上的 塗層。該塗層可從晶圓的邊緣向内延伸，其中該塗層可 為改變玻璃晶圓表面之至少一部分的光學特性之不透明 塗層、改變破璃介電性質之透明塗層或該等塗層之組合 等等°在一實施例中，該塗層係不透明塗層，該不透明 塗層從該晶圓的邊緣向内延伸約5毫米至約20毫米之距 離範圍。在另一實施例中，該不透明塗層係覆蓋了晶圓 表面的整個表面。在又一實施例中，該塗層改變了玻璃 晶圓的介電性質’使該玻璃晶圓適用於靜電夾具。在一 附加實施例中’玻璃晶圓的CTE係經選擇而實質上落於 置於該玻璃晶圓上之半導體石夕複合物裝置的CTE的5% 内。在一不同實施例中，該不透明塗層是由可調整光學 性質之有機聚合物所形成。此外’該不透明塗層可包含 油墨或染料。此外，該不透明塗層可包含黑色永久標記 油墨或等效物、經熱處理之薄有機層、填碳之光阻祐料、 加深（固化）之旋塗光阻、填碳之玻璃上旋塗材料或喷墨 之碳基油墨。在其他情況中’該不透明塗層可包含喷墨 金屬油墨、矽奈米粒子、無電之電鍍金屬、噴墨技術中 所使用之無電電鍍黑色氧化物、燒結之黑色網印玻璃玻 料材料或發光材料（該發光材料具有與目前感測器照明 源相應之激發波長）。 201230141 在另一實施例中，玻璃晶圓係適用於用以組製電子電 路元件之微影製程。該等玻璃晶圓具有之CTE係實質上 等於半導體矽複合物的CTE、指向特徵部（例如切痕或平 台）、以及在晶圓之的一表面之至少一部分上的塗層。該 塗層可從晶圓的邊緣向内延伸以改變玻璃晶圓的電氣性 質。該玻璃晶圓材料可作為整合被動元件（例如電阻器、 電容器與電感器）之载體 '中間物或基板。 【實施方式】 在本文中，係使用電路或積體電路的形成來作為在微 衫製程中使用玻璃載體晶圓的一個實例。除了電路或積 體電路以外，本文之教示内容係可應用於產生其他裝置 所用之製程中’包含MEMS、LED、CIS、C-PV、記憶體、 邏輯ICs、RF/類比ICs、微流體裝置、微顯示器、雷射 /VCSEL、燃料電池、微型電池、電源裝置等。為求方便， 用語「塗層」係用以包含置於表面上之薄膜、塗層或層 體。一般而言，塗層將包含不透明塗層，該不透明塗層 可阻擋在組裝工具感測器中所使用的光線（該光線介於 紅外線至可見光至紫外光的範圍内（約13〇〇nm至約 350nm))，或包含透明塗層以改變晶圓的介電性質，使得 晶圓可用於靜電夾具中（例如Sn〇2塗層’用以改變晶圓 的介電性質）。 用於產生具有電路之薄矽晶圓的初始步驟係說明於第 201230141 1圖中從左向右SI取第！圖可知，暫時性晶圓接合材 料剛（例如市售之WaferB〇NDTM Ητ材料）係施用於在石夕 晶®丨02的表面上的主㈣路上方。在施用晶圓接合材 料10 0之後，將晶圓上 圓〇2覆豐（如處理步驟1〇3)且接合於 載體晶圓1〇4上方以產生物品1〇6’其中晶圓接合材料 100係位於矽晶圓（頂部）102和晶圓載體1〇4之間。物品 1 〇 6之石夕晶目i 〇 2 &背側（亦即’未接合之側部）係可接著 被薄化（如步驟108所表示）以直接使用於薄型因子中， 或經處理以從背側的前方以表面暴露出貫孔，以產生三 維之石夕貫孔（3D-TSV)堆疊，如第2圖中所示者。在背: 上的處理也可包含增加重佈層，此步驟可包括沉積薄氧 化物薄膜（例如Si〇2，可藉由在爐體中對氧暴露而形 成）、在氧化物表面上塗佈光阻、透過光遮罩而使光阻的 選擇部分暴露至UV光以定義出電路圖t、移除暴露之 光阻以暴露出下方的氧化物層、酸钱刻以移除暴露之氧 化物、以及移除未暴露之光阻。接著可向下層積其他材 料層（未示），舉例而言，可透過薄膜沉積、遮罩與蝕刻 之其他步驟來沉積多晶矽（該多晶矽具導電性）以產生膜 層’其中每一層都有獨特圖案。其他步驟（同樣未示）包 含如摻雜選擇材料以調整選擇區域中的導電性以及金屬 化以於圖案中的不同元件之間形成電氣連接。在完成了 為形成電路之各圖案化步驟之後，Pp已形成圖案化之薄 矽曰曰圓105。在最後的步驟中，如步驟11〇所示，接著 刀離完成、經圖案化之石夕晶圓1〇5與晶圓載體1〇4。已 10 201230141 分離、圖案化之矽晶圓丨05係可接著用於形成積體電路 裝置’如第2圖中所述者。 在此時’矽晶圓係廣泛作為載體晶圓之用。根據本發 明’玻璃晶圓可取代矽晶圓，以提供使用矽載體晶圓所 未能提供之優點（例如降低成本與改良高頻響應）。 用以產生本文所述之玻璃晶圓的玻璃係可選自鈉鈣玻 璃、蝴石夕酸鹽玻璃、含驗乏紹石夕酸鹽玻璃、含驗之蝴銘 矽酸鹽玻璃等。玻璃係視情況而加以強化，無論是藉由 熱強化、化學強化或熱與化學處理之組合。經強化之玻 璃具有至少一層為處於壓縮應力下（壓縮層）。示例之玻 璃包含了市售之康寧EAGLE XG®之鹼土族硼鋁矽酸鹽 玻璃或市售之康寧GORILLA®之含鹼鋁矽酸鹽玻璃。 第3A圖說明目前業界中所使用之矽載體晶圓，而第 3B圖說明可用於替代矽晶圓之載體玻璃晶圓。第4A圖 說明示例玻璃（康寧EAGLB XG®玻璃）之透光性與波長 (nm)間的關係，該圖繪示了玻璃係從約250nm處開始透 光，且在約35〇nm至大於75〇nm的範圍内達到9〇+%之 透光性。第4B圖（該圖提供了矽之透光性與波長（nm)關 係圖）說明了矽在〇_2微米至i微米（2〇〇_1〇〇〇nm)的範圍 中並不透光。 半導體組裝製程（包含了在矽晶圓上形成積體電路（IC) 之製程）係利用自動機械來實施。為了在IC形成製程的 每一步驟中適當定位或定向晶圓，晶圓與載體晶圓在用 以取向晶圓與載體的一部分邊緣上係具有切痕或平台。 201230141 第5圖說明矽晶圓20，該矽晶圓20於邊緣上具有切痕 24;或者是’矽晶圓20在邊緣上可具有平台。第6圖說 明玻璃晶圓30，該玻璃晶圓30於邊緣上具有平台32; 或者是，該玻璃晶圓3 0可於邊緣上具有切痕。切痕與平 台係規定於 SEMItm半導體晶圓標準中（見 http://dom.seini.org/downloads.ns 疗 staTidard?〇penform&did=9.邛 AABB0B72 C91768825732B004816AD)。然而，若目標為非標準之MEMS 製程時，即不需切痕與平台，且可適當調整工具。 如第8A圖與第8B圖所示’一種常見的定向方法包含 了使用光學感測器，該光學感測器具有光源丨5〇(一般為 可見光源）與用於產生及偵測光束丨54之偵測器丨52。第 8A圖說明了矽晶圓20 ’該矽晶圓2〇於邊緣上具有切痕 24，且晶圓20係位於旋轉匣盒（未示）上。矽晶圓2〇的 表面為不透明，且該矽晶圓2〇將阻擋光束154在光源 150與偵測器152之間通行 '然而，當晶圓2〇旋轉而使 切痕24位於光束154的位置中時，偵測器152係感測到 光束並停止E盒的旋轉。停止之匿盒（固持著晶圓2〇)係Layers, films or coatings are set at Im t Q. t is the side that can be applied to the wafer so that the circuit is assembled on the front side of the wafer without affecting it. The rear side is the preferred surface of the layer, film or coating. This condition allows the sense (4) to be automatically carried in the currently used equipment for proper use in the current configuration of the sensors: 'without Replace the sensor or change the cost of the device. = In the loading and unloading tool, the optical sensor, the changed and sub-standard 疋 can allow the electrostatic wafer clip - "The changed dielectric properties can be electrostatic domains. Brother = Chengru" at the end of the process At the time of the 'back side of the thin medium can be seen... 'by a short chemical mechanical polishing program or other removal procedures known to the skilled person in the field 201230141). There are many ways to add features to the back of the wafer for alignment and sensing. The most direct side, this β dare to go - add thin film metal on the back side = film metal is robust in process compatibility, can stay in the high temperature step, and between the assembly tools The father of the birth has the lowest pollution. However, the vacuum coating chamber for loading and unloading deposited thin film metal patterns has a very long cycle time, and this vacuum process also increases the cost. What's more, the patterned metal is used to stop the dam, the mask and the lithography step, which adds additional cost. In addition to this, the metal cannot be inserted in some subsequent processing steps of the row = 'For example, when the inscription layer on the current side is "stained in silver, the metal on the back side of the carrier will be left behind." Other types of vacuum deposited films can be considered, but there is always a cost associated with loading the wafer into the vacuum deposition system and unloading the vacuum deposition system. Therefore, the more desirable solution is to find A patterning method 'This patterning method does not require vacuum deposition but still has the contribution required to actuate the patterned layer of the autoload sensor. For example, a standard photoresist film can be applied to the glass wafer, In order to change the dielectric properties in the optical domain, the photoresist coated wafer can actuate the optical sensor. This is done by heating the photoresist to a temperature above the normal operating temperature of the photoresist to increase the resistance. Optical absorption. Heating the photoresist to a temperature range of 320-400 t (eg 35 〇t) will cause the photoresist to become opaque. In an alternative embodiment, a photoresist containing carbon particles may be selected, or may be in the light. Add carbon particles to the resistance Carbon in the photoresist changes both optical and electrostatic properties. 201230141 In one embodiment, the invention relates to a glass wafer suitable for semiconductor assembly process to produce electronic circuit components. The glass wafer has a CTE system. Substantially equal to the ctE of the semiconductor germanium, the pointing feature (eg, a cut or a land), and a coating on at least a portion of a surface of the wafer. The coating may extend inwardly from the edge of the wafer, wherein the coating The layer can be an opaque coating that changes the optical properties of at least a portion of the surface of the glass wafer, a clear coating that changes the dielectric properties of the glass, or a combination of such coatings, etc. In one embodiment, the coating is opaque a coating that extends inwardly from the edge of the wafer by a distance ranging from about 5 mm to about 20 mm. In another embodiment, the opaque coating covers the entire surface of the wafer surface. In one embodiment, the coating alters the dielectric properties of the glass wafer 'making the glass wafer suitable for electrostatic fixtures. In an additional embodiment, the CTE of the glass wafer is selected and substantially Within 5% of the CTE of the semiconductor stellite composite device disposed on the glass wafer. In a different embodiment, the opaque coating is formed from an organic polymer of adjustable optical properties. The opaque coating may comprise an ink or a dye. In addition, the opaque coating may comprise a black permanent marking ink or equivalent, a heat treated thin organic layer, a carbon filled photoresist, a deepened (cured) spin coating photoresist Carbon-filled glass spin-on material or inkjet carbon-based ink. In other cases, the opaque coating may comprise inkjet metal ink, nanoparticle, electroless metal plating, inkjet technology. Electroless plating of black oxide, sintered black screen glass glass material or luminescent material (the luminescent material has an excitation wavelength corresponding to the current sensor illumination source). 201230141 In another embodiment, the glass wafer is suitable for A lithography process for forming electronic circuit components. The glass wafers have a CTE that is substantially equal to the CTE of the semiconductor germanium composite, a pointing feature (e.g., a cut or a flat), and a coating on at least a portion of a surface of the wafer. The coating can extend inwardly from the edge of the wafer to alter the electrical properties of the glass wafer. The glass wafer material can serve as a carrier 'intermediate or substrate' for integrating passive components such as resistors, capacitors and inductors. [Embodiment] Herein, the formation of a circuit or an integrated circuit is used as an example of using a glass carrier wafer in a micro-shirt process. In addition to circuits or integrated circuits, the teachings herein can be applied to processes used to create other devices, including MEMS, LEDs, CIS, C-PV, memory, logic ICs, RF/analog ICs, microfluidic devices, Microdisplay, laser/VCSEL, fuel cell, micro battery, power supply unit, etc. For convenience, the term "coating" is used to include a film, coating or layer placed on a surface. In general, the coating will comprise an opaque coating that blocks the light used in the assembly tool sensor (the light is in the range of infrared to visible to ultraviolet light (about 13 〇〇 to Approximately 350 nm)), or a clear coating to change the dielectric properties of the wafer, such that the wafer can be used in an electrostatic fixture (eg, Sn 2 coating to change the dielectric properties of the wafer). The initial steps for creating a thin tantalum wafer with circuitry are described in Figure 201230141 1 from left to right SI! As can be seen, the temporary wafer bonding material (e.g., commercially available Wafer B 〇 NDTM Ητ material) is applied over the main (four) road on the surface of the Shijingjing® 02. After the wafer bonding material 100 is applied, the wafer is covered with a round bump 2 (as in the processing step 1〇3) and bonded over the carrier wafer 1〇4 to produce an article 1〇6′ where the wafer bonding material 100 It is located between the germanium wafer (top) 102 and the wafer carrier 1〇4. Item 1 〇6的石晶目 i 〇2 & The back side (i.e., the 'unjoined side') can then be thinned (as indicated by step 108) for direct use in the thin factor, or processed A through hole is exposed from the front side of the back side to create a three-dimensional stone through hole (3D-TSV) stack, as shown in FIG. The treatment on the back: may also include adding a redistribution layer, which may include depositing a thin oxide film (eg, Si〇2, which may be formed by exposure to oxygen in the furnace), coating on the oxide surface. The photoresist, through the light mask, exposes selected portions of the photoresist to UV light to define a circuit pattern t, removes the exposed photoresist to expose the underlying oxide layer, and removes the exposed oxides, And remove unexposed photoresist. Layers of other materials (not shown) may then be laminated down, for example, through the steps of thin film deposition, masking, and etching to deposit polysilicon (the polysilicon cooker is conductive) to create a film layer, where each layer is unique pattern. Other steps (also not shown) include doping the selection material to adjust the conductivity in the selected regions and metallize to form an electrical connection between the different elements in the pattern. After completing the various patterning steps for forming the circuit, Pp has formed a patterned thin circle 105. In the final step, as shown in step 11A, the knife is then finished, the patterned lithographic wafer 1〇5 and the wafer carrier 1〇4. 10 201230141 The separated, patterned wafer 丨 05 system can then be used to form an integrated circuit device as described in FIG. 2 . At this time, the 矽 wafer system is widely used as a carrier wafer. Glass wafers can be substituted for germanium wafers in accordance with the present invention to provide advantages not provided by the use of germanium carrier wafers (e.g., reduced cost and improved high frequency response). The glass system used to produce the glass wafers described herein may be selected from the group consisting of soda lime glass, ceramsite glass, silicate glass, and silicate glass. The glass is reinforced as appropriate, either by heat strengthening, chemical strengthening or a combination of heat and chemical treatment. The reinforced glass has at least one layer under compressive stress (compressed layer). The glass of the example comprises a commercially available alkaline earth boroaluminosilicate glass of Corning EAGLE XG® or a commercially available alkali aluminate glass of Corning GORILLA®. Figure 3A illustrates the germanium carrier wafer currently used in the industry, while Figure 3B illustrates a carrier glass wafer that can be used in place of the germanium wafer. Figure 4A illustrates the relationship between light transmission and wavelength (nm) of an exemplary glass (Corning EAGLB XG® glass), which depicts the glass system starting to transmit light at about 250 nm and at about 35 〇 nm to greater than 75 A light transmission of 9 〇 + % is achieved in the range of 〇 nm. Figure 4B (this figure provides a plot of light transmission versus wavelength (nm) for 矽) illustrating that 矽 is not transparent in the range of 〇_2 microns to i microns (2〇〇_1〇〇〇nm) . The semiconductor assembly process (including the process of forming an integrated circuit (IC) on a germanium wafer) is performed by an automatic machine. In order to properly position or orient the wafer during each step of the IC formation process, the wafer and carrier wafer are provided with incisions or terraces on a portion of the edges of the oriented wafer and carrier. 201230141 Figure 5 illustrates a tantalum wafer 20 having a notch 24 on the edge; or '矽 wafer 20 may have a land on the edge. Figure 6 illustrates a glass wafer 30 having a land 32 on the edge; alternatively, the glass wafer 30 may have a cut on the edge. The cut and platform are specified in the SEMItm semiconductor wafer standard (see http://dom.seini.org/downloads.ns therapy staTidard?〇penform&did=9.邛AABB0B72 C91768825732B004816AD). However, if the target is a non-standard MEMS process, no cuts and platforms are needed, and the tool can be adjusted appropriately. As shown in Figures 8A and 8B, a common orientation method involves the use of an optical sensor having a light source 丨5〇 (typically a visible light source) and for generating and detecting a beam 丨54. The detector 丨52. Figure 8A illustrates the tantalum wafer 20' which has a cut 24 on the edge and the wafer 20 is placed on a rotating cassette (not shown). The surface of the germanium wafer 2 is opaque, and the germanium wafer 2 will block the light beam 154 from passing between the light source 150 and the detector 152. However, when the wafer 2 is rotated, the cut 24 is located at the light beam 154. In position, the detector 152 senses the beam and stops the rotation of the E-box. Stop box (holding wafer 2)
以形成 會停止旋轉，且不會傳送至微影裝置。 會停止旋轉， I：上之玻璃晶圓3 0，該 3 4。然而，由於玻璃晶 波璃以及切痕。亦即， 。因此，玻璃晶圓將不 在原理上’載體盤係與石夕Ic 晶圓盤相同尺寸，然而在 12 201230141 實務上，有時載體盤需要稍微較大（例如在直徑上大！毫 米（+lmm))’此理由是因為石夕晶圓係、較薄（第【圖），晶圓 的邊緣具有剛開始是「c」巾、且變成…」形之側 部輪廊，而產生尖銳點。當石夕晶圓在進行研磨,拋光薄化 時，尖銳的邊緣會斷開並生刮傷。因此，載體晶圓有時 係大於1C晶圓’因此，來自暫時性接合劑之彎液面將塗 佈於邊緣並固留在尖銳邊緣上。载體晶圓之此+lmm較 大尺寸係在半導體標準規格内，且正常是具有僅為一般 相容性所用之切痕或平台。然而，若工具不需要定位該 平台或可從軟體序列中移去該定位步驟，則玻璃晶圓便 不需要定向標記。舉例而言，CM〇s影像感測器通常即 不具定向標記。 本發明係說明克服了感測器無法對玻璃晶圓作用相關 問題的玻璃晶圓以及調整此類晶圓的方法。可使用真空 方法於本文所述之玻璃晶圓上產生塗層，然在某些實施 例中，也可使用非真空方法（例如喷塗、旋塗、刷塗或滾 印等）來降低成本。 有許多薄膜或塗層實例可用來改變介電性質、光學性 質及/或電氣性質。在一實施例中，係使用該等材料來僅 圖案化位於感測器附近之載體（一般是在載體的邊緣 處）。在另一實施例中，可對整個載體表面施用材料或薄 膜而無圖案。第7A圖說明了 一種玻璃晶圓30，該玻璃 晶圓30於表面31的頂部上具有切痕34。在第7A圖中， 並無塗層被施用至晶圓30的任何表面或邊緣。從切痕 13 201230141 34延伸至第7A圖上方與下方之陰影區域是玻璃3〇的未 塗佈邊緣。第7B圖說明一種晶圓3〇，該晶圓3〇於表面 31的頂部上具有切痕34，且晶圓3〇具有不透明塗層36, 該不透明塗層36係施用至玻璃的面部表面、從邊緣向内 5-20毫米之距離處。當塗佈邊緣旋轉時，光學感測器係 因塗層34 p且擋光線而未讀取到來自*源的《，如上文所 說明。然而，當切痕抵達光束時，光學感測器即讀取到 光束而旋轉動作即暫停，因此矽晶圓即可適當對齊以 進行進一步之處理。 第C，說明了在表面31上有切痕34之玻璃晶圓 _該曰曰圓30在晶圓30整個表面上係具有不透明塗層。 同樣的田塗佈表面旋轉時，光學感測器係因塗層3 4阻 擋光線而未讀取到來自光源的光’如上文所說明。然而， 當切痕抵達光束時，光學感測器即讀取到光束，而旋轉 動作即暫停’因此矽晶圓即可適當對齊以進行進一步之 處理。鈿用至玻璃晶圓的塗層為不透明塗層。不透明塗 層可為阻擋可見光之任何顏色’然在一實施例中，塗層 為深色(例如深棕色、深藍色、深紫色等)。在另一實施 例中’該塗層為黑色。 二不t響正常的製造程序流程，塗層或薄膜必須符合 f處理條件’所施用的條件係因應用而為特定。舉例 ^起MEMS組裝製程，梦晶圓處理流程對化學污 :、係更為敏感。-般而言，此等條件為： 1.對製程溫度的耐受能力高達4〇〇它。 14 201230141 2·對正常無機酸蝕刻之耐化學性質。 3. 對光阻製程中所用標準溶劑之耐化學性質。 4. 未對使用者的製程添加化學污染物質。 基於上述條件’有許多示例塗層或薄膜材料以及大量 的非真空沉積技術可列入考量’一般可經分類以包含： 1. 可加熱分解（例如在空氣中加熱聚合物至4〇〇°c )之 聚合物。 2. 具有添加劑之聚合物，該聚合物於4〇〇〇c下仍保持 不反應。許多喷墨製程都使用此種材料。 3 .如金屬粒子、半導體或摻雜玻璃等添加物。注意金 屬與半導體粒子會改變光學與靜電性質兩者。 4 ·可產生符合上述條件之薄膜的電化學沉積。 可用於本發明之塗層材料的部分實例（不作為限制）包 含： 1. 黑色永久標記油墨或等效物，用以於靠近規定之定 位器附近的玻璃晶圓上產生黑色標記。 2. 薄有機層，可於加熱爐中被燒除，而於光學吸收性 上產生永久變化。 3 ·填碳之光阻材料（例如市售之TOK光阻，係用於彩 色濾光玻璃製程中且可作為黑色邊飾）。 4. 加深（故化）之旋塗光阻，所述加深可藉由使光阻於 二氣中被燒熱至向達400C之溫度而達成。 5. 填碳之玻璃上旋塗材料。 6·用於喷墨技術中之碳油墨。 15 201230141 .可用於噴墨技術中之金屬油墨。 8 ·可對電感感測器反應之金屬油墨。 9.可對矽半導體晶圓賦予玻璃特性之矽奈米粒子。 1 〇·無電電鍍之金屬，例如鎳。 11. 無電電鍍之黑色氧化物。 12. 黑色網印玻料。 13. 發光材料，具有與目前感測器照明源杻應之激發 波長。 在上述材料都經過適當處理序列之後，該等材料皆具 子丨3性而將不影響其他的矽組裝製程步驟。此外， 可用簡單工具於晶圓切痕附近進行局部沉積，以使用最 少量的材料來完成局部辨識。舉例而言’可使用絲質網 印、喷墨應用、喷塗、滾印或墊片應用、鋼印、壓印、 微接觸印刷以及其他的非真空方法來將油墨與金屬施 用至表面。利用非真空塗佈技術與簡單的圖案化製程， 將可產生低成本之辨識標記’以使目前的矽處理工具可 =卸載玻璃晶圓。其次，最初的黑色辨識標記; 系可 作為零階遮罩級，以供後續光遮罩對齊之用。 在產生電路與電子元件的矽組裝製 中，經塗佈及固 化之塗佈玻璃晶圓可提供下列其他優勢： L在製程溫度（〜40CTC )下仍可留存。 2 ·無交又污染。 3.可於光學系統工具（例如遮罩 與UV光。 )中阻擋可見光 16 201230141 4.不含會改變矽p-n接面之電氣性質的鹼或金金屬。 6亥領域技術人士明顯可知’可對本文所述之實施例進 行各種修飾與變化’此皆不背離本發明所主張標的之精 神與範疇。因此’本發明說明書意欲涵蓋本文所述之各 種實施例的修飾例與變化例，該等修飾例與變化例皆落 於如附申請專利範圍及其等效例之範疇内。 【圖式簡單說明】 第1圖為使用載體晶圓來形成薄Si晶圓之各個步驟的 示例說明。 第2圖為1C元件封裝體的說明，該图繪示了 3D TSV 堆疊記憶體、全部皆共同塗佈於中間物上之薄CPU晶 片’在此例中’該中間物係3D TSV堆疊。 第3A圖與第3B圖為矽晶圓和玻璃晶圓之影像，第3A 圖與第3B圖分別說明了不同的光學性質。 第4A圖與第4B圖分別說明了示例晶圓玻璃與矽之透 光百分率與可見光光譜波長之關係。 第5圖為具有指向切痕的矽晶圓的圖式。 第6圖說明具有指向平台的玻璃晶圓。 第7A圖說明在背景上之玻璃晶圓，該玻璃晶圓於邊緣 處具有切痕。 第7B圖說明在表面頂部上有切痕之晶圓，該晶圓具有 不透明塗層’該不透明塗層係施用於玻璃之面部表面而 17 201230141 從邊緣向内延伸一段距離。 第7 C圖說明在表面上有切痕之晶圓’該晶圓在晶圓整 個表面上係具有不透明塗層。 第8A圖說明在邊緣上具有切痕之矽晶圓，該晶圓20 係置於旋轉匣盒（未示）上。 第犯圖說明位於旋轉臣盒上之玻璃晶圓，該玻璃晶圓 在邊緣上具有切痕。 【主要元件符號說明】 100 接合材料 102 矽晶圓 103 處理步驟 104 晶圓載體 105 圖案化之矽晶圓 106 物品 108 步驟 110 步驟 150 光源 152 偵測器 154 光束 20 碎晶圓 24 切痕 30 玻璃晶圓 31 表面 32 平台 34 切痕 36 塗層 18The formation will stop the rotation and will not be transmitted to the lithography device. Will stop rotating, I: on the glass wafer 3 0, the 3 4 . However, due to the glass crystal glass and the cut marks. That is, . Therefore, glass wafers will not be in principle the same as the 'carrier disk system' and the same size as the Shixi Ic wafer disk. However, in 12 201230141 practice, sometimes the carrier disk needs to be slightly larger (for example, large in diameter! mm (+lmm) The reason for this is that the Shihwa wafer system is thinner (Fig.), and the edge of the wafer has a side wheel that is shaped like a "c" and becomes...", and sharp points are generated. When the Shixi wafer is being ground and polished, the sharp edges are broken and scratched. Therefore, the carrier wafer is sometimes larger than the 1C wafer. Therefore, the meniscus from the temporary bonding agent will be applied to the edges and retained on the sharp edges. The +1 mm larger size of the carrier wafer is within the semiconductor standard specifications and is normally a cut or platform for general compatibility. However, if the tool does not require positioning of the platform or the positioning step can be removed from the software sequence, the glass wafer does not require orientation marking. For example, a CM〇s image sensor usually does not have an orientation mark. SUMMARY OF THE INVENTION The present invention is directed to a glass wafer that overcomes the problems associated with the inability of the sensor to act on the glass wafer and methods of adjusting such wafers. A vacuum method can be used to create a coating on the glass wafers described herein, although in some embodiments, non-vacuum methods (e.g., spray coating, spin coating, brushing, or printing) can also be used to reduce cost. There are many examples of films or coatings that can be used to modify dielectric properties, optical properties, and/or electrical properties. In one embodiment, the materials are used to pattern only the carrier (typically at the edge of the carrier) located adjacent the sensor. In another embodiment, the entire carrier surface can be coated with a material or film without a pattern. Figure 7A illustrates a glass wafer 30 having a cut 34 on top of the surface 31. In Figure 7A, no coating is applied to any surface or edge of wafer 30. The shaded area extending from the cut 13 201230141 34 to the top and bottom of the 7A is the uncoated edge of the glass 3 。. Figure 7B illustrates a wafer 3 having a cut 34 on top of the surface 31 and a wafer 3 having an opaque coating 36 applied to the face surface of the glass, From the edge inward 5-20 mm. When the coated edge is rotated, the optical sensor is not read from the * source due to the coating 34p and blocking the light, as explained above. However, when the incision reaches the beam, the optical sensor reads the beam and the rotation is paused, so the wafer can be properly aligned for further processing. Section C illustrates a glass wafer having a score 34 on the surface 31. The dome 30 has an opaque coating over the entire surface of the wafer 30. When the same field coating surface is rotated, the optical sensor is not reading light from the light source due to the coating 34 blocking light, as explained above. However, when the incision reaches the beam, the optical sensor reads the beam and the rotation is paused so that the wafer can be properly aligned for further processing. The coating applied to the glass wafer is an opaque coating. The opaque coating can be any color that blocks visible light. In one embodiment, the coating is dark (e.g., dark brown, dark blue, deep purple, etc.). In another embodiment, the coating is black. In the case of a normal manufacturing process, the coating or film must meet the f treatment conditions. The conditions applied are specific to the application. For example, the MEMS assembly process, the dream wafer processing process is more sensitive to chemical contamination: In general, these conditions are: 1. The resistance to process temperature is as high as 4 〇〇. 14 201230141 2·Chemical resistance to normal inorganic acid etching. 3. Chemical resistance to standard solvents used in photoresist processes. 4. No chemical contamination has been added to the user's process. Based on the above conditions 'there are many examples of coating or film materials and a large number of non-vacuum deposition techniques can be considered' can generally be classified to include: 1. Heatable decomposition (for example, heating the polymer to 4 ° C in air) ) a polymer. 2. A polymer with an additive which remains unreacted at 4 °c. This material is used in many inkjet processes. 3. Additives such as metal particles, semiconductors or doped glass. Note that metal and semiconductor particles change both optical and electrostatic properties. 4 - Electrochemical deposition of a film that meets the above conditions can be produced. Some examples of coating materials useful in the present invention, and not by way of limitation, include: 1. A black permanent marking ink or equivalent for producing a black marking on a glass wafer adjacent to a defined positioner. 2. A thin organic layer that can be burned off in a furnace with permanent changes in optical absorption. 3 • Carbon-filled photoresist materials (such as commercially available TOK photoresists, which are used in color filter glass processes and can be used as black trims). 4. Deepening (destructive) spin coating photoresist, which can be achieved by heating the photoresist in the secondary gas to a temperature of up to 400C. 5. Spin-on material on carbon-filled glass. 6. Carbon ink used in inkjet technology. 15 201230141 . Metallic inks that can be used in inkjet technology. 8 · Metallic ink that can react to the inductive sensor. 9. Nanoparticles that impart glass properties to germanium semiconductor wafers. 1 〇·Electroless plating metal, such as nickel. 11. Black oxide without electroplating. 12. Black screen printing glass. 13. A luminescent material with an excitation wavelength that corresponds to the current sensor illumination source. After all of the above materials have been properly processed, they are all three-dimensional and will not affect other 矽 assembly process steps. In addition, local deposition can be performed near the wafer cuts with a simple tool to achieve local identification using a minimum amount of material. For example, silk screen printing, ink jet applications, spray coating, roll or gasket applications, stamping, stamping, microcontact printing, and other non-vacuum methods can be used to apply ink and metal to the surface. Using a non-vacuum coating technique with a simple patterning process, a low cost identification mark can be produced so that current enamel processing tools can = unload the glass wafer. Second, the original black identification mark; can be used as a zero-order mask level for subsequent light mask alignment. The coated and cured coated glass wafers provide the following additional advantages in the fabrication of circuit and electronic components: L can remain at process temperatures (~40 CTC). 2 · No cross and pollution. 3. Can block visible light in optical system tools (such as masks and UV light) 16 201230141 4. Contains no alkali or gold metal that changes the electrical properties of the 矽p-n junction. It will be apparent to those skilled in the art that various modifications and changes can be made to the embodiments described herein without departing from the spirit and scope of the claimed subject matter. Therefore, the present invention is intended to cover modifications and variations of the various embodiments described herein, which are within the scope of the appended claims and their equivalents. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is an illustration of the steps of forming a thin Si wafer using a carrier wafer. Figure 2 is an illustration of a 1C device package showing a 3D TSV stacked memory, a thin CPU wafer that is all co-coated on an intermediate, 'in this case' the intermediate 3D TSV stack. Figures 3A and 3B show images of tantalum wafers and glass wafers, and Figures 3A and 3B illustrate different optical properties, respectively. Figures 4A and 4B illustrate the relationship between the percent transmittance of the sample wafer glass and the wavelength of the visible light spectrum, respectively. Figure 5 is a diagram of a germanium wafer with a pointed incision. Figure 6 illustrates a glass wafer with a pointing platform. Figure 7A illustrates a glass wafer on the background that has cuts at the edges. Figure 7B illustrates a wafer having a kerf on the top of the surface having an opaque coating. The opaque coating is applied to the surface of the glass and 17 201230141 extends a distance inwardly from the edge. Figure 7C illustrates a wafer with a kerf on the surface. The wafer has an opaque coating over the entire surface of the wafer. Figure 8A illustrates a wafer having a kerf on the edge that is placed on a rotating cassette (not shown). The first map illustrates a glass wafer on a rotating box that has a cut on the edge. [Main Component Symbol Description] 100 Bonding Material 102 矽 Wafer 103 Processing Step 104 Wafer Carrier 105 Patterned Wafer 106 Article 108 Step 110 Step 150 Light Source 152 Detector 154 Light Beam 20 Broken Wafer 24 Notch 30 Glass Wafer 31 surface 32 platform 34 notch 36 coating 18