201009915 六、發明說明： 【明戶斤屬軒々貝】 本發明有關於切割晶圓以給予高晶粒強度之方法。 C #支系好]1 近年，用於半導體裝置的薄晶粒之需求逐漸增大。典 型地’“薄”晶粒是小於150微米厚，目前生產中典型的厚度 是50與75微米，然而人們希望在來年進一步滅少該厚度。 在一習知的方法中’透過在使用一機械鋸或雷射切割晶圓 ® 之前，以機械研磨該晶粒之相對於承載有主動裝置的—面 的一背面來減薄晶粒。此所謂的背面研磨製程將顯著的額 外應力與翹曲加諸於薄矽晶圓，該等薄矽晶圓可能已經透 • 過在該前面或主動面上的裝置層而被加諸應力。這種在該 矽晶圓上之一約5-10μιη厚的一表面層進行背面研磨動作所 產生的微裂紋，即會在該表面層完全地毀壞了該矽。在石夕 的一第二下伏層還形成晶體斷層，這導致一些電子屬性的 退化。背面研磨的這些影響在去帶、處理、切割及封裝組 翁 W 合加工期間產生了產能損失上的重大風險。在背面研磨期 間產生的這些缺陷也會對從該晶圓所生產的晶粒之彎曲強 度造成不良影響。 應力消除，例如在機械背面研磨之後，提高了晶粒強 度，以提供更佳的耐久性及減少晶粒翹曲，以在堆疊及薄 封裝中獲得更佳的可用性。應力消除的三種習知的類型是 化學機械研磨(CMP)、濕蝕刻、與乾蝕刻。 CMP使用有研磨作用、腐蝕性的泥漿實體地研磨掉在 3 201009915 一晶圓表面的微小的不平整。然而’這需要重新安裝該晶 圓，且CMP類裂方式也會引起該基板表面的一些機械毀壞。 濕化學钱刻包含使用化學劑諸如KOH及TMAH(四甲 基氫氧化敍）的旋轉加工來消除在一晶圓中的應力。藉由從 該晶圓之背面蝕刻掉一預定的厚度的材料’以消除微裂紋 與晶體斷層。然而，這也需要重新安裝該晶圓及利用一遮 罩層。 藉由，例如SF6氣體’來對一已經過背面研磨的晶圓進 行異向性電漿蝕刻，是消除背面研磨缺陷及消除在晶粒中 之應力的另一方式。然而，這也需要重新安襞該晶圓，且 電漿蝕刻與例如濕化學蝕刻相較之下是相對昂貴的。 美國專利第6,498,074號案揭露了 一種部分切割然後使 用一乾蝕刻減薄半導體晶圓，以獲得具有圓形底部邊緣與 邊角之半導體晶片的方法。在此一與減薄及切割相反的製 程中，一晶圓遭部分地切割以在該晶圓之有效側形成凹 槽。該晶圓是被4新安裝在—非接觸晶圓夾持^，且主動 面朝上’然後進行乾蝕刻’使用一常壓電漿蝕刻以從該晶 圓的-背面移除石夕’直至該等凹槽曝露出。該乾蚀刻透過 從該背側及該等晶粒之側壁上移除妙，以移除聚積在這些 區域内的應力。這也將使該等晶粒具有-圓形邊緣。然而， °亥方法錢重新絲該晶®及使用相對昂貴的電祕刻。 上述的這些消除應力的習知方法’至少且有需 要在製程步驟之間重新安裝該晶_缺點。 【發a月内容】 201009915 本發明的一個目的是至少改善在先前技術中的上述之 缺點。 依據本發明之一第一層面，提供了切割一半導體晶圓 的一種方法，該半導體晶圓具有包括多數主動裝置的一第 一面及與該第一面相對的一背面，該方法包含以下步驟： 將該晶圓安裝於該晶圓托架裝置上，以使該背面得以被存 取；藉由從該背面移除材料來減薄在該晶圓托架裝置上的 晶圓，以形成一薄化晶圓；使用一自發餘刻劑钮刻在該晶 ® 圓托架裝置上的該薄化晶圓之一背面，以至少減少在晶圓 薄化作業中所產生的缺陷，並產生一已蝕刻晶圓；在該晶 圓托架裝置上切割該遭蝕刻晶圓以形成多數晶粒。 ^ 較佳地，將該晶圓安裝在晶圓托架裝置上的該步驟包 含將該晶圓安裝在背面研磨帶裝置、機械夾持裝置、電子 夾持裝置與真空夾持裝置的其中一個上。 有利地，薄化之步驟包含機械研磨、乾姓刻與濕姓刻 中的其中一種。 ® 便利地，蝕刻該薄化晶圓的步驟包括使用氣體或液體 姓刻劑進行蚀刻。 有利地，使用一氣體或液體蝕刻劑進行蝕刻之步驟包 括使用一齒素或一鹵素化合物進行姓刻。 便利地，蝕刻之步驟包括使用氟、氯、鹽酸及溴化氫 中的其中一種進行餘刻。 便利地，蝕刻之步驟包括使用包含一惰性氣體與一鹵 素之一化合物的一蚀刻劑進行触刻。 201009915 較佳地，蝕刻之步驟包含使用氟化氙進行蝕刻。 較佳地’蝕刻之步驟包含使用一函素間化合物進行蝕剡 有利地，至少部分之該蝕刻步驟是在該切割步驟之前 執行。 便利地，該切割步驟包含使用機械鋸裝置或雷射裝置 進行切割。 有利地，切割晶圓之步驟包括透過透明的托架裝置將 在該晶圓上的對齊標識與切割裝置對齊。 便利地，該半導體晶圓是一矽晶圓。 依據本發明之第二層面，即是提供了一種用於切割半 導體晶圓的切割設備，該等半導體晶圓具有包括主動裝置 的一第一面及與該第一面相對的一背面，該設備包含：一 晶圓托架裝置，被組配以使該晶圓可被安裝於其上且該 晶圓之背面可被存取；一薄化裝置，被組配以透過從該背 面移除材料來減薄在該晶圓托架裝置上的該晶圓，以形成 一薄化晶圓；一蝕刻裝置，被組配以使用一自發蝕刻劑蝕 刻在該晶圓托架裝置上的該薄化晶圓之一背面，來至少減 少在該晶圓薄化作業中所產生的缺陷，以產生一已姓刻晶 圓，及一切割裝置，被組配以切割在該晶圓托架裝置上的 該已蝕刻晶圓，以形成多數晶粒。 較佳地，該晶圚托架裝置包含背面研磨帶裝置、機械 夾持裝置、電子夾持裝置與真空夾持裝置中的其中一種。 有利地’該減薄裝置包含機械研磨裝置、乾蝕刻裝置 及濕蝕刻裝置中的其中一種。 201009915 便利地，該蝕刻裝置包含—氣體或液體蝕刻劑。 有利地，該蝕刻裝置包含—鹵素或一鹵素化合物。 便利地，該蝕刻裝置包含氟、氣、鹽酸及溴化氫中的 其中一種。 便利地，該蝕刻裝置包含—惰性氣體與一鹵素之一化 合物。 較佳地，該触刻裝置包含氟化氤。 較佳地’該蝕刻裝置包含一齒素間化合物。 便利地，該切割裝置包含機械鋸裝置或雷射裝置。 有利地，該切割裝置包含用於透過透明的托架裝置將 在晶圓上的對齊標識與該切割裝置對齊的對齊裝置。 圖式簡單說明 參考該等附圖，現在將以範例的形式描述本發明，其中： 第1圖是一示意圖，說明依據本發明主動侧朝下地被安 裝在一托架帶上，並準備被加工的一半導體晶圓； 第2圖是一示意圖’說明第1圖之晶圓經背面研磨之後； 第3圖是—示意圖，說明第2圖之晶圓被乾蝕刻； 第4圖是一示意圖，說明第3圖之晶圓被切割之後； 第5圖是—較先前圖式放大的示意圖，說明從第4圖之 已切割晶圓上移走且被安裝在一基板上的一晶粒； 第6圖疋依據本發明之一方法的一流程圖。 在該等圖式中，相同的編號表示相同的部件。 【實式】 參考第1圖與第6圖，一半導體晶圓1是呈主動側朝下地 201009915 被安裝61在由一玻璃基板或托架5所支撐的一習知的背面 研磨帶2上。然而，該晶圓托架可由任何透光的軟質或硬質 材料製造，該軟質或硬質材料，例如，透過一粘合層，或 透過機械裝置諸如實體的、電性的、或真空夾持，以將該 晶圓保持在適當位置。 透過以一習知的方式“背面研磨”與該主動側相對的一 背側以減薄62該晶圓，以形成具有一所需厚度的一薄化晶 圓11，如在第2圖中所顯示，例如透過機械研磨或濕蝕刻或 乾#刻。 參考第3圖與第6圖，仍安裝在該背面研磨步驟中所使 用的該晶圓背面研磨帶托架2上的該薄化晶圓11，是被放置 在具有一入口 31與一出口 32的一艙室3中，並與矽的一自發 蝕刻劑相接觸，且被蝕刻一預定的時間。藉由“自發蝕刻劑” 一詞，即可理解其為一種無需外界能量源（如電力或動能) 來啟動其蝕刻的蝕刻劑，。這種蝕刻方式是會放出熱能的， 所以在該反應期間放出的能量比用以破壞及重建該等反應 物的原子鍵的能量更多。這種自發蝕刻劑的範例是由一惰 性氣體(例如氖、氣、氪)與一鹵素（例如，氟、氣、漠）所組 成的一類蝕刻劑，不是所有的這樣的組合都是穩定的，但 原則上大多數是可以被使用的。其他的自發蝕刻劑是鹵素 間化合物，其中該化合物由ABn組成，其中A與B是i素， 且A是該兩種鹵素之較少負電性的那一個，而η是B的原子 數量。 也就是說，特別是在一矽半導體晶圓的實例中，使用 201009915201009915 VI. INSTRUCTIONS: [Ming Hu Jin Xuan Xuan Bei] The present invention relates to a method of cutting a wafer to give high grain strength. C #支系好]1 In recent years, the demand for thin crystal grains for semiconductor devices has gradually increased. Typically, 'thin' grains are less than 150 microns thick, and typical thicknesses in current production are 50 and 75 microns, however it is desirable to further reduce this thickness in the coming year. In a conventional method, the grain is thinned by mechanically grinding a back surface of the die relative to the face carrying the active device prior to cutting the wafer using a mechanical saw or laser. This so-called backgrinding process imposes significant extra stress and warpage on the thin wafers that may have been stressed through the device layer on the front or active side. Such a microcrack generated by a back surface rubbing action on a surface layer of about 5-10 μm thick on the germanium wafer completely destroys the crucible at the surface layer. A crystal underlayer is also formed in a second underlying layer of Shi Xi, which causes degradation of some electronic properties. These effects of back grinding create a significant risk of loss of capacity during the stripping, processing, cutting, and packaging process. These defects generated during the back grinding process also adversely affect the bending strength of the crystal grains produced from the wafer. Stress relief, such as after mechanical back grinding, increases grain strength to provide better durability and reduced grain warpage for better usability in both stacked and thin packages. Three conventional types of stress relief are chemical mechanical polishing (CMP), wet etching, and dry etching. The CMP uses abrasive, corrosive mud to physically grind away the slight irregularities on the surface of a wafer at 3 201009915. However, this requires reinstalling the wafer, and the CMP cracking method also causes some mechanical damage to the surface of the substrate. Wet chemistry involves the use of chemical processing such as KOH and TMAH (tetramethyl hydride) to eliminate stress in a wafer. The microcrack and the crystallographic fault are eliminated by etching away a predetermined thickness of material ' from the back side of the wafer. However, this also requires reinstalling the wafer and utilizing a mask layer. Anisotropic plasma etching of a back-grinded wafer by, for example, SF6 gas' is another way to eliminate back-grinding defects and eliminate stress in the grains. However, this also requires reinstalling the wafer, and plasma etching is relatively expensive compared to, for example, wet chemical etching. U.S. Patent No. 6,498,074 discloses a method of partially cutting and then thinning a semiconductor wafer using a dry etch to obtain a semiconductor wafer having round bottom edges and corners. In this process, which is the opposite of thinning and cutting, a wafer is partially cut to form a recess on the active side of the wafer. The wafer is newly mounted on a non-contact wafer holder, and the active side faces up and then dry etched using a normal piezoelectric paste etch to remove the stone eve from the back side of the wafer until The grooves are exposed. The dry etch is removed from the back side and the sidewalls of the dies to remove stress build up in these regions. This will also give the grains a rounded edge. However, the ° Hai method money re-spins the Crystal® and uses relatively expensive electrical secrets. These conventional methods of stress relief have at least and need to reinstall the crystals between process steps. [A month content] 201009915 An object of the present invention is to at least improve the above disadvantages in the prior art. According to a first aspect of the present invention, there is provided a method of dicing a semiconductor wafer having a first side comprising a plurality of active devices and a back side opposite the first side, the method comprising the steps of Mounting the wafer on the wafer carrier device such that the back surface is accessed; thinning the wafer on the wafer carrier device by removing material from the back surface to form a wafer Thinning the wafer; using a spontaneous remnant button to engrave one of the thinned wafers on the wafer® circular carrier device to at least reduce defects generated during wafer thinning operations and generate a The wafer has been etched; the etched wafer is diced on the wafer carrier device to form a plurality of dies. Preferably, the step of mounting the wafer on the wafer carrier device comprises mounting the wafer on one of a backside polishing tape device, a mechanical clamping device, an electronic clamping device, and a vacuum clamping device. . Advantageously, the step of thinning comprises one of mechanical grinding, dry surging and wet surging. ® Conveniently, the step of etching the thinned wafer involves etching with a gas or liquid surname. Advantageously, the step of etching using a gas or liquid etchant involves the use of a dentate or a halogen compound for surging. Conveniently, the etching step includes residing using one of fluorine, chlorine, hydrochloric acid, and hydrogen bromide. Conveniently, the step of etching includes etching using an etchant comprising an inert gas and a compound of a halogen. 201009915 Preferably, the step of etching comprises etching using cesium fluoride. Preferably, the step of etching comprises etching using an inter-complex compound. Advantageously, at least a portion of the etching step is performed prior to the cutting step. Conveniently, the cutting step comprises cutting using a mechanical saw device or a laser device. Advantageously, the step of dicing the wafer includes aligning the alignment marks on the wafer with the cutting device through a transparent carrier device. Conveniently, the semiconductor wafer is a single wafer. According to a second aspect of the present invention, there is provided a cutting apparatus for cutting a semiconductor wafer, the semiconductor wafer having a first side including an active device and a back surface opposite the first surface, the device The invention comprises: a wafer carrier device assembled to enable the wafer to be mounted thereon and the back side of the wafer to be accessed; a thinning device configured to remove material from the back surface Thinning the wafer on the wafer carrier device to form a thinned wafer; an etching device configured to etch the thinned wafer carrier device using a spontaneous etchant a back side of the wafer to at least reduce defects generated in the wafer thinning operation to produce a wafer with a surname, and a cutting device that is assembled to be cut on the wafer carrier device The wafer has been etched to form a plurality of grains. Preferably, the wafer carrier device comprises one of a back grinding belt device, a mechanical clamping device, an electronic clamping device and a vacuum clamping device. Advantageously, the thinning device comprises one of a mechanical polishing device, a dry etching device and a wet etching device. 201009915 Conveniently, the etching apparatus comprises a gas or liquid etchant. Advantageously, the etching device comprises a halogen or a halogen compound. Conveniently, the etching apparatus comprises one of fluorine, gas, hydrochloric acid and hydrogen bromide. Conveniently, the etching apparatus comprises a compound of an inert gas and a halogen. Preferably, the etch device comprises cesium fluoride. Preferably, the etching apparatus comprises an interdental compound. Conveniently, the cutting device comprises a mechanical saw device or a laser device. Advantageously, the cutting device includes alignment means for aligning the alignment marks on the wafer with the cutting device through a transparent carrier means. BRIEF DESCRIPTION OF THE DRAWINGS With reference to the drawings, the invention will now be described by way of example, in which: FIG. 1 is a schematic illustration showing the active side-down mounting on a carrier strip in accordance with the present invention and ready to be processed A semiconductor wafer; FIG. 2 is a schematic view showing the wafer of FIG. 1 after back grinding; FIG. 3 is a schematic view showing that the wafer of FIG. 2 is dry etched; FIG. 4 is a schematic view. Illustrated after the wafer of FIG. 3 is cut; FIG. 5 is a schematic enlarged view of the prior art, illustrating a die removed from the diced wafer of FIG. 4 and mounted on a substrate; 6 is a flow chart of a method in accordance with one aspect of the present invention. In the drawings, the same reference numerals indicate the same parts. [Real] Referring to Figs. 1 and 6, a semiconductor wafer 1 is mounted with the active side down. 201009915 is mounted 61 on a conventional back grinding tape 2 supported by a glass substrate or bracket 5. However, the wafer carrier can be made of any light transmissive soft or hard material, such as through an adhesive layer, or through mechanical means such as physical, electrical, or vacuum clamping. Hold the wafer in place. The wafer is thinned 62 by "back grinding" a back side opposite the active side in a conventional manner to form a thinned wafer 11 having a desired thickness, as in Figure 2 Display, for example, by mechanical grinding or wet etching or dry etching. Referring to FIGS. 3 and 6, the thinned wafer 11 still mounted on the wafer backside polishing tape carrier 2 used in the back grinding step is placed with an inlet 31 and an outlet 32. In a chamber 3, it is in contact with a spontaneous etchant of the crucible and is etched for a predetermined period of time. By the term "spontaneous etchant" it is understood that it is an etchant that does not require an external source of energy, such as electricity or kinetic energy, to initiate its etching. This type of etching produces thermal energy, so the energy released during the reaction is more than the energy of the atomic bonds used to destroy and reconstitute the reactants. An example of such a spontaneous etchant is an etchant consisting of an inert gas (e.g., helium, gas, helium) and a halogen (e.g., fluorine, gas, moisture), not all of which are stable. But in principle most can be used. Other spontaneous etchants are interhalogen compounds wherein the compound consists of ABn, where A and B are i, and A is the less electronegative of the two halogens, and η is the number of atoms of B. That is to say, especially in the case of a semiconductor wafer, 201009915
XeF2或對一功a π A 吵曰日圓來說任何的矽之自發蝕刻劑，在該艙室3 夕a ，接著是在一預定的蝕刻時間段之内預定地一次或 夕人猶％進订艙室淨化。可選擇地，可使用連續的姓刻， 在此可實現該區域上之蝕刻的均勻性。此外，其他的自發 劑諸如_化物及函素化合物，包括i素間化合物，以 氣體液體的形式諸如，但不限於，F2、Cl2、HCh HBr 可適田地用於♦或其他半導體晶圓。該㈣劑從該晶圓的 背面移除^半導體來形成_已似，丨晶圓12’以消除在該背 面研磨製程巾產生的缺陷，藉此增加所產生之晶粒的強度。 仍被安裝在該背面蝕刻步驟中之該晶圓托架5上的該 已餘刻晶圓12 ’是以紅外線穿透過該托盤地與在該主動側 的對齊‘識對齊或與該磨平的背面對齊，且使用—雷射或 機械鑛從該背側切割64以形成晶粒13，如在第4圖中所示。 該雷射可以是-個二極體固態雷射、—鎖模雷射或任何適 於加工該半導體與該晶圓的其他材料的雷射。合適的雷射 波長可從紅外線到紫外線波長中選擇。可選擇地該遭蝕 刻晶圓可被重新安主動側朝上地被蝴，並該晶圓被 切割後於該托架處停止。 如在第5圖中所示，該等晶粒13接著從該晶圓托架2上 移開，且重新安裝在一晶粒墊4上或一半導體封裝之—支撐 系統的晶粒腔。 可選擇地，該晶圓可在切割之前及切割之期間部分地 被蚀刻，此k供從該等晶粒的側壁移除缺陷的額外的優 勢，且使至少該等晶粒的一些邊緣及邊角圓滑化，以移除 9 201009915 應力點。 據此*即提供了產生具有高晶粒強度的晶粒13的一種方 法其是與—自發触刻劑相接觸來蝕刻經背面研磨之後的 石夕或其他半導體晶圓。該方法提供了高撓曲強度晶粒， 例如在個三或四點撓曲彎曲測試中所測得之結果，在該 0曰圓中’供應自發矽蝕刻劑的裝置與切割該等晶圓的裝置 疋相同機械系統的一部分。也就是說，使用一設備從一 曰曰圓中產生而撓曲強度晶粒，在該設備中，晶圓背面研磨、 供應—自發石夕餘刻劑、晶圓背側對齊、晶圓切割及晶圓移 *rr 〇 疋一单一機械動作程序的一部分，而無需在該製程期 間重新安裝該晶圓。 本發明之一較佳實施例在消除應力上相較於CMP具有 一優點，該較佳實施例為乾製程，儘管在次較佳實施例中 使用一液體蝕刻劑，其中該晶圓較佳地是在相同的機器中 被切割及被消除應力，而該晶圓在任何階段都不需要被重 新安裝。 然而，應該理解的是本發明可用在整合有钮刻與雷射 加工或切割於單一機器上的一設備中，其具有一獨立的切 割鋸或雷射’及一獨立的蝕刻器。 本發明具有一超越化學濕蝕刻的一優點是在一較佳實 施例中使用乾製程，儘管一液體蝕刻劑在一次較佳實施例 中遭使用，其不需要一遮罩層的應用，因為該主動層本身 即為對一蝕刻劑諸如XeF2的一遮罩。在本發明中，該晶圓 還可在相同的機器中被消除應力及被切割，且不需在任何 201009915 階段被重新安裝。 本發明具有超越異向性電漿蝕刻的一優勢’本發明的 自發蝕刻劑成本遠小於該電漿蝕刻，且可在一相同的機器中 消除應力及切割該晶圓而不需在任何階段重新安裝該晶圓。 本發明具有超越美國專利6,498,074號案之揭露的一優 勢’該晶圓不需重新安裝。在本發明中，該等晶圓可在被 安裝於同一托架上時被背面研磨、消除應力及切割。 範例 ❹ 五個直徑125mm、厚度180μ、經背面研磨的矽晶圓被 放置在一艙室中且使用XeF2蝕刻一預定蝕刻時間1〇秒，如 在表格1中所示。此時期之後該艙室遭排空及遭净化。此蝕 刻、排空及净化循環遭重複多次以移除一 紅, 片义重的矽。該 ' 餘刻條件是顯示在表格2中。 表格1.晶圓描述 晶圓編號 切割製程 film、 1 -- 未钱刻 3 雷射 2 4 表格2.姓刻參數XeF2 or any spontaneous etchant for a work a π A noisy yen, in the cabin 3 ah a, then within a predetermined etch period, scheduled once or eve Purification. Alternatively, a continuous last name can be used, where uniformity of etching over the area can be achieved. In addition, other suspending agents such as chemomers and functional compounds, including inter-synthesis compounds, may be used in the form of gaseous liquids such as, but not limited to, F2, Cl2, HCh HBr for use in ♦ or other semiconductor wafers. The (four) agent removes the semiconductor from the back side of the wafer to form a wafer 12' to eliminate defects generated in the backside polishing process wafer, thereby increasing the strength of the resulting crystal grains. The rewritable wafer 12' still mounted on the wafer carrier 5 in the backside etching step is aligned with or aligned with the alignment of the infrared ray through the tray and the active side The back side is aligned and a 64 is cut from the back side using a laser or mechanical ore to form the die 13 as shown in FIG. The laser can be a diode solid state laser, a mode-locked laser or any laser suitable for processing the semiconductor and other materials of the wafer. Suitable laser wavelengths can be selected from infrared to ultraviolet wavelengths. Optionally, the etched wafer can be re-activated with the active side facing up, and the wafer is cut and stopped at the carrier. As shown in Fig. 5, the dies 13 are then removed from the wafer carrier 2 and remounted on a die pad 4 or a die cavity of a semiconductor package-support system. Alternatively, the wafer may be partially etched prior to and during dicing, which provides an additional advantage of removing defects from the sidewalls of the dies and at least some edges and edges of the dies The corners are rounded to remove the 9 201009915 stress points. Accordingly, a method of producing a die 13 having a high grain strength is provided by contacting the spontaneous etchant to etch the backside or other semiconductor wafer after back grinding. The method provides high flexural strength grains, such as those measured in a three or four point flexural bending test, in which the device supplies a spontaneous tantalum etchant and the wafer is cut. The device is part of the same mechanical system. That is, using a device to create a flexural strength grain from a circle, in the device, wafer back grinding, supply—spontaneous remnant, wafer backside alignment, wafer dicing, and Wafer shift *rr is part of a single mechanical motion program without the need to reinstall the wafer during the process. A preferred embodiment of the present invention has an advantage over CMP in stress relief, the preferred embodiment being a dry process, although in a preferred embodiment a liquid etchant is used, wherein the wafer is preferably It is cut and relieved in the same machine, and the wafer does not need to be reinstalled at any stage. However, it should be understood that the present invention can be used in a device incorporating buttoning and laser machining or cutting on a single machine having a separate cutting saw or laser' and a separate etcher. One advantage of the present invention having a chemical wet etch is that a dry process is used in a preferred embodiment, although a liquid etchant is used in a preferred embodiment, which does not require the application of a mask layer because The active layer itself is a mask for an etchant such as XeF2. In the present invention, the wafer can also be stress relieved and cut in the same machine and does not need to be reinstalled at any of the 201009915 stages. The present invention has an advantage over the anisotropic plasma etching. The spontaneous etchant of the present invention is much less expensive than the plasma etch, and can eliminate stress and cut the wafer in the same machine without re-tagging at any stage. Install the wafer. The present invention has an advantage over the disclosure of U.S. Patent No. 6,498,074. The wafer does not need to be reinstalled. In the present invention, the wafers can be back-grinded, stress relieved, and cut when mounted on the same carrier. EXAMPLES Five five 125 mm diameter, 180 μ thick, back-grinded silicon wafers were placed in a chamber and etched using XeF2 for a predetermined etching time of 1 second, as shown in Table 1. After this period, the cabin was emptied and purified. This etch, evacuation, and purge cycle is repeated multiple times to remove a red, piece of weight. The 'envelope condition' is shown in Table 2. Table 1. Wafer Description Wafer Number Cutting Process film, 1 -- Not Money Engraved 3 Laser 2 4 Table 2. Last Name Parameters
11 201009915 該等晶圓然後被切割且每個晶圓的該晶粒強度是使用 3點及4點撓曲彎曲強度測試量測。該3點及4點撓曲彎曲測 試的結果顯示，該平均晶粒強度高於不使用這種蝕刻方式 而製出的一晶粒，儘管該撓曲晶粒強度的實際值取決於該 晶粒所遭受的其他的製程。11 201009915 The wafers are then cut and the grain strength of each wafer is measured using a 3 point and 4 point flexural bending strength test. The results of the 3-point and 4-point flexural bending tests show that the average grain strength is higher than that of a grain produced without using such an etching method, although the actual value of the flexural grain strength depends on the grain. Other processes suffered.
C圖式簡單說明：J 第1圖是一示意圖，說明依據本發明主動側朝下地被安 裝在一托架帶上，並準備被加工的一半導體晶圓； 參 第2圖是一示意圖，說明第1圖之晶圓經背面研磨之後； 第3圖是一示意圖，說明第2圖之晶圓被乾蝕刻； 第4圖是一示意圖，說明第3圖之晶圓被切割之後； 第5圖是一較先前圖式放大的示意圖，說明從第4圖之 已切割晶圓上移走且被安裝在一基板上的一晶粒， 第6圖是依據本發明之一方法的一流程圖。 【主要元件符號說明】 1.. .半導體晶圓 2.. .背面研磨帶 3.. .艙室 4.. .晶粒塾 5···托架 11…已減薄晶圓 12.. .已姓刻晶圓 13.. .晶粒 31".入口 32.. .出口 61~64...步驟 12BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing a semiconductor wafer mounted on a carrier tape with the active side facing down according to the present invention and prepared for processing; FIG. 2 is a schematic view illustrating After the wafer of FIG. 1 is back-polished, FIG. 3 is a schematic view showing that the wafer of FIG. 2 is dry etched; FIG. 4 is a schematic view showing that the wafer of FIG. 3 is cut; FIG. Is a schematic enlarged view of the prior art, illustrating a die removed from the diced wafer of Figure 4 and mounted on a substrate, and Figure 6 is a flow diagram of a method in accordance with the present invention. [Main component symbol description] 1.. Semiconductor wafer 2.. Back grinding tape 3... Cabin 4... Grain 塾5···Bracket 11...Thinned wafer 12... The surname is engraved on the wafer 13.. .. 31 ". Entrance 32.. .Export 61~64...Step 12