SU1469557A1 - Radio receiver serviceability tester - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to reduce the time of troubleshooting and increase the reliability of the control. The device contains an input signal simulator 1, an amplitude detector 4, a phase demodulator 5, logic processing blocks 6 and 10, threshold blocks 7, 11 and 12, indicator 8, ADC 9, r-13 control signal and synchronization unit 14, as well as a controllable radio receiver 15. The goal is achieved by separately checking the amplitude-frequency x-ki and group time delay of the path of the monitored radio receiver 15. Given or performing the blocks of the device. 7 il.

Description

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The invention relates to radio engineering and can be used to monitor path parameters in the intermediate frequency band of high performance radio receivers.,

The purpose of the invention is to reduce the time of troubleshooting and increase the reliability of the control.

Figure 1 shows the structural electrical circuit of the device for monitoring the radio receiver; Fig 2 - the same block synchronization; on fig.Z - the same, nerve and third threshold blocks in figure 4 - the same, the first block of logical processing; fig.Z - the same, vtort.bloko logical processing; on fig.O - the same, phase demodulator; Fig.7 is the same as the second threshold block,

. The device for monitoring the operability of the radio receiver (Fig. 1) contains an input signal simulator 1 consisting of a carrier-frequency generator connected in series-2 and a modulator 3, for example, a controlled attenuator, an amplitude detector (BP) 4, phase demodulator (PD). 5, the first logical processing unit 6, the first threshold unit 7, the indicator 8, the analog-to-diffraction converter (AC11) 9, the second logic processing unit J0, the third threshold unit And the second threshold unit 12, the control signal generator J3, the synchronization unit 14. The radio controlled fflik 15 contains a high-frequency amplifier 16, a mixer 17, heterodyne 18, and an intermediate frequency amplifier 19 (IF amplifier).

The synchronization unit 14 (FIG. 2) can be made in the form of a first key 20, a generator of 21 pulses of the counter 22, the first element 23 delays, a trigger 24, a second key 25, a second delay element 26 26 connected to each other,

The first 7 and third 11 threshold

The blocks (FIG. 3) contain a delay element 27, a subtraction unit 28, a register 29.

The first logical processing unit 6 (FIG. 4) contains the nerve 30 and the second 31 counters, the first 32 and second 33 subtraction nodes, the nerve 34 and the second 35 registers, the driver .. 36

pulses, delay element 37, third subtraction node 38.

The second logical processing unit 10 (FIG. 5) contains the first 39 and second 40 subtraction nodes, the first 41 and second 42 registers, the pulse generator 43, the delay element 44, the third subtraction node 45.

Phase demodulator 5 (Fig.6) contains the amplifier-limiter 46 and the element 47.

The second threshold unit 12 (Fig.7) contain shaper. 48 pulses, delay element 49, subtraction node 50, register 51.

The device works as follows.

When the device is turned on, its components are in the following initial states:

in block 14 synchronization trigger 24 with a signal from the output keeps keys 20 and 25 closed; counter 22 is in the zero state (if necessary, it can be with the initial installation);

in the first threshold unit 7, a code equal to the number of pulses with PD 5 corresponding to the maximum permissible non-uniformity of the group order in the intermediate frequency band is entered in register 29;

in the third threshold block 11 in the register 29 entered the code equal to the maximum permissible unevenness of the frequency response in the band restructuring of the local oscillator;

in the second threshold unit 12, the code 51 contains the code of the minimum permissible input voltage of the intermediate frequency;

in the first logical processing block 6, the first 30 and second 31 counters as well as the first register 34 are set to zero, the maximum code is entered in the second register 35;

in the second logical processing unit 10, the first register 4 is set to the zero state, the second code 42 enters the maximum code. During the initial installation of block 14, the tuning frequency of the local oscillator 18 provides for the reception of a signal from the simulator 1 at the lower limit frequency of the passband of the AMO 19.

The device provides control of the path of the radio receiver 15 according to three criteria. The first criterion is the deterioration of the irregularity of the GVZ path in the transmission direction of the AFC 19 above the allowable one. Measurement of the frequency response of the GDZ tract is based on the Nyquist method, according to which the TLV of the tract at some frequency is assumed to be equal to the propagation time around the signal obtained for amplitude modulation of the carrier oscillation of this frequency by the oscillation of the lower frequency. When fed to the input of the AM path, the oscillations HzS) 1T (1 + + msi.n Qt) sinQt, where m is the modulation index and S2 is the modulating frequency under the condition "with, the detected oscillation at the output of the path will have a phase shift of Chy relative to the reference modulation frequency oscillations f2. Then the magnitude of the tach at frequency ij is equal to

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Simulator 1 generates a signal with amplitude modulation (AM) whose fixed carrier is equal to the center frequency of the operating range of the radio receiver 15. After passing through the path of the 15 AM radio receiver, the signal is detected in AD 4 and its phase is compared in the generator 13. PD 5 gives an input number of pulses N, corresponding to the group delay at a given frequency. When rebuilding the local oscillator 18 under the control of the block 14 is not available, and the frequency of the simulator 1 signal changes its value within the bandwidth of the HRO 19. The change in the GDT (and hence the number of pulses N, at the output of the FD 5) corresponds to the characteristic of the DI of the radio receiver path 15. the local oscillator 18 provides a change in the carrier frequency of the signal of the simulator 1 at the output of the intermediate frequency within the bandwidth of the intermediate frequency, where the requirements of the group order are set. In block 6, there is a difference between the maximum and minimum values of the TLD of the simulator signal J. This difference is equal to the maximum non-uniformity of the TST in the intermediate frequency band of the path. The magnitude of the non-uniformity of the group delay goes to the first threshold unit 7, where it is compared with the stored value, there the value of the maximum allowable value of the non-uniformity of the group delay (the threshold). When the threshold is exceeded, the first threshold unit 7 issues a signal to the indicator 8, which

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It shows the path malfunction by criterion 1 — an increase in the non-uniformity of the GVZ path of the radio receiver 15 above the permissible value. The second criterion is the worsening of the non-uniformity of the frequency response in the intermediate frequency band of the path, which is permissible. Measurement of the non-uniformity of the frequency response of the path of the radio receiver 15 is carried out using the AM signal of the simulator 1 with a fixed carrier frequency. The local oscillator 18 of the monitored radio receiver 15 is tuned under the control of block 14 so that the carrier frequency of the simulator 1 at the output of the intermediate frequency varies within the IFPC 19 bandwidth, where the requirements for uneven frequency response are set. The signal of simulator 1 is detected in AD 4, its amplitude is converted into a code using ADC 9. ADC 9 takes a count during the duration of the modulation pulse. When the heterodyne 18 is tuned, the magnitude of the signal amplitude at the output of the intermediate frequency varies in accordance with the frequency response of the path, in block 10 there is a difference between the minimum and maximum values of the amplitude of the simulated signal, which corresponds to the unevenness of the frequency response of the path. The magnitude of the non-uniformity of the frequency response goes on to the third threshold unit 11, which compares it with the stored maximum permissible value of non-uniformity; when it is exceeded, the third threshold block P gives a signal to the indicator 8, which at the same time indicates a fault according to criterion 2 — an increase in the non-uniformity of the frequency response above the permissible value.

The third criterion to be monitored is a reduction in the transmission coefficient of the radio receiver path 15 below the permissible value.

Monitoring by this criterion is carried out in the passband of the intermediate frequency of the path of the radio receiver 15 when the simulator signal is applied to the input of the radio receiver 15. When the heterodyne 18 is tuned, the signal of the simulator 1 changes its frequency within the passband of the intermediate frequency. The ACCH1 9 translates the amplitude value of the simulated 1 signal of the simulated signal during the modulation pulse duration into a code. Since the amplitude of the simulator signal is known, the transmission coefficient of radio irremia 15 is also known, the magnitude of the signal at the output of the intermediate frequency of the radio receiver 15 is also known. When the heterodyne is tuned, the amplitude of the signal of the simulator 1 at the output of the intermediate frequency will change in accordance with the frequency response, but it will should be no lower than a certain value (threshold), the code of the amplitude of the signal at the output of the intermediate frequency comes from A1Sh 9 to the second threshold unit 12, where it is compared to the stored value code M1 is minimal to the amplitude of the signal. If the code with the A / D converter 9 is smaller, then the output of the second normative block will receive a signal arriving at the indicator 8, which indicates a fault according to criterion 3 - reduction of the transmission coefficient of the radio receiver path 15 below the permissible value.

Monitoring by criterion 3 is carried out in the intermediate frequency band, which provides reliable control of the working ability of the local oscillator 18, since, when implementing the local oscillator as a frequency synthesizer, it can have separate affected points in the range where its signal is absent. .

The blocks of the proposed device operate as follows.

In block 14 of synchronization, an external trigger signal issued by the operator working with the device triggers 24, the keys 20 and-25 are opened and the skip, KaJOT generator pulses 13 to the driver 21 and the first output of block 14.

The shaper 21 is on the falling edge of the heterodyne 18, after which the flip-flop 24 is again thrown and opens the keys 20 and 25. The operation of block 14 continues 5 until the counter n counts M pulses from the former 21, after which the transfer pulse prevents the pulse from element 23, and trigger 24 remains closed. 10 At the same time, the transfer pulse from the counter 22 enters element 26, where it is delayed by time t, which is equal to the operation time of nodes 38, 45 of the subtraction, and to the third output of block 15 14. The number M is determined by the number of frequency settings of the local oscillator 18 in the passband OFC 19. With an OAC band 19, in which the frequency response and phase response are equal to UF, and the minimum 20 heterodyne restructuring step is equal to D, M F / Af. If the frequency response and the IFA of the IFA do not have sharp changes, then the local oscillator can be rearranged to accelerate., The operation of the device with a greater step than the minimum. The tuning step, and hence the number M, will be determined by the specific type of frequency response and phase response. The first logical processing unit 6 works as follows. 30 Pulses with PD 5 arrive at the outputs of the first 30 and second 31 counters, which count them. The codes of the numbers recorded in the meters 30 and 31 go to the first inputs of the first 35 32 and second 33 subtractors and

to the inputs of the first 34 and second 35 registers. On the falling edge of the pulse. With the first output of the block. 14, the shaper 36 outputs a pulse, which 40 is input to the start inputs of the first 32 to the second 33 subtraction nodes. If code A, arriving at the first input of the first subtraction node 32, is greater than the code of the number B that arrives at its

the pulse of the generator 13 gives it 45 the second input from the first register 34, the pulse, flips the trigger 24 and the first subtraction node 32 outputs

control pulse-to-write input

closes the keys 20 and 25. At the same time, the pulse from the imaging unit 21 enters the counter 22, while the counter 22 increases the number stored in it by one, and the binary-decimal code at its output changes. This code arrives at the control input of the local oscillator 38 and re-tunes its frequency. Tuning (setting), the frequency of the local oscillator J8 is performed in a time not greater than t. Impulse, post. element 23, is delayed in it for the time t (rebuilding often

first register 34, which writes (remembers) code A.

If code A arriving at the first input of the second subtraction node 33, less than a code, arriving at its second input from the second register 35, then the second subtraction node 33 outputs a pulse 55 to the recording input of the second register 35,

who writes down (remembers) the number A.

The impulse from the driver 36, delayed in the element 37 for a time

you are a local oscillator 18, after which the flip-flop 24 again opens and opens the keys 20 and 25. The operation of block 14 continues 5 until the counter counts M pulses from the driver 21, after which the transfer pulse prohibits the pulse from element 23, and trigger 24 remains closed. 0 Simultaneously, the transfer pulse from counter 22 enters element 26, where it is delayed by time t, which is equal to the operation time of nodes 38, 45 of the subtraction, and to the third output of block 5 14. The number M is determined by the number of settings of the frequency of the local oscillator 18 in the passband of the amplifier. 19. With an OAC band 19, in which the frequency response and phase response are equal to UF, and the minimum 0 heterodyne restructuring step is equal to D, M F / Af. If the frequency response and the IFA of the IFA do not have sharp changes, then the local oscillator can be rearranged to accelerate., The operation of the device with a greater step than the minimum. The tuning step, and hence the number M, will be determined by the specific type of frequency response and phase response. The first block 6 logical processing works as follows. 30 Pulses with PD 5 are fed to the outputs of the first 30 and second 31 meters, which count them. The codes of the numbers recorded in the meters 30 and 31 are fed to the first inputs of the first 35 32 and second 33 subtractors and

the inputs of the first 34 and second 35 registers. On the falling edge of the pulse. With the first output of the block. 14, the driver 36 outputs a pulse, which is fed to the start inputs of the first 32 to the second 33 subtraction nodes. If code A, arriving at the first input of the first subtraction node 32, is greater than the code of the number B that arrives at its

45 the second input from the first register 34, then the first subtraction node 32 outputs

control pulse-to-write input

50

first register 34, which writes (remembers) code A.

If code A, arriving at the first input of the second subtraction unit 33, is less than the code received by the second input from the second register 35, then the second subtraction unit 33 outputs a pulse 55 to the input of the second register 35,

who writes down (remembers) the number A. .-

The impulse from the driver 36, delayed in the element 37 for a time

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the work of subtracting nodes 32, 33 and registers 34, 35 is fed to the inputs of the zero setting of the first 30 and second 31 counters and zeroing them,

When rebuilding the heterodyne J8, each pulse of the 13 PD 5 generator generates a burst of pulses corresponding to the time delay of the detected QI simulator signal relative to the front of the oscillator 13 signal. The code of each burst with PD 5 is compared with the numbers recorded in the first behind and second 35 registers . At the end of the rearrangement in t5, the first register FOR will memorize the maximum, and in the second register 35, the minimum control code, On the signal from the third control output of block 1A, the third subtraction node 38 finds 20 the difference between the maximum and minimum control codes, which then goes to the first threshold block 7.

The second logical processing unit 10 operates as the first block b, only 25, the amplitude code from A1Sh 9 is fed to the first inputs of the first 39 and second AO subtractors. After the adjustment in the first register A1, the maximum code will be written, and in the second register A2 - the minimum amplitude of the signal from the output of the monitored radio receiver 15. According to the signal from the third output of block 1A, the third subtraction node A5 finds the difference between the maximum and minimum codes which characterizes the non-uniformity of the frequency response and goes further to the third threshold unit P.

Threshold blocks 7, 12, II work as follows.

The non-uniformity code of the central procurement system from the first logical processing unit 6 arrives at the subtraction unit 28 of the threshold unit 7, the second input of the subtraction unit 28 of the subtraction 45 receives the code of the maximum non-uniformity of the local delay group. By controlling the pulse to it from the third output of block 1A, delayed at 35

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At the time of operation of the nodes 38, A5 of the subtraction, the node 28 of the subtraction finds the difference. If the non-uniformity code of the group validation is greater than the Maximum Permissible Value, then the subtraction unit 28 outputs a signal to the indicator 8, which indicates a fault according to criterion 1.

The threshold unit 1 works similarly. In the second threshold block 32

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shaper A8 generates a pulse at the falling edge of the control pulse, element A9 delays it by the time of the ADC 9 and starts it with the subtraction unit 50, the first input of which is fed with the code from the ADC 9, and the second is the code from the register 5 equal to the minimum the permissible amplitude of the signal from the simulator 1 at the output of HELL A. The second threshold unit 12 responds with a malfunction signal according to criterion 3 when a code arrives at its input from A1SCH 9, which is less than the memorized code. The third threshold block M generates a malfunction signal according to criterion 2 when an irregularity response is received at its input, the frequency response that is greater than the memorized maximum permissible code. The duration of the meander type pulses, followed by -f frequency F at the first output of the generator-13 and modulating the signal of the simulator, is determined by taking into account formula (1) to ensure the measurement of the required value of the GD. This duration must not be less than the maximum measured value of the group delay. From the second output of the torus generator 13, counting pulses with a frequency f per PD 5 are used, which are used to measure the time delay in PD 5.

The signal at the first output of the generator, pa 13 is formed by dividing the signal of a highly stable counting generator with a frequency f an integer number of times: f k-F.

The PD 5 converts the phase shift between the detected envelope of the simulator 1 signal at the BPA output and the modulating signal of the oscillator 13. A6 restriction amplifier converts the pulse envelope from the BP4 output to the amplitude of the level and supplies them to the first And7 cell. To the second and third inputs of the device, the correspondingly modulating pulses are fed from the first output of block 1A and the counting pulses. The number of pulses at the output of PD 5 at phase shift cf, the signals at the first and second inputs will be equal to

N m 360.

where tpj is expressed in degrees. Since f k F, to provide a whole number of pulses at the output of PD 5, it is necessary that k 360-10

Pulse-following frequency i: should provide the required accuracy of the TST measurement.

Heterodyne, 18 co-controlled radio acceptor 15 when performing it. in the form of a frequency synthesizer, it must be controlled by a code (binary-decimal) coming from counter 22 of block 14. At the initial frequency, the tuning of the local oscillator 18 must receive a signal from the transmitter at the lower boundary frequency of the cropping of the AMO JF. After the countdown of 22 of the -H pulses from the 15 generator 21, the tuning frequency of the local oscillator 18 must ensure that the signal of the simulator 1 is received at the upper limit frequency of the passband 19 ... 20

If the local oscillator 18 is made in the generator, controlled by the voltage, then the local oscillator 1B must include a digital computer module, which graphs the control code from the counter, 22 into the control voltage.

A1SC 9 takes the counting on the falling edge of the control pulse from the first output of the block 14. A modulator 3, which is, for example, a control attenuator, generates the amplitude modulus of the oscillator 2 by the control signal from block 14.

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The generator of a non-frequency frequency must ensure long-term frequency stability — such that during the monitoring time the frequency changes by no more than 0.1 step of tuning the local oscillator 18 for fixing the extreme points of the frequency response of the path.

Form, la invented and

 Device for monitoring the radio receiver performance, containing a pilot signal generator, phase demodulator, sequentially

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the first threshold unit and indicator connected, as well as the input signal simulator, the output of which is connected to the input of the monitored radio receiver, is characterized in that, in order to shorten the time of malfunction search and to increase the reliability of the control, an amplitude detector is added, the output of which is connected to the first input phase. demodulator, the second threshold unit, the output of which is connected to the second input of the indicator, the synchronization unit, the first output of which is connected to the input of the input signal simulator, the first logic processing unit connected between the output of the phase demodulator and the first input of the first threshold unit, serially connected A / D converter, a second logic processing unit and a third threshold unit, the output of which is connected to the third input of the indicator, the output of the amplitude detector is connected to the first input of the analog o-digital converter, the output of which is connected to the first input of the second threshold unit, the second input of which and the second inputs of the first and second logic processing units, phase demodulator and analog-digital converter are connected to the first output of the synchronization unit, the second output of which is connected to the third inputs nerve and second logical processing units and to the second inputs of the first and third threshold blocks, the input of the synchronization unit is connected to the first output of the control signal generator, the second output. orogo connected to the third input of the phase demodulator, a third synchronization output unit is input for setting the frequency of the radio-controlled and input amnlitudnogo detector is a signal input from the output kontro- .liruemogo radio.

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Compiled by A. Seselkin

Editor A.Makovska Tehred L.Serdyukova Proofreader O. Kravtsova

Order 1366/57 Circulation 627 Subscription

VNISh of the State Committee on Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, 4/5, Raushsk nab.

Production and Publishing Combine Patent, Uzhgorod, st. Gagarin, 101

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Claims (1)

Form, la invented ή I A device for monitoring the operability of a radio receiver containing a control signal generator, a phase demodulator, a first threshold block and an indicator connected in series, as well as an input signal simulator whose output is connected to the input of a controlled radio receiver, characterized in that, in order to reduce the search time malfunctions and increases in the reliability of control, an amplitude detector is introduced, the output of which is connected to the first phase input. demodulator, a second threshold block, the output of which is connected to the second input of the indicator, a synchronization block, the first output of which is connected to the input signal simulator input, the first logical processing unit, connected between the output of the phase demodulator and the first input of the first threshold block, connected in series with a digital converter, a second logical processing unit and a third threshold unit, the output of which is connected to the third input of the indicator, the output of the amplitude detector is connected to the first analog input an o-digital converter, the output of which is connected to the first input of the second threshold block, the second input of which and the second inputs of the first and second logic processing units, a phase demodulator, and an analog-to-digital converter are connected to the first output of the synchronization block, the second output of which is connected to the third inputs of the first and the second logical processing units and to the second inputs of the first and third threshold blocks, the input of the synchronization unit is connected to the first output of the control signal generator. la, the second output. which is connected to the third input of the phase demodulator, the third output of the synchronization unit is the input of the frequency setting of the monitored radio receiver, and the input of the amplitude detector is the signal input from the output of the monitored radio receiver.